Deleted Added
full compact
if_sn.c (72012) if_sn.c (72084)
1/*
2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Gardner Buchanan.
16 * 4. The name of Gardner Buchanan may not be used to endorse or promote
17 * products derived from this software without specific prior written
18 * permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
1/*
2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Gardner Buchanan.
16 * 4. The name of Gardner Buchanan may not be used to endorse or promote
17 * products derived from this software without specific prior written
18 * permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $FreeBSD: head/sys/dev/sn/if_sn.c 72012 2001-02-04 16:08:18Z phk $
31 * $FreeBSD: head/sys/dev/sn/if_sn.c 72084 2001-02-06 10:12:15Z phk $
32 */
33
34/*
35 * This is a driver for SMC's 9000 series of Ethernet adapters.
36 *
37 * This FreeBSD driver is derived from the smc9194 Linux driver by
38 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
39 * This driver also shamelessly borrows from the FreeBSD ep driver
40 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
41 * All rights reserved.
42 *
43 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
44 * PC. It is adapted from Erik Stahlman's Linux driver which worked
45 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook,
46 * it will work for the entire SMC 9xxx series. (Ha Ha)
47 *
48 * "Features" of the SMC chip:
49 * 4608 byte packet memory. (for the 91C92. Others have more)
50 * EEPROM for configuration
51 * AUI/TP selection
52 *
53 * Authors:
54 * Erik Stahlman erik@vt.edu
55 * Herb Peyerl hpeyerl@novatel.ca
56 * Andres Vega Garcia avega@sophia.inria.fr
57 * Serge Babkin babkin@hq.icb.chel.su
58 * Gardner Buchanan gbuchanan@shl.com
59 *
60 * Sources:
61 * o SMC databook
62 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
63 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
64 *
65 * Known Bugs:
66 * o The hardware multicast filter isn't used yet.
67 * o Setting of the hardware address isn't supported.
68 * o Hardware padding isn't used.
69 */
70
71/*
72 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
73 *
74 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
75 * BSD-nomads, Tokyo, Japan.
76 */
77/*
78 * Multicast support by Kei TANAKA <kei@pal.xerox.com>
79 * Special thanks to itojun@itojun.org
80 */
81#define SN_DEBUG
82
83#include <sys/param.h>
84#include <sys/systm.h>
85#include <sys/errno.h>
86#include <sys/sockio.h>
87#include <sys/mbuf.h>
88#include <sys/socket.h>
89#include <sys/syslog.h>
90
91#include <sys/module.h>
92#include <sys/bus.h>
93
94#include <machine/bus.h>
95#include <machine/resource.h>
96#include <sys/rman.h>
97
98#include <net/ethernet.h>
99#include <net/if.h>
100#include <net/if_arp.h>
101#include <net/if_dl.h>
102#include <net/if_types.h>
103#include <net/if_mib.h>
104
105#ifdef INET
106#include <netinet/in.h>
107#include <netinet/in_systm.h>
108#include <netinet/in_var.h>
109#include <netinet/ip.h>
110#endif
111
112#ifdef NS
113#include <netns/ns.h>
114#include <netns/ns_if.h>
115#endif
116
117#include <net/bpf.h>
118#include <net/bpfdesc.h>
119
120
121#include <dev/sn/if_snreg.h>
122#include <dev/sn/if_snvar.h>
123
124/* Exported variables */
125devclass_t sn_devclass;
126
127static int snioctl(struct ifnet * ifp, u_long, caddr_t);
128
129static void snresume(struct ifnet *);
130
131void sninit(void *);
132void snread(struct ifnet *);
133void snreset(struct sn_softc *);
134void snstart(struct ifnet *);
135void snstop(struct sn_softc *);
136void snwatchdog(struct ifnet *);
137
138static void sn_setmcast(struct sn_softc *);
139static int sn_getmcf(struct arpcom *ac, u_char *mcf);
140static u_int smc_crc(u_char *);
141
142/* I (GB) have been unlucky getting the hardware padding
143 * to work properly.
144 */
145#define SW_PAD
146
147static const char *chip_ids[15] = {
148 NULL, NULL, NULL,
149 /* 3 */ "SMC91C90/91C92",
150 /* 4 */ "SMC91C94",
151 /* 5 */ "SMC91C95",
152 NULL,
153 /* 7 */ "SMC91C100",
154 /* 8 */ "SMC91C100FD",
155 NULL, NULL, NULL,
156 NULL, NULL, NULL
157};
158
159int
160sn_attach(device_t dev)
161{
162 struct sn_softc *sc = device_get_softc(dev);
163 struct ifnet *ifp = &sc->arpcom.ac_if;
164 u_short i;
165 u_char *p;
166 struct ifaddr *ifa;
167 struct sockaddr_dl *sdl;
168 int rev;
169 u_short address;
170 int j;
171
172 sn_activate(dev);
173
174 snstop(sc);
175
176 sc->dev = dev;
177 sc->pages_wanted = -1;
178
179 device_printf(dev, " ");
180
181 SMC_SELECT_BANK(3);
182 rev = inw(BASE + REVISION_REG_W);
183 if (chip_ids[(rev >> 4) & 0xF])
184 printf("%s ", chip_ids[(rev >> 4) & 0xF]);
185
186 SMC_SELECT_BANK(1);
187 i = inw(BASE + CONFIG_REG_W);
188 printf(i & CR_AUI_SELECT ? "AUI" : "UTP");
189
190 if (sc->pccard_enaddr)
191 for (j = 0; j < 3; j++) {
192 u_short w;
193
194 w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
195 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
196 outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
197 }
198
199 /*
200 * Read the station address from the chip. The MAC address is bank 1,
201 * regs 4 - 9
202 */
203 SMC_SELECT_BANK(1);
204 p = (u_char *) & sc->arpcom.ac_enaddr;
205 for (i = 0; i < 6; i += 2) {
206 address = inw(BASE + IAR_ADDR0_REG_W + i);
207 p[i + 1] = address >> 8;
208 p[i] = address & 0xFF;
209 }
210 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":");
211 ifp->if_softc = sc;
212 ifp->if_unit = device_get_unit(dev);
213 ifp->if_name = "sn";
214 ifp->if_mtu = ETHERMTU;
215 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
216 ifp->if_output = ether_output;
217 ifp->if_start = snstart;
218 ifp->if_ioctl = snioctl;
219 ifp->if_watchdog = snwatchdog;
220 ifp->if_init = sninit;
221 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
222 ifp->if_timer = 0;
223
224 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
225
226 /*
227 * Fill the hardware address into ifa_addr if we find an AF_LINK
228 * entry. We need to do this so bpf's can get the hardware addr of
229 * this card. netstat likes this too!
230 */
231 ifa = TAILQ_FIRST(&ifp->if_addrhead);
232 while ((ifa != 0) && (ifa->ifa_addr != 0) &&
233 (ifa->ifa_addr->sa_family != AF_LINK))
234 ifa = TAILQ_NEXT(ifa, ifa_link);
235
236 if ((ifa != 0) && (ifa->ifa_addr != 0)) {
237 sdl = (struct sockaddr_dl *) ifa->ifa_addr;
238 sdl->sdl_type = IFT_ETHER;
239 sdl->sdl_alen = ETHER_ADDR_LEN;
240 sdl->sdl_slen = 0;
241 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN);
242 }
243
244 return 0;
245}
246
247
248int
249sn_detach(device_t dev)
250{
251 struct sn_softc *sc = device_get_softc(dev);
252
253 sc->arpcom.ac_if.if_flags &= ~IFF_RUNNING;
254 ether_ifdetach(&sc->arpcom.ac_if, ETHER_BPF_SUPPORTED);
255 sn_deactivate(dev);
256 return 0;
257}
258
259/*
260 * Reset and initialize the chip
261 */
262void
263sninit(void *xsc)
264{
265 register struct sn_softc *sc = xsc;
266 register struct ifnet *ifp = &sc->arpcom.ac_if;
267 int s;
268 int flags;
269 int mask;
270
271 s = splimp();
272
273 /*
274 * This resets the registers mostly to defaults, but doesn't affect
275 * EEPROM. After the reset cycle, we pause briefly for the chip to
276 * be happy.
277 */
278 SMC_SELECT_BANK(0);
279 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
280 SMC_DELAY();
281 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
282 SMC_DELAY();
283 SMC_DELAY();
284
285 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
286
287 /*
288 * Set the control register to automatically release succesfully
289 * transmitted packets (making the best use out of our limited
290 * memory) and to enable the EPH interrupt on certain TX errors.
291 */
292 SMC_SELECT_BANK(1);
293 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
294 CTR_CR_ENABLE | CTR_LE_ENABLE));
295
296 /* Set squelch level to 240mV (default 480mV) */
297 flags = inw(BASE + CONFIG_REG_W);
298 flags |= CR_SET_SQLCH;
299 outw(BASE + CONFIG_REG_W, flags);
300
301 /*
302 * Reset the MMU and wait for it to be un-busy.
303 */
304 SMC_SELECT_BANK(2);
305 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
306 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
307 ;
308
309 /*
310 * Disable all interrupts
311 */
312 outb(BASE + INTR_MASK_REG_B, 0x00);
313
314 sn_setmcast(sc);
315
316 /*
317 * Set the transmitter control. We want it enabled.
318 */
319 flags = TCR_ENABLE;
320
321#ifndef SW_PAD
322 /*
323 * I (GB) have been unlucky getting this to work.
324 */
325 flags |= TCR_PAD_ENABLE;
326#endif /* SW_PAD */
327
328 outw(BASE + TXMIT_CONTROL_REG_W, flags);
329
330
331 /*
332 * Now, enable interrupts
333 */
334 SMC_SELECT_BANK(2);
335
336 mask = IM_EPH_INT |
337 IM_RX_OVRN_INT |
338 IM_RCV_INT |
339 IM_TX_INT;
340
341 outb(BASE + INTR_MASK_REG_B, mask);
342 sc->intr_mask = mask;
343 sc->pages_wanted = -1;
344
345
346 /*
347 * Mark the interface running but not active.
348 */
349 ifp->if_flags |= IFF_RUNNING;
350 ifp->if_flags &= ~IFF_OACTIVE;
351
352 /*
353 * Attempt to push out any waiting packets.
354 */
355 snstart(ifp);
356
357 splx(s);
358}
359
360
361void
362snstart(struct ifnet *ifp)
363{
364 register struct sn_softc *sc = ifp->if_softc;
365 register u_int len;
366 register struct mbuf *m;
367 struct mbuf *top;
368 int s, pad;
369 int mask;
370 u_short length;
371 u_short numPages;
372 u_char packet_no;
373 int time_out;
374 int junk = 0;
375
376 s = splimp();
377
378 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) {
379 splx(s);
380 return;
381 }
382 if (sc->pages_wanted != -1) {
383 splx(s);
384 printf("sn%d: snstart() while memory allocation pending\n",
385 ifp->if_unit);
386 return;
387 }
388startagain:
389
390 /*
391 * Sneak a peek at the next packet
392 */
393 m = sc->arpcom.ac_if.if_snd.ifq_head;
394 if (m == 0) {
395 splx(s);
396 return;
397 }
398 /*
399 * Compute the frame length and set pad to give an overall even
400 * number of bytes. Below we assume that the packet length is even.
401 */
402 for (len = 0, top = m; m; m = m->m_next)
403 len += m->m_len;
404
405 pad = (len & 1);
406
407 /*
408 * We drop packets that are too large. Perhaps we should truncate
409 * them instead?
410 */
411 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
412 printf("sn%d: large packet discarded (A)\n", ifp->if_unit);
413 ++sc->arpcom.ac_if.if_oerrors;
414 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
415 m_freem(m);
416 goto readcheck;
417 }
418#ifdef SW_PAD
419
420 /*
421 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
422 */
423 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
424 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
425
426#endif /* SW_PAD */
427
428 length = pad + len;
429
430 /*
431 * The MMU wants the number of pages to be the number of 256 byte
432 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
433 * include space for the status word, byte count and control bytes in
434 * the allocation request.
435 */
436 numPages = (length + 6) >> 8;
437
438
439 /*
440 * Now, try to allocate the memory
441 */
442 SMC_SELECT_BANK(2);
443 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
444
445 /*
446 * Wait a short amount of time to see if the allocation request
447 * completes. Otherwise, I enable the interrupt and wait for
448 * completion asyncronously.
449 */
450
451 time_out = MEMORY_WAIT_TIME;
452 do {
453 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
454 break;
455 } while (--time_out);
456
457 if (!time_out || junk > 10) {
458
459 /*
460 * No memory now. Oh well, wait until the chip finds memory
461 * later. Remember how many pages we were asking for and
462 * enable the allocation completion interrupt. Also set a
463 * watchdog in case we miss the interrupt. We mark the
464 * interface active since there is no point in attempting an
465 * snstart() until after the memory is available.
466 */
467 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
468 outb(BASE + INTR_MASK_REG_B, mask);
469 sc->intr_mask = mask;
470
471 sc->arpcom.ac_if.if_timer = 1;
472 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
473 sc->pages_wanted = numPages;
474
475 splx(s);
476 return;
477 }
478 /*
479 * The memory allocation completed. Check the results.
480 */
481 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
482 if (packet_no & ARR_FAILED) {
483 if (junk++ > 10)
484 printf("sn%d: Memory allocation failed\n", ifp->if_unit);
485 goto startagain;
486 }
487 /*
488 * We have a packet number, so tell the card to use it.
489 */
490 outb(BASE + PACKET_NUM_REG_B, packet_no);
491
492 /*
493 * Point to the beginning of the packet
494 */
495 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
496
497 /*
498 * Send the packet length (+6 for status, length and control byte)
499 * and the status word (set to zeros)
500 */
501 outw(BASE + DATA_REG_W, 0);
502 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
503 outb(BASE + DATA_REG_B, (length + 6) >> 8);
504
505 /*
506 * Get the packet from the kernel. This will include the Ethernet
507 * frame header, MAC Addresses etc.
508 */
509 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
510
511 /*
512 * Push out the data to the card.
513 */
514 for (top = m; m != 0; m = m->m_next) {
515
516 /*
517 * Push out words.
518 */
519 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
520
521 /*
522 * Push out remaining byte.
523 */
524 if (m->m_len & 1)
525 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
526 }
527
528 /*
529 * Push out padding.
530 */
531 while (pad > 1) {
532 outw(BASE + DATA_REG_W, 0);
533 pad -= 2;
534 }
535 if (pad)
536 outb(BASE + DATA_REG_B, 0);
537
538 /*
539 * Push out control byte and unused packet byte The control byte is 0
540 * meaning the packet is even lengthed and no special CRC handling is
541 * desired.
542 */
543 outw(BASE + DATA_REG_W, 0);
544
545 /*
546 * Enable the interrupts and let the chipset deal with it Also set a
547 * watchdog in case we miss the interrupt.
548 */
549 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
550 outb(BASE + INTR_MASK_REG_B, mask);
551 sc->intr_mask = mask;
552
553 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
554
555 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
556 sc->arpcom.ac_if.if_timer = 1;
557
558 if (ifp->if_bpf) {
559 bpf_mtap(ifp, top);
560 }
561
562 sc->arpcom.ac_if.if_opackets++;
563 m_freem(top);
564
565
566readcheck:
567
568 /*
569 * Is another packet coming in? We don't want to overflow the tiny
570 * RX FIFO. If nothing has arrived then attempt to queue another
571 * transmit packet.
572 */
573 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
574 goto startagain;
575
576 splx(s);
577 return;
578}
579
580
581
582/* Resume a packet transmit operation after a memory allocation
583 * has completed.
584 *
585 * This is basically a hacked up copy of snstart() which handles
586 * a completed memory allocation the same way snstart() does.
587 * It then passes control to snstart to handle any other queued
588 * packets.
589 */
590static void
591snresume(struct ifnet *ifp)
592{
593 register struct sn_softc *sc = ifp->if_softc;
594 register u_int len;
595 register struct mbuf *m;
596 struct mbuf *top;
597 int pad;
598 int mask;
599 u_short length;
600 u_short numPages;
601 u_short pages_wanted;
602 u_char packet_no;
603
604 if (sc->pages_wanted < 0)
605 return;
606
607 pages_wanted = sc->pages_wanted;
608 sc->pages_wanted = -1;
609
610 /*
611 * Sneak a peek at the next packet
612 */
613 m = sc->arpcom.ac_if.if_snd.ifq_head;
614 if (m == 0) {
615 printf("sn%d: snresume() with nothing to send\n", ifp->if_unit);
616 return;
617 }
618 /*
619 * Compute the frame length and set pad to give an overall even
620 * number of bytes. Below we assume that the packet length is even.
621 */
622 for (len = 0, top = m; m; m = m->m_next)
623 len += m->m_len;
624
625 pad = (len & 1);
626
627 /*
628 * We drop packets that are too large. Perhaps we should truncate
629 * them instead?
630 */
631 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
632 printf("sn%d: large packet discarded (B)\n", ifp->if_unit);
633 ++sc->arpcom.ac_if.if_oerrors;
634 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
635 m_freem(m);
636 return;
637 }
638#ifdef SW_PAD
639
640 /*
641 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
642 */
643 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
644 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
645
646#endif /* SW_PAD */
647
648 length = pad + len;
649
650
651 /*
652 * The MMU wants the number of pages to be the number of 256 byte
653 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
654 * include space for the status word, byte count and control bytes in
655 * the allocation request.
656 */
657 numPages = (length + 6) >> 8;
658
659
660 SMC_SELECT_BANK(2);
661
662 /*
663 * The memory allocation completed. Check the results. If it failed,
664 * we simply set a watchdog timer and hope for the best.
665 */
666 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
667 if (packet_no & ARR_FAILED) {
668 printf("sn%d: Memory allocation failed. Weird.\n", ifp->if_unit);
669 sc->arpcom.ac_if.if_timer = 1;
670 goto try_start;
671 }
672 /*
673 * We have a packet number, so tell the card to use it.
674 */
675 outb(BASE + PACKET_NUM_REG_B, packet_no);
676
677 /*
678 * Now, numPages should match the pages_wanted recorded when the
679 * memory allocation was initiated.
680 */
681 if (pages_wanted != numPages) {
682 printf("sn%d: memory allocation wrong size. Weird.\n", ifp->if_unit);
683 /*
684 * If the allocation was the wrong size we simply release the
685 * memory once it is granted. Wait for the MMU to be un-busy.
686 */
687 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
688 ;
689 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
690
691 return;
692 }
693 /*
694 * Point to the beginning of the packet
695 */
696 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
697
698 /*
699 * Send the packet length (+6 for status, length and control byte)
700 * and the status word (set to zeros)
701 */
702 outw(BASE + DATA_REG_W, 0);
703 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
704 outb(BASE + DATA_REG_B, (length + 6) >> 8);
705
706 /*
707 * Get the packet from the kernel. This will include the Ethernet
708 * frame header, MAC Addresses etc.
709 */
710 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
711
712 /*
713 * Push out the data to the card.
714 */
715 for (top = m; m != 0; m = m->m_next) {
716
717 /*
718 * Push out words.
719 */
720 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
721
722 /*
723 * Push out remaining byte.
724 */
725 if (m->m_len & 1)
726 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
727 }
728
729 /*
730 * Push out padding.
731 */
732 while (pad > 1) {
733 outw(BASE + DATA_REG_W, 0);
734 pad -= 2;
735 }
736 if (pad)
737 outb(BASE + DATA_REG_B, 0);
738
739 /*
740 * Push out control byte and unused packet byte The control byte is 0
741 * meaning the packet is even lengthed and no special CRC handling is
742 * desired.
743 */
744 outw(BASE + DATA_REG_W, 0);
745
746 /*
747 * Enable the interrupts and let the chipset deal with it Also set a
748 * watchdog in case we miss the interrupt.
749 */
750 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
751 outb(BASE + INTR_MASK_REG_B, mask);
752 sc->intr_mask = mask;
753 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
754
755 if (ifp->if_bpf) {
756 bpf_mtap(ifp, top);
757 }
758
759 sc->arpcom.ac_if.if_opackets++;
760 m_freem(top);
761
762try_start:
763
764 /*
765 * Now pass control to snstart() to queue any additional packets
766 */
767 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
768 snstart(ifp);
769
770 /*
771 * We've sent something, so we're active. Set a watchdog in case the
772 * TX_EMPTY interrupt is lost.
773 */
774 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
775 sc->arpcom.ac_if.if_timer = 1;
776
777 return;
778}
779
780
781void
782sn_intr(void *arg)
783{
784 int status, interrupts;
785 register struct sn_softc *sc = (struct sn_softc *) arg;
786 struct ifnet *ifp = &sc->arpcom.ac_if;
787 int x;
788
789 /*
790 * Chip state registers
791 */
792 u_char mask;
793 u_char packet_no;
794 u_short tx_status;
795 u_short card_stats;
796
797 /*
798 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder...
799 */
800 x = splbio();
801
802 /*
803 * Clear the watchdog.
804 */
805 ifp->if_timer = 0;
806
807 SMC_SELECT_BANK(2);
808
809 /*
810 * Obtain the current interrupt mask and clear the hardware mask
811 * while servicing interrupts.
812 */
813 mask = inb(BASE + INTR_MASK_REG_B);
814 outb(BASE + INTR_MASK_REG_B, 0x00);
815
816 /*
817 * Get the set of interrupts which occurred and eliminate any which
818 * are masked.
819 */
820 interrupts = inb(BASE + INTR_STAT_REG_B);
821 status = interrupts & mask;
822
823 /*
824 * Now, process each of the interrupt types.
825 */
826
827 /*
828 * Receive Overrun.
829 */
830 if (status & IM_RX_OVRN_INT) {
831
832 /*
833 * Acknowlege Interrupt
834 */
835 SMC_SELECT_BANK(2);
836 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
837
838 ++sc->arpcom.ac_if.if_ierrors;
839 }
840 /*
841 * Got a packet.
842 */
843 if (status & IM_RCV_INT) {
844#if 1
845 int packet_number;
846
847 SMC_SELECT_BANK(2);
848 packet_number = inw(BASE + FIFO_PORTS_REG_W);
849
850 if (packet_number & FIFO_REMPTY) {
851
852 /*
853 * we got called , but nothing was on the FIFO
854 */
855 printf("sn: Receive interrupt with nothing on FIFO\n");
856
857 goto out;
858 }
859#endif
860 snread(ifp);
861 }
862 /*
863 * An on-card memory allocation came through.
864 */
865 if (status & IM_ALLOC_INT) {
866
867 /*
868 * Disable this interrupt.
869 */
870 mask &= ~IM_ALLOC_INT;
871 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
872 snresume(&sc->arpcom.ac_if);
873 }
874 /*
875 * TX Completion. Handle a transmit error message. This will only be
876 * called when there is an error, because of the AUTO_RELEASE mode.
877 */
878 if (status & IM_TX_INT) {
879
880 /*
881 * Acknowlege Interrupt
882 */
883 SMC_SELECT_BANK(2);
884 outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
885
886 packet_no = inw(BASE + FIFO_PORTS_REG_W);
887 packet_no &= FIFO_TX_MASK;
888
889 /*
890 * select this as the packet to read from
891 */
892 outb(BASE + PACKET_NUM_REG_B, packet_no);
893
894 /*
895 * Position the pointer to the first word from this packet
896 */
897 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
898
899 /*
900 * Fetch the TX status word. The value found here will be a
901 * copy of the EPH_STATUS_REG_W at the time the transmit
902 * failed.
903 */
904 tx_status = inw(BASE + DATA_REG_W);
905
906 if (tx_status & EPHSR_TX_SUC) {
907 device_printf(sc->dev,
908 "Successful packet caused interrupt\n");
909 } else {
910 ++sc->arpcom.ac_if.if_oerrors;
911 }
912
913 if (tx_status & EPHSR_LATCOL)
914 ++sc->arpcom.ac_if.if_collisions;
915
916 /*
917 * Some of these errors will have disabled transmit.
918 * Re-enable transmit now.
919 */
920 SMC_SELECT_BANK(0);
921
922#ifdef SW_PAD
923 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
924#else
925 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
926#endif /* SW_PAD */
927
928 /*
929 * kill the failed packet. Wait for the MMU to be un-busy.
930 */
931 SMC_SELECT_BANK(2);
932 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
933 ;
934 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
935
936 /*
937 * Attempt to queue more transmits.
938 */
939 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
940 snstart(&sc->arpcom.ac_if);
941 }
942 /*
943 * Transmit underrun. We use this opportunity to update transmit
944 * statistics from the card.
945 */
946 if (status & IM_TX_EMPTY_INT) {
947
948 /*
949 * Acknowlege Interrupt
950 */
951 SMC_SELECT_BANK(2);
952 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
953
954 /*
955 * Disable this interrupt.
956 */
957 mask &= ~IM_TX_EMPTY_INT;
958
959 SMC_SELECT_BANK(0);
960 card_stats = inw(BASE + COUNTER_REG_W);
961
962 /*
963 * Single collisions
964 */
965 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
966
967 /*
968 * Multiple collisions
969 */
970 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
971
972 SMC_SELECT_BANK(2);
973
974 /*
975 * Attempt to enqueue some more stuff.
976 */
977 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
978 snstart(&sc->arpcom.ac_if);
979 }
980 /*
981 * Some other error. Try to fix it by resetting the adapter.
982 */
983 if (status & IM_EPH_INT) {
984 snstop(sc);
985 sninit(sc);
986 }
987
988out:
989 /*
990 * Handled all interrupt sources.
991 */
992
993 SMC_SELECT_BANK(2);
994
995 /*
996 * Reestablish interrupts from mask which have not been deselected
997 * during this interrupt. Note that the hardware mask, which was set
998 * to 0x00 at the start of this service routine, may have been
999 * updated by one or more of the interrupt handers and we must let
1000 * those new interrupts stay enabled here.
1001 */
1002 mask |= inb(BASE + INTR_MASK_REG_B);
1003 outb(BASE + INTR_MASK_REG_B, mask);
1004 sc->intr_mask = mask;
1005
1006 splx(x);
1007}
1008
1009void
1010snread(register struct ifnet *ifp)
1011{
1012 struct sn_softc *sc = ifp->if_softc;
1013 struct ether_header *eh;
1014 struct mbuf *m;
1015 short status;
1016 int packet_number;
1017 u_short packet_length;
1018 u_char *data;
1019
1020 SMC_SELECT_BANK(2);
1021#if 0
1022 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1023
1024 if (packet_number & FIFO_REMPTY) {
1025
1026 /*
1027 * we got called , but nothing was on the FIFO
1028 */
1029 printf("sn: Receive interrupt with nothing on FIFO\n");
1030 return;
1031 }
1032#endif
1033read_another:
1034
1035 /*
1036 * Start reading from the start of the packet. Since PTR_RCV is set,
1037 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
1038 */
1039 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
1040
1041 /*
1042 * First two words are status and packet_length
1043 */
1044 status = inw(BASE + DATA_REG_W);
1045 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
1046
1047 /*
1048 * The packet length contains 3 extra words: status, length, and a
1049 * extra word with the control byte.
1050 */
1051 packet_length -= 6;
1052
1053 /*
1054 * Account for receive errors and discard.
1055 */
1056 if (status & RS_ERRORS) {
1057 ++sc->arpcom.ac_if.if_ierrors;
1058 goto out;
1059 }
1060 /*
1061 * A packet is received.
1062 */
1063
1064 /*
1065 * Adjust for odd-length packet.
1066 */
1067 if (status & RS_ODDFRAME)
1068 packet_length++;
1069
1070 /*
1071 * Allocate a header mbuf from the kernel.
1072 */
1073 MGETHDR(m, M_DONTWAIT, MT_DATA);
1074 if (m == NULL)
1075 goto out;
1076
1077 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
1078 m->m_pkthdr.len = m->m_len = packet_length;
1079
1080 /*
1081 * Attach an mbuf cluster
1082 */
1083 MCLGET(m, M_DONTWAIT);
1084
1085 /*
1086 * Insist on getting a cluster
1087 */
1088 if ((m->m_flags & M_EXT) == 0) {
1089 m_freem(m);
1090 ++sc->arpcom.ac_if.if_ierrors;
1091 printf("sn: snread() kernel memory allocation problem\n");
1092 goto out;
1093 }
1094 eh = mtod(m, struct ether_header *);
1095
1096 /*
1097 * Get packet, including link layer address, from interface.
1098 */
1099
1100 data = (u_char *) eh;
1101 insw(BASE + DATA_REG_W, data, packet_length >> 1);
1102 if (packet_length & 1) {
1103 data += packet_length & ~1;
1104 *data = inb(BASE + DATA_REG_B);
1105 }
1106 ++sc->arpcom.ac_if.if_ipackets;
1107
1108 /*
1109 * Remove link layer addresses and whatnot.
1110 */
1111 m->m_pkthdr.len = m->m_len = packet_length - sizeof(struct ether_header);
1112 m->m_data += sizeof(struct ether_header);
1113
1114 ether_input(&sc->arpcom.ac_if, eh, m);
1115
1116out:
1117
1118 /*
1119 * Error or good, tell the card to get rid of this packet Wait for
1120 * the MMU to be un-busy.
1121 */
1122 SMC_SELECT_BANK(2);
1123 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
1124 ;
1125 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1126
1127 /*
1128 * Check whether another packet is ready
1129 */
1130 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1131 if (packet_number & FIFO_REMPTY) {
1132 return;
1133 }
1134 goto read_another;
1135}
1136
1137
1138/*
1139 * Handle IOCTLS. This function is completely stolen from if_ep.c
1140 * As with its progenitor, it does not handle hardware address
1141 * changes.
1142 */
1143static int
1144snioctl(register struct ifnet *ifp, u_long cmd, caddr_t data)
1145{
1146 struct sn_softc *sc = ifp->if_softc;
1147 int s, error = 0;
1148
1149 s = splimp();
1150
1151 switch (cmd) {
1152 case SIOCSIFADDR:
1153 case SIOCGIFADDR:
1154 case SIOCSIFMTU:
1155 error = ether_ioctl(ifp, cmd, data);
1156 break;
1157
1158 case SIOCSIFFLAGS:
1159 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1160 ifp->if_flags &= ~IFF_RUNNING;
1161 snstop(sc);
1162 break;
1163 } else {
1164 /* reinitialize card on any parameter change */
1165 sninit(sc);
1166 break;
1167 }
1168 break;
1169
1170#ifdef notdef
1171 case SIOCGHWADDR:
1172 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1173 sizeof(sc->sc_addr));
1174 break;
1175#endif
1176
1177 case SIOCADDMULTI:
1178 /* update multicast filter list. */
1179 sn_setmcast(sc);
1180 error = 0;
1181 break;
1182 case SIOCDELMULTI:
1183 /* update multicast filter list. */
1184 sn_setmcast(sc);
1185 error = 0;
1186 break;
1187 default:
1188 error = EINVAL;
1189 }
1190
1191 splx(s);
1192
1193 return (error);
1194}
1195
1196void
1197snreset(struct sn_softc *sc)
1198{
1199 int s;
1200
1201 s = splimp();
1202 snstop(sc);
1203 sninit(sc);
1204
1205 splx(s);
1206}
1207
1208void
1209snwatchdog(struct ifnet *ifp)
1210{
1211 int s;
1212 s = splimp();
1213 sn_intr(ifp->if_softc);
1214 splx(s);
1215}
1216
1217
1218/* 1. zero the interrupt mask
1219 * 2. clear the enable receive flag
1220 * 3. clear the enable xmit flags
1221 */
1222void
1223snstop(struct sn_softc *sc)
1224{
1225
1226 struct ifnet *ifp = &sc->arpcom.ac_if;
1227
1228 /*
1229 * Clear interrupt mask; disable all interrupts.
1230 */
1231 SMC_SELECT_BANK(2);
1232 outb(BASE + INTR_MASK_REG_B, 0x00);
1233
1234 /*
1235 * Disable transmitter and Receiver
1236 */
1237 SMC_SELECT_BANK(0);
1238 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1239 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1240
1241 /*
1242 * Cancel watchdog.
1243 */
1244 ifp->if_timer = 0;
1245}
1246
1247
1248int
1249sn_activate(device_t dev)
1250{
1251 struct sn_softc *sc = device_get_softc(dev);
1252 int err;
1253
1254 sc->port_rid = 0;
1255 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1256 0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1257 if (!sc->port_res) {
1258 if (bootverbose)
1259 device_printf(dev, "Cannot allocate ioport\n");
1260 return ENOMEM;
1261 }
1262
1263 sc->irq_rid = 0;
1264 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
1265 0, ~0, 1, RF_ACTIVE);
1266 if (!sc->irq_res) {
1267 if (bootverbose)
1268 device_printf(dev, "Cannot allocate irq\n");
1269 sn_deactivate(dev);
1270 return ENOMEM;
1271 }
1272 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc,
1273 &sc->intrhand)) != 0) {
1274 sn_deactivate(dev);
1275 return err;
1276 }
1277
1278 sc->sn_io_addr = rman_get_start(sc->port_res);
1279 return (0);
1280}
1281
1282void
1283sn_deactivate(device_t dev)
1284{
1285 struct sn_softc *sc = device_get_softc(dev);
1286
1287 if (sc->intrhand)
1288 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
1289 sc->intrhand = 0;
1290 if (sc->port_res)
1291 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1292 sc->port_res);
1293 sc->port_res = 0;
1294 if (sc->irq_res)
1295 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1296 sc->irq_res);
1297 sc->irq_res = 0;
1298 return;
1299}
1300
1301/*
1302 * Function: sn_probe( device_t dev, int pccard )
1303 *
1304 * Purpose:
1305 * Tests to see if a given ioaddr points to an SMC9xxx chip.
1306 * Tries to cause as little damage as possible if it's not a SMC chip.
1307 * Returns a 0 on success
1308 *
1309 * Algorithm:
1310 * (1) see if the high byte of BANK_SELECT is 0x33
1311 * (2) compare the ioaddr with the base register's address
1312 * (3) see if I recognize the chip ID in the appropriate register
1313 *
1314 *
1315 */
1316int
1317sn_probe(device_t dev, int pccard)
1318{
1319 struct sn_softc *sc = device_get_softc(dev);
1320 u_int bank;
1321 u_short revision_register;
1322 u_short base_address_register;
1323 u_short ioaddr;
1324 int err;
1325
1326 if ((err = sn_activate(dev)) != 0)
1327 return err;
1328
1329 ioaddr = sc->sn_io_addr;
1330#ifdef SN_DEBUG
1331 device_printf(dev, "ioaddr is 0x%x\n", ioaddr);
1332#endif
1333 /*
1334 * First, see if the high byte is 0x33
1335 */
1336 bank = inw(ioaddr + BANK_SELECT_REG_W);
1337 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1338#ifdef SN_DEBUG
1339 device_printf(dev, "test1 failed\n");
1340#endif
1341 goto error;
1342 }
1343 /*
1344 * The above MIGHT indicate a device, but I need to write to further
1345 * test this. Go to bank 0, then test that the register still
1346 * reports the high byte is 0x33.
1347 */
1348 outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1349 bank = inw(ioaddr + BANK_SELECT_REG_W);
1350 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1351#ifdef SN_DEBUG
1352 device_printf(dev, "test2 failed\n");
1353#endif
1354 goto error;
1355 }
1356 /*
1357 * well, we've already written once, so hopefully another time won't
1358 * hurt. This time, I need to switch the bank register to bank 1, so
1359 * I can access the base address register. The contents of the
1360 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1361 * to match the I/O port address where the adapter is being probed.
1362 */
1363 outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1364 base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1365
1366 /*
1367 * This test is nonsence on PC-card architecture, so if
1368 * pccard == 1, skip this test. (hosokawa)
1369 */
1370 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1371
1372 /*
1373 * Well, the base address register didn't match. Must not
1374 * have been a SMC chip after all.
1375 */
1376#ifdef SN_DEBUG
1377 device_printf(dev, "test3 failed ioaddr = 0x%x, "
1378 "base_address_register = 0x%x\n", ioaddr,
1379 base_address_register >> 3 & 0x3E0);
1380#endif
1381 goto error;
1382 }
1383
1384 /*
1385 * Check if the revision register is something that I recognize.
1386 * These might need to be added to later, as future revisions could
1387 * be added.
1388 */
1389 outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1390 revision_register = inw(ioaddr + REVISION_REG_W);
1391 if (!chip_ids[(revision_register >> 4) & 0xF]) {
1392
1393 /*
1394 * I don't regonize this chip, so...
1395 */
1396#ifdef SN_DEBUG
1397 device_printf(dev, "test4 failed\n");
1398#endif
1399 goto error;
1400 }
1401
1402 /*
1403 * at this point I'll assume that the chip is an SMC9xxx. It might be
1404 * prudent to check a listing of MAC addresses against the hardware
1405 * address, or do some other tests.
1406 */
1407 sn_deactivate(dev);
1408 return 0;
1409 error:
1410 sn_deactivate(dev);
1411 return ENXIO;
1412}
1413
1414#define MCFSZ 8
1415
1416static void
1417sn_setmcast(struct sn_softc *sc)
1418{
1419 struct ifnet *ifp = (struct ifnet *)sc;
1420 int flags;
1421
1422 /*
1423 * Set the receiver filter. We want receive enabled and auto strip
1424 * of CRC from received packet. If we are promiscuous then set that
1425 * bit too.
1426 */
1427 flags = RCR_ENABLE | RCR_STRIP_CRC;
1428
1429 if (ifp->if_flags & IFF_PROMISC) {
1430 flags |= RCR_PROMISC | RCR_ALMUL;
1431 } else if (ifp->if_flags & IFF_ALLMULTI) {
1432 flags |= RCR_ALMUL;
1433 } else {
1434 u_char mcf[MCFSZ];
1435 if (sn_getmcf(&sc->arpcom, mcf)) {
1436 /* set filter */
1437 SMC_SELECT_BANK(3);
1438 outw(BASE + MULTICAST1_REG_W,
1439 ((u_short)mcf[1] << 8) | mcf[0]);
1440 outw(BASE + MULTICAST2_REG_W,
1441 ((u_short)mcf[3] << 8) | mcf[2]);
1442 outw(BASE + MULTICAST3_REG_W,
1443 ((u_short)mcf[5] << 8) | mcf[4]);
1444 outw(BASE + MULTICAST4_REG_W,
1445 ((u_short)mcf[7] << 8) | mcf[6]);
1446 } else {
1447 flags |= RCR_ALMUL;
1448 }
1449 }
1450 SMC_SELECT_BANK(0);
1451 outw(BASE + RECV_CONTROL_REG_W, flags);
1452}
1453
1454static int
1455sn_getmcf(struct arpcom *ac, u_char *mcf)
1456{
1457 int i;
1458 register u_int index, index2;
1459 register u_char *af = (u_char *) mcf;
1460 struct ifmultiaddr *ifma;
1461
1462 bzero(mcf, MCFSZ);
1463
32 */
33
34/*
35 * This is a driver for SMC's 9000 series of Ethernet adapters.
36 *
37 * This FreeBSD driver is derived from the smc9194 Linux driver by
38 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
39 * This driver also shamelessly borrows from the FreeBSD ep driver
40 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
41 * All rights reserved.
42 *
43 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
44 * PC. It is adapted from Erik Stahlman's Linux driver which worked
45 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook,
46 * it will work for the entire SMC 9xxx series. (Ha Ha)
47 *
48 * "Features" of the SMC chip:
49 * 4608 byte packet memory. (for the 91C92. Others have more)
50 * EEPROM for configuration
51 * AUI/TP selection
52 *
53 * Authors:
54 * Erik Stahlman erik@vt.edu
55 * Herb Peyerl hpeyerl@novatel.ca
56 * Andres Vega Garcia avega@sophia.inria.fr
57 * Serge Babkin babkin@hq.icb.chel.su
58 * Gardner Buchanan gbuchanan@shl.com
59 *
60 * Sources:
61 * o SMC databook
62 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
63 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
64 *
65 * Known Bugs:
66 * o The hardware multicast filter isn't used yet.
67 * o Setting of the hardware address isn't supported.
68 * o Hardware padding isn't used.
69 */
70
71/*
72 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
73 *
74 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
75 * BSD-nomads, Tokyo, Japan.
76 */
77/*
78 * Multicast support by Kei TANAKA <kei@pal.xerox.com>
79 * Special thanks to itojun@itojun.org
80 */
81#define SN_DEBUG
82
83#include <sys/param.h>
84#include <sys/systm.h>
85#include <sys/errno.h>
86#include <sys/sockio.h>
87#include <sys/mbuf.h>
88#include <sys/socket.h>
89#include <sys/syslog.h>
90
91#include <sys/module.h>
92#include <sys/bus.h>
93
94#include <machine/bus.h>
95#include <machine/resource.h>
96#include <sys/rman.h>
97
98#include <net/ethernet.h>
99#include <net/if.h>
100#include <net/if_arp.h>
101#include <net/if_dl.h>
102#include <net/if_types.h>
103#include <net/if_mib.h>
104
105#ifdef INET
106#include <netinet/in.h>
107#include <netinet/in_systm.h>
108#include <netinet/in_var.h>
109#include <netinet/ip.h>
110#endif
111
112#ifdef NS
113#include <netns/ns.h>
114#include <netns/ns_if.h>
115#endif
116
117#include <net/bpf.h>
118#include <net/bpfdesc.h>
119
120
121#include <dev/sn/if_snreg.h>
122#include <dev/sn/if_snvar.h>
123
124/* Exported variables */
125devclass_t sn_devclass;
126
127static int snioctl(struct ifnet * ifp, u_long, caddr_t);
128
129static void snresume(struct ifnet *);
130
131void sninit(void *);
132void snread(struct ifnet *);
133void snreset(struct sn_softc *);
134void snstart(struct ifnet *);
135void snstop(struct sn_softc *);
136void snwatchdog(struct ifnet *);
137
138static void sn_setmcast(struct sn_softc *);
139static int sn_getmcf(struct arpcom *ac, u_char *mcf);
140static u_int smc_crc(u_char *);
141
142/* I (GB) have been unlucky getting the hardware padding
143 * to work properly.
144 */
145#define SW_PAD
146
147static const char *chip_ids[15] = {
148 NULL, NULL, NULL,
149 /* 3 */ "SMC91C90/91C92",
150 /* 4 */ "SMC91C94",
151 /* 5 */ "SMC91C95",
152 NULL,
153 /* 7 */ "SMC91C100",
154 /* 8 */ "SMC91C100FD",
155 NULL, NULL, NULL,
156 NULL, NULL, NULL
157};
158
159int
160sn_attach(device_t dev)
161{
162 struct sn_softc *sc = device_get_softc(dev);
163 struct ifnet *ifp = &sc->arpcom.ac_if;
164 u_short i;
165 u_char *p;
166 struct ifaddr *ifa;
167 struct sockaddr_dl *sdl;
168 int rev;
169 u_short address;
170 int j;
171
172 sn_activate(dev);
173
174 snstop(sc);
175
176 sc->dev = dev;
177 sc->pages_wanted = -1;
178
179 device_printf(dev, " ");
180
181 SMC_SELECT_BANK(3);
182 rev = inw(BASE + REVISION_REG_W);
183 if (chip_ids[(rev >> 4) & 0xF])
184 printf("%s ", chip_ids[(rev >> 4) & 0xF]);
185
186 SMC_SELECT_BANK(1);
187 i = inw(BASE + CONFIG_REG_W);
188 printf(i & CR_AUI_SELECT ? "AUI" : "UTP");
189
190 if (sc->pccard_enaddr)
191 for (j = 0; j < 3; j++) {
192 u_short w;
193
194 w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
195 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
196 outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
197 }
198
199 /*
200 * Read the station address from the chip. The MAC address is bank 1,
201 * regs 4 - 9
202 */
203 SMC_SELECT_BANK(1);
204 p = (u_char *) & sc->arpcom.ac_enaddr;
205 for (i = 0; i < 6; i += 2) {
206 address = inw(BASE + IAR_ADDR0_REG_W + i);
207 p[i + 1] = address >> 8;
208 p[i] = address & 0xFF;
209 }
210 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":");
211 ifp->if_softc = sc;
212 ifp->if_unit = device_get_unit(dev);
213 ifp->if_name = "sn";
214 ifp->if_mtu = ETHERMTU;
215 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
216 ifp->if_output = ether_output;
217 ifp->if_start = snstart;
218 ifp->if_ioctl = snioctl;
219 ifp->if_watchdog = snwatchdog;
220 ifp->if_init = sninit;
221 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
222 ifp->if_timer = 0;
223
224 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
225
226 /*
227 * Fill the hardware address into ifa_addr if we find an AF_LINK
228 * entry. We need to do this so bpf's can get the hardware addr of
229 * this card. netstat likes this too!
230 */
231 ifa = TAILQ_FIRST(&ifp->if_addrhead);
232 while ((ifa != 0) && (ifa->ifa_addr != 0) &&
233 (ifa->ifa_addr->sa_family != AF_LINK))
234 ifa = TAILQ_NEXT(ifa, ifa_link);
235
236 if ((ifa != 0) && (ifa->ifa_addr != 0)) {
237 sdl = (struct sockaddr_dl *) ifa->ifa_addr;
238 sdl->sdl_type = IFT_ETHER;
239 sdl->sdl_alen = ETHER_ADDR_LEN;
240 sdl->sdl_slen = 0;
241 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN);
242 }
243
244 return 0;
245}
246
247
248int
249sn_detach(device_t dev)
250{
251 struct sn_softc *sc = device_get_softc(dev);
252
253 sc->arpcom.ac_if.if_flags &= ~IFF_RUNNING;
254 ether_ifdetach(&sc->arpcom.ac_if, ETHER_BPF_SUPPORTED);
255 sn_deactivate(dev);
256 return 0;
257}
258
259/*
260 * Reset and initialize the chip
261 */
262void
263sninit(void *xsc)
264{
265 register struct sn_softc *sc = xsc;
266 register struct ifnet *ifp = &sc->arpcom.ac_if;
267 int s;
268 int flags;
269 int mask;
270
271 s = splimp();
272
273 /*
274 * This resets the registers mostly to defaults, but doesn't affect
275 * EEPROM. After the reset cycle, we pause briefly for the chip to
276 * be happy.
277 */
278 SMC_SELECT_BANK(0);
279 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
280 SMC_DELAY();
281 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
282 SMC_DELAY();
283 SMC_DELAY();
284
285 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
286
287 /*
288 * Set the control register to automatically release succesfully
289 * transmitted packets (making the best use out of our limited
290 * memory) and to enable the EPH interrupt on certain TX errors.
291 */
292 SMC_SELECT_BANK(1);
293 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
294 CTR_CR_ENABLE | CTR_LE_ENABLE));
295
296 /* Set squelch level to 240mV (default 480mV) */
297 flags = inw(BASE + CONFIG_REG_W);
298 flags |= CR_SET_SQLCH;
299 outw(BASE + CONFIG_REG_W, flags);
300
301 /*
302 * Reset the MMU and wait for it to be un-busy.
303 */
304 SMC_SELECT_BANK(2);
305 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
306 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
307 ;
308
309 /*
310 * Disable all interrupts
311 */
312 outb(BASE + INTR_MASK_REG_B, 0x00);
313
314 sn_setmcast(sc);
315
316 /*
317 * Set the transmitter control. We want it enabled.
318 */
319 flags = TCR_ENABLE;
320
321#ifndef SW_PAD
322 /*
323 * I (GB) have been unlucky getting this to work.
324 */
325 flags |= TCR_PAD_ENABLE;
326#endif /* SW_PAD */
327
328 outw(BASE + TXMIT_CONTROL_REG_W, flags);
329
330
331 /*
332 * Now, enable interrupts
333 */
334 SMC_SELECT_BANK(2);
335
336 mask = IM_EPH_INT |
337 IM_RX_OVRN_INT |
338 IM_RCV_INT |
339 IM_TX_INT;
340
341 outb(BASE + INTR_MASK_REG_B, mask);
342 sc->intr_mask = mask;
343 sc->pages_wanted = -1;
344
345
346 /*
347 * Mark the interface running but not active.
348 */
349 ifp->if_flags |= IFF_RUNNING;
350 ifp->if_flags &= ~IFF_OACTIVE;
351
352 /*
353 * Attempt to push out any waiting packets.
354 */
355 snstart(ifp);
356
357 splx(s);
358}
359
360
361void
362snstart(struct ifnet *ifp)
363{
364 register struct sn_softc *sc = ifp->if_softc;
365 register u_int len;
366 register struct mbuf *m;
367 struct mbuf *top;
368 int s, pad;
369 int mask;
370 u_short length;
371 u_short numPages;
372 u_char packet_no;
373 int time_out;
374 int junk = 0;
375
376 s = splimp();
377
378 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) {
379 splx(s);
380 return;
381 }
382 if (sc->pages_wanted != -1) {
383 splx(s);
384 printf("sn%d: snstart() while memory allocation pending\n",
385 ifp->if_unit);
386 return;
387 }
388startagain:
389
390 /*
391 * Sneak a peek at the next packet
392 */
393 m = sc->arpcom.ac_if.if_snd.ifq_head;
394 if (m == 0) {
395 splx(s);
396 return;
397 }
398 /*
399 * Compute the frame length and set pad to give an overall even
400 * number of bytes. Below we assume that the packet length is even.
401 */
402 for (len = 0, top = m; m; m = m->m_next)
403 len += m->m_len;
404
405 pad = (len & 1);
406
407 /*
408 * We drop packets that are too large. Perhaps we should truncate
409 * them instead?
410 */
411 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
412 printf("sn%d: large packet discarded (A)\n", ifp->if_unit);
413 ++sc->arpcom.ac_if.if_oerrors;
414 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
415 m_freem(m);
416 goto readcheck;
417 }
418#ifdef SW_PAD
419
420 /*
421 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
422 */
423 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
424 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
425
426#endif /* SW_PAD */
427
428 length = pad + len;
429
430 /*
431 * The MMU wants the number of pages to be the number of 256 byte
432 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
433 * include space for the status word, byte count and control bytes in
434 * the allocation request.
435 */
436 numPages = (length + 6) >> 8;
437
438
439 /*
440 * Now, try to allocate the memory
441 */
442 SMC_SELECT_BANK(2);
443 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
444
445 /*
446 * Wait a short amount of time to see if the allocation request
447 * completes. Otherwise, I enable the interrupt and wait for
448 * completion asyncronously.
449 */
450
451 time_out = MEMORY_WAIT_TIME;
452 do {
453 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
454 break;
455 } while (--time_out);
456
457 if (!time_out || junk > 10) {
458
459 /*
460 * No memory now. Oh well, wait until the chip finds memory
461 * later. Remember how many pages we were asking for and
462 * enable the allocation completion interrupt. Also set a
463 * watchdog in case we miss the interrupt. We mark the
464 * interface active since there is no point in attempting an
465 * snstart() until after the memory is available.
466 */
467 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
468 outb(BASE + INTR_MASK_REG_B, mask);
469 sc->intr_mask = mask;
470
471 sc->arpcom.ac_if.if_timer = 1;
472 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
473 sc->pages_wanted = numPages;
474
475 splx(s);
476 return;
477 }
478 /*
479 * The memory allocation completed. Check the results.
480 */
481 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
482 if (packet_no & ARR_FAILED) {
483 if (junk++ > 10)
484 printf("sn%d: Memory allocation failed\n", ifp->if_unit);
485 goto startagain;
486 }
487 /*
488 * We have a packet number, so tell the card to use it.
489 */
490 outb(BASE + PACKET_NUM_REG_B, packet_no);
491
492 /*
493 * Point to the beginning of the packet
494 */
495 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
496
497 /*
498 * Send the packet length (+6 for status, length and control byte)
499 * and the status word (set to zeros)
500 */
501 outw(BASE + DATA_REG_W, 0);
502 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
503 outb(BASE + DATA_REG_B, (length + 6) >> 8);
504
505 /*
506 * Get the packet from the kernel. This will include the Ethernet
507 * frame header, MAC Addresses etc.
508 */
509 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
510
511 /*
512 * Push out the data to the card.
513 */
514 for (top = m; m != 0; m = m->m_next) {
515
516 /*
517 * Push out words.
518 */
519 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
520
521 /*
522 * Push out remaining byte.
523 */
524 if (m->m_len & 1)
525 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
526 }
527
528 /*
529 * Push out padding.
530 */
531 while (pad > 1) {
532 outw(BASE + DATA_REG_W, 0);
533 pad -= 2;
534 }
535 if (pad)
536 outb(BASE + DATA_REG_B, 0);
537
538 /*
539 * Push out control byte and unused packet byte The control byte is 0
540 * meaning the packet is even lengthed and no special CRC handling is
541 * desired.
542 */
543 outw(BASE + DATA_REG_W, 0);
544
545 /*
546 * Enable the interrupts and let the chipset deal with it Also set a
547 * watchdog in case we miss the interrupt.
548 */
549 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
550 outb(BASE + INTR_MASK_REG_B, mask);
551 sc->intr_mask = mask;
552
553 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
554
555 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
556 sc->arpcom.ac_if.if_timer = 1;
557
558 if (ifp->if_bpf) {
559 bpf_mtap(ifp, top);
560 }
561
562 sc->arpcom.ac_if.if_opackets++;
563 m_freem(top);
564
565
566readcheck:
567
568 /*
569 * Is another packet coming in? We don't want to overflow the tiny
570 * RX FIFO. If nothing has arrived then attempt to queue another
571 * transmit packet.
572 */
573 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
574 goto startagain;
575
576 splx(s);
577 return;
578}
579
580
581
582/* Resume a packet transmit operation after a memory allocation
583 * has completed.
584 *
585 * This is basically a hacked up copy of snstart() which handles
586 * a completed memory allocation the same way snstart() does.
587 * It then passes control to snstart to handle any other queued
588 * packets.
589 */
590static void
591snresume(struct ifnet *ifp)
592{
593 register struct sn_softc *sc = ifp->if_softc;
594 register u_int len;
595 register struct mbuf *m;
596 struct mbuf *top;
597 int pad;
598 int mask;
599 u_short length;
600 u_short numPages;
601 u_short pages_wanted;
602 u_char packet_no;
603
604 if (sc->pages_wanted < 0)
605 return;
606
607 pages_wanted = sc->pages_wanted;
608 sc->pages_wanted = -1;
609
610 /*
611 * Sneak a peek at the next packet
612 */
613 m = sc->arpcom.ac_if.if_snd.ifq_head;
614 if (m == 0) {
615 printf("sn%d: snresume() with nothing to send\n", ifp->if_unit);
616 return;
617 }
618 /*
619 * Compute the frame length and set pad to give an overall even
620 * number of bytes. Below we assume that the packet length is even.
621 */
622 for (len = 0, top = m; m; m = m->m_next)
623 len += m->m_len;
624
625 pad = (len & 1);
626
627 /*
628 * We drop packets that are too large. Perhaps we should truncate
629 * them instead?
630 */
631 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
632 printf("sn%d: large packet discarded (B)\n", ifp->if_unit);
633 ++sc->arpcom.ac_if.if_oerrors;
634 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
635 m_freem(m);
636 return;
637 }
638#ifdef SW_PAD
639
640 /*
641 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
642 */
643 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
644 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
645
646#endif /* SW_PAD */
647
648 length = pad + len;
649
650
651 /*
652 * The MMU wants the number of pages to be the number of 256 byte
653 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
654 * include space for the status word, byte count and control bytes in
655 * the allocation request.
656 */
657 numPages = (length + 6) >> 8;
658
659
660 SMC_SELECT_BANK(2);
661
662 /*
663 * The memory allocation completed. Check the results. If it failed,
664 * we simply set a watchdog timer and hope for the best.
665 */
666 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
667 if (packet_no & ARR_FAILED) {
668 printf("sn%d: Memory allocation failed. Weird.\n", ifp->if_unit);
669 sc->arpcom.ac_if.if_timer = 1;
670 goto try_start;
671 }
672 /*
673 * We have a packet number, so tell the card to use it.
674 */
675 outb(BASE + PACKET_NUM_REG_B, packet_no);
676
677 /*
678 * Now, numPages should match the pages_wanted recorded when the
679 * memory allocation was initiated.
680 */
681 if (pages_wanted != numPages) {
682 printf("sn%d: memory allocation wrong size. Weird.\n", ifp->if_unit);
683 /*
684 * If the allocation was the wrong size we simply release the
685 * memory once it is granted. Wait for the MMU to be un-busy.
686 */
687 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
688 ;
689 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
690
691 return;
692 }
693 /*
694 * Point to the beginning of the packet
695 */
696 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
697
698 /*
699 * Send the packet length (+6 for status, length and control byte)
700 * and the status word (set to zeros)
701 */
702 outw(BASE + DATA_REG_W, 0);
703 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
704 outb(BASE + DATA_REG_B, (length + 6) >> 8);
705
706 /*
707 * Get the packet from the kernel. This will include the Ethernet
708 * frame header, MAC Addresses etc.
709 */
710 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
711
712 /*
713 * Push out the data to the card.
714 */
715 for (top = m; m != 0; m = m->m_next) {
716
717 /*
718 * Push out words.
719 */
720 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
721
722 /*
723 * Push out remaining byte.
724 */
725 if (m->m_len & 1)
726 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
727 }
728
729 /*
730 * Push out padding.
731 */
732 while (pad > 1) {
733 outw(BASE + DATA_REG_W, 0);
734 pad -= 2;
735 }
736 if (pad)
737 outb(BASE + DATA_REG_B, 0);
738
739 /*
740 * Push out control byte and unused packet byte The control byte is 0
741 * meaning the packet is even lengthed and no special CRC handling is
742 * desired.
743 */
744 outw(BASE + DATA_REG_W, 0);
745
746 /*
747 * Enable the interrupts and let the chipset deal with it Also set a
748 * watchdog in case we miss the interrupt.
749 */
750 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
751 outb(BASE + INTR_MASK_REG_B, mask);
752 sc->intr_mask = mask;
753 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
754
755 if (ifp->if_bpf) {
756 bpf_mtap(ifp, top);
757 }
758
759 sc->arpcom.ac_if.if_opackets++;
760 m_freem(top);
761
762try_start:
763
764 /*
765 * Now pass control to snstart() to queue any additional packets
766 */
767 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
768 snstart(ifp);
769
770 /*
771 * We've sent something, so we're active. Set a watchdog in case the
772 * TX_EMPTY interrupt is lost.
773 */
774 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
775 sc->arpcom.ac_if.if_timer = 1;
776
777 return;
778}
779
780
781void
782sn_intr(void *arg)
783{
784 int status, interrupts;
785 register struct sn_softc *sc = (struct sn_softc *) arg;
786 struct ifnet *ifp = &sc->arpcom.ac_if;
787 int x;
788
789 /*
790 * Chip state registers
791 */
792 u_char mask;
793 u_char packet_no;
794 u_short tx_status;
795 u_short card_stats;
796
797 /*
798 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder...
799 */
800 x = splbio();
801
802 /*
803 * Clear the watchdog.
804 */
805 ifp->if_timer = 0;
806
807 SMC_SELECT_BANK(2);
808
809 /*
810 * Obtain the current interrupt mask and clear the hardware mask
811 * while servicing interrupts.
812 */
813 mask = inb(BASE + INTR_MASK_REG_B);
814 outb(BASE + INTR_MASK_REG_B, 0x00);
815
816 /*
817 * Get the set of interrupts which occurred and eliminate any which
818 * are masked.
819 */
820 interrupts = inb(BASE + INTR_STAT_REG_B);
821 status = interrupts & mask;
822
823 /*
824 * Now, process each of the interrupt types.
825 */
826
827 /*
828 * Receive Overrun.
829 */
830 if (status & IM_RX_OVRN_INT) {
831
832 /*
833 * Acknowlege Interrupt
834 */
835 SMC_SELECT_BANK(2);
836 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
837
838 ++sc->arpcom.ac_if.if_ierrors;
839 }
840 /*
841 * Got a packet.
842 */
843 if (status & IM_RCV_INT) {
844#if 1
845 int packet_number;
846
847 SMC_SELECT_BANK(2);
848 packet_number = inw(BASE + FIFO_PORTS_REG_W);
849
850 if (packet_number & FIFO_REMPTY) {
851
852 /*
853 * we got called , but nothing was on the FIFO
854 */
855 printf("sn: Receive interrupt with nothing on FIFO\n");
856
857 goto out;
858 }
859#endif
860 snread(ifp);
861 }
862 /*
863 * An on-card memory allocation came through.
864 */
865 if (status & IM_ALLOC_INT) {
866
867 /*
868 * Disable this interrupt.
869 */
870 mask &= ~IM_ALLOC_INT;
871 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
872 snresume(&sc->arpcom.ac_if);
873 }
874 /*
875 * TX Completion. Handle a transmit error message. This will only be
876 * called when there is an error, because of the AUTO_RELEASE mode.
877 */
878 if (status & IM_TX_INT) {
879
880 /*
881 * Acknowlege Interrupt
882 */
883 SMC_SELECT_BANK(2);
884 outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
885
886 packet_no = inw(BASE + FIFO_PORTS_REG_W);
887 packet_no &= FIFO_TX_MASK;
888
889 /*
890 * select this as the packet to read from
891 */
892 outb(BASE + PACKET_NUM_REG_B, packet_no);
893
894 /*
895 * Position the pointer to the first word from this packet
896 */
897 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
898
899 /*
900 * Fetch the TX status word. The value found here will be a
901 * copy of the EPH_STATUS_REG_W at the time the transmit
902 * failed.
903 */
904 tx_status = inw(BASE + DATA_REG_W);
905
906 if (tx_status & EPHSR_TX_SUC) {
907 device_printf(sc->dev,
908 "Successful packet caused interrupt\n");
909 } else {
910 ++sc->arpcom.ac_if.if_oerrors;
911 }
912
913 if (tx_status & EPHSR_LATCOL)
914 ++sc->arpcom.ac_if.if_collisions;
915
916 /*
917 * Some of these errors will have disabled transmit.
918 * Re-enable transmit now.
919 */
920 SMC_SELECT_BANK(0);
921
922#ifdef SW_PAD
923 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
924#else
925 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
926#endif /* SW_PAD */
927
928 /*
929 * kill the failed packet. Wait for the MMU to be un-busy.
930 */
931 SMC_SELECT_BANK(2);
932 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
933 ;
934 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
935
936 /*
937 * Attempt to queue more transmits.
938 */
939 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
940 snstart(&sc->arpcom.ac_if);
941 }
942 /*
943 * Transmit underrun. We use this opportunity to update transmit
944 * statistics from the card.
945 */
946 if (status & IM_TX_EMPTY_INT) {
947
948 /*
949 * Acknowlege Interrupt
950 */
951 SMC_SELECT_BANK(2);
952 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
953
954 /*
955 * Disable this interrupt.
956 */
957 mask &= ~IM_TX_EMPTY_INT;
958
959 SMC_SELECT_BANK(0);
960 card_stats = inw(BASE + COUNTER_REG_W);
961
962 /*
963 * Single collisions
964 */
965 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
966
967 /*
968 * Multiple collisions
969 */
970 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
971
972 SMC_SELECT_BANK(2);
973
974 /*
975 * Attempt to enqueue some more stuff.
976 */
977 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
978 snstart(&sc->arpcom.ac_if);
979 }
980 /*
981 * Some other error. Try to fix it by resetting the adapter.
982 */
983 if (status & IM_EPH_INT) {
984 snstop(sc);
985 sninit(sc);
986 }
987
988out:
989 /*
990 * Handled all interrupt sources.
991 */
992
993 SMC_SELECT_BANK(2);
994
995 /*
996 * Reestablish interrupts from mask which have not been deselected
997 * during this interrupt. Note that the hardware mask, which was set
998 * to 0x00 at the start of this service routine, may have been
999 * updated by one or more of the interrupt handers and we must let
1000 * those new interrupts stay enabled here.
1001 */
1002 mask |= inb(BASE + INTR_MASK_REG_B);
1003 outb(BASE + INTR_MASK_REG_B, mask);
1004 sc->intr_mask = mask;
1005
1006 splx(x);
1007}
1008
1009void
1010snread(register struct ifnet *ifp)
1011{
1012 struct sn_softc *sc = ifp->if_softc;
1013 struct ether_header *eh;
1014 struct mbuf *m;
1015 short status;
1016 int packet_number;
1017 u_short packet_length;
1018 u_char *data;
1019
1020 SMC_SELECT_BANK(2);
1021#if 0
1022 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1023
1024 if (packet_number & FIFO_REMPTY) {
1025
1026 /*
1027 * we got called , but nothing was on the FIFO
1028 */
1029 printf("sn: Receive interrupt with nothing on FIFO\n");
1030 return;
1031 }
1032#endif
1033read_another:
1034
1035 /*
1036 * Start reading from the start of the packet. Since PTR_RCV is set,
1037 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
1038 */
1039 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
1040
1041 /*
1042 * First two words are status and packet_length
1043 */
1044 status = inw(BASE + DATA_REG_W);
1045 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
1046
1047 /*
1048 * The packet length contains 3 extra words: status, length, and a
1049 * extra word with the control byte.
1050 */
1051 packet_length -= 6;
1052
1053 /*
1054 * Account for receive errors and discard.
1055 */
1056 if (status & RS_ERRORS) {
1057 ++sc->arpcom.ac_if.if_ierrors;
1058 goto out;
1059 }
1060 /*
1061 * A packet is received.
1062 */
1063
1064 /*
1065 * Adjust for odd-length packet.
1066 */
1067 if (status & RS_ODDFRAME)
1068 packet_length++;
1069
1070 /*
1071 * Allocate a header mbuf from the kernel.
1072 */
1073 MGETHDR(m, M_DONTWAIT, MT_DATA);
1074 if (m == NULL)
1075 goto out;
1076
1077 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
1078 m->m_pkthdr.len = m->m_len = packet_length;
1079
1080 /*
1081 * Attach an mbuf cluster
1082 */
1083 MCLGET(m, M_DONTWAIT);
1084
1085 /*
1086 * Insist on getting a cluster
1087 */
1088 if ((m->m_flags & M_EXT) == 0) {
1089 m_freem(m);
1090 ++sc->arpcom.ac_if.if_ierrors;
1091 printf("sn: snread() kernel memory allocation problem\n");
1092 goto out;
1093 }
1094 eh = mtod(m, struct ether_header *);
1095
1096 /*
1097 * Get packet, including link layer address, from interface.
1098 */
1099
1100 data = (u_char *) eh;
1101 insw(BASE + DATA_REG_W, data, packet_length >> 1);
1102 if (packet_length & 1) {
1103 data += packet_length & ~1;
1104 *data = inb(BASE + DATA_REG_B);
1105 }
1106 ++sc->arpcom.ac_if.if_ipackets;
1107
1108 /*
1109 * Remove link layer addresses and whatnot.
1110 */
1111 m->m_pkthdr.len = m->m_len = packet_length - sizeof(struct ether_header);
1112 m->m_data += sizeof(struct ether_header);
1113
1114 ether_input(&sc->arpcom.ac_if, eh, m);
1115
1116out:
1117
1118 /*
1119 * Error or good, tell the card to get rid of this packet Wait for
1120 * the MMU to be un-busy.
1121 */
1122 SMC_SELECT_BANK(2);
1123 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
1124 ;
1125 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1126
1127 /*
1128 * Check whether another packet is ready
1129 */
1130 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1131 if (packet_number & FIFO_REMPTY) {
1132 return;
1133 }
1134 goto read_another;
1135}
1136
1137
1138/*
1139 * Handle IOCTLS. This function is completely stolen from if_ep.c
1140 * As with its progenitor, it does not handle hardware address
1141 * changes.
1142 */
1143static int
1144snioctl(register struct ifnet *ifp, u_long cmd, caddr_t data)
1145{
1146 struct sn_softc *sc = ifp->if_softc;
1147 int s, error = 0;
1148
1149 s = splimp();
1150
1151 switch (cmd) {
1152 case SIOCSIFADDR:
1153 case SIOCGIFADDR:
1154 case SIOCSIFMTU:
1155 error = ether_ioctl(ifp, cmd, data);
1156 break;
1157
1158 case SIOCSIFFLAGS:
1159 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1160 ifp->if_flags &= ~IFF_RUNNING;
1161 snstop(sc);
1162 break;
1163 } else {
1164 /* reinitialize card on any parameter change */
1165 sninit(sc);
1166 break;
1167 }
1168 break;
1169
1170#ifdef notdef
1171 case SIOCGHWADDR:
1172 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1173 sizeof(sc->sc_addr));
1174 break;
1175#endif
1176
1177 case SIOCADDMULTI:
1178 /* update multicast filter list. */
1179 sn_setmcast(sc);
1180 error = 0;
1181 break;
1182 case SIOCDELMULTI:
1183 /* update multicast filter list. */
1184 sn_setmcast(sc);
1185 error = 0;
1186 break;
1187 default:
1188 error = EINVAL;
1189 }
1190
1191 splx(s);
1192
1193 return (error);
1194}
1195
1196void
1197snreset(struct sn_softc *sc)
1198{
1199 int s;
1200
1201 s = splimp();
1202 snstop(sc);
1203 sninit(sc);
1204
1205 splx(s);
1206}
1207
1208void
1209snwatchdog(struct ifnet *ifp)
1210{
1211 int s;
1212 s = splimp();
1213 sn_intr(ifp->if_softc);
1214 splx(s);
1215}
1216
1217
1218/* 1. zero the interrupt mask
1219 * 2. clear the enable receive flag
1220 * 3. clear the enable xmit flags
1221 */
1222void
1223snstop(struct sn_softc *sc)
1224{
1225
1226 struct ifnet *ifp = &sc->arpcom.ac_if;
1227
1228 /*
1229 * Clear interrupt mask; disable all interrupts.
1230 */
1231 SMC_SELECT_BANK(2);
1232 outb(BASE + INTR_MASK_REG_B, 0x00);
1233
1234 /*
1235 * Disable transmitter and Receiver
1236 */
1237 SMC_SELECT_BANK(0);
1238 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1239 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1240
1241 /*
1242 * Cancel watchdog.
1243 */
1244 ifp->if_timer = 0;
1245}
1246
1247
1248int
1249sn_activate(device_t dev)
1250{
1251 struct sn_softc *sc = device_get_softc(dev);
1252 int err;
1253
1254 sc->port_rid = 0;
1255 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1256 0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1257 if (!sc->port_res) {
1258 if (bootverbose)
1259 device_printf(dev, "Cannot allocate ioport\n");
1260 return ENOMEM;
1261 }
1262
1263 sc->irq_rid = 0;
1264 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
1265 0, ~0, 1, RF_ACTIVE);
1266 if (!sc->irq_res) {
1267 if (bootverbose)
1268 device_printf(dev, "Cannot allocate irq\n");
1269 sn_deactivate(dev);
1270 return ENOMEM;
1271 }
1272 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc,
1273 &sc->intrhand)) != 0) {
1274 sn_deactivate(dev);
1275 return err;
1276 }
1277
1278 sc->sn_io_addr = rman_get_start(sc->port_res);
1279 return (0);
1280}
1281
1282void
1283sn_deactivate(device_t dev)
1284{
1285 struct sn_softc *sc = device_get_softc(dev);
1286
1287 if (sc->intrhand)
1288 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
1289 sc->intrhand = 0;
1290 if (sc->port_res)
1291 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1292 sc->port_res);
1293 sc->port_res = 0;
1294 if (sc->irq_res)
1295 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1296 sc->irq_res);
1297 sc->irq_res = 0;
1298 return;
1299}
1300
1301/*
1302 * Function: sn_probe( device_t dev, int pccard )
1303 *
1304 * Purpose:
1305 * Tests to see if a given ioaddr points to an SMC9xxx chip.
1306 * Tries to cause as little damage as possible if it's not a SMC chip.
1307 * Returns a 0 on success
1308 *
1309 * Algorithm:
1310 * (1) see if the high byte of BANK_SELECT is 0x33
1311 * (2) compare the ioaddr with the base register's address
1312 * (3) see if I recognize the chip ID in the appropriate register
1313 *
1314 *
1315 */
1316int
1317sn_probe(device_t dev, int pccard)
1318{
1319 struct sn_softc *sc = device_get_softc(dev);
1320 u_int bank;
1321 u_short revision_register;
1322 u_short base_address_register;
1323 u_short ioaddr;
1324 int err;
1325
1326 if ((err = sn_activate(dev)) != 0)
1327 return err;
1328
1329 ioaddr = sc->sn_io_addr;
1330#ifdef SN_DEBUG
1331 device_printf(dev, "ioaddr is 0x%x\n", ioaddr);
1332#endif
1333 /*
1334 * First, see if the high byte is 0x33
1335 */
1336 bank = inw(ioaddr + BANK_SELECT_REG_W);
1337 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1338#ifdef SN_DEBUG
1339 device_printf(dev, "test1 failed\n");
1340#endif
1341 goto error;
1342 }
1343 /*
1344 * The above MIGHT indicate a device, but I need to write to further
1345 * test this. Go to bank 0, then test that the register still
1346 * reports the high byte is 0x33.
1347 */
1348 outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1349 bank = inw(ioaddr + BANK_SELECT_REG_W);
1350 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1351#ifdef SN_DEBUG
1352 device_printf(dev, "test2 failed\n");
1353#endif
1354 goto error;
1355 }
1356 /*
1357 * well, we've already written once, so hopefully another time won't
1358 * hurt. This time, I need to switch the bank register to bank 1, so
1359 * I can access the base address register. The contents of the
1360 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1361 * to match the I/O port address where the adapter is being probed.
1362 */
1363 outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1364 base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1365
1366 /*
1367 * This test is nonsence on PC-card architecture, so if
1368 * pccard == 1, skip this test. (hosokawa)
1369 */
1370 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1371
1372 /*
1373 * Well, the base address register didn't match. Must not
1374 * have been a SMC chip after all.
1375 */
1376#ifdef SN_DEBUG
1377 device_printf(dev, "test3 failed ioaddr = 0x%x, "
1378 "base_address_register = 0x%x\n", ioaddr,
1379 base_address_register >> 3 & 0x3E0);
1380#endif
1381 goto error;
1382 }
1383
1384 /*
1385 * Check if the revision register is something that I recognize.
1386 * These might need to be added to later, as future revisions could
1387 * be added.
1388 */
1389 outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1390 revision_register = inw(ioaddr + REVISION_REG_W);
1391 if (!chip_ids[(revision_register >> 4) & 0xF]) {
1392
1393 /*
1394 * I don't regonize this chip, so...
1395 */
1396#ifdef SN_DEBUG
1397 device_printf(dev, "test4 failed\n");
1398#endif
1399 goto error;
1400 }
1401
1402 /*
1403 * at this point I'll assume that the chip is an SMC9xxx. It might be
1404 * prudent to check a listing of MAC addresses against the hardware
1405 * address, or do some other tests.
1406 */
1407 sn_deactivate(dev);
1408 return 0;
1409 error:
1410 sn_deactivate(dev);
1411 return ENXIO;
1412}
1413
1414#define MCFSZ 8
1415
1416static void
1417sn_setmcast(struct sn_softc *sc)
1418{
1419 struct ifnet *ifp = (struct ifnet *)sc;
1420 int flags;
1421
1422 /*
1423 * Set the receiver filter. We want receive enabled and auto strip
1424 * of CRC from received packet. If we are promiscuous then set that
1425 * bit too.
1426 */
1427 flags = RCR_ENABLE | RCR_STRIP_CRC;
1428
1429 if (ifp->if_flags & IFF_PROMISC) {
1430 flags |= RCR_PROMISC | RCR_ALMUL;
1431 } else if (ifp->if_flags & IFF_ALLMULTI) {
1432 flags |= RCR_ALMUL;
1433 } else {
1434 u_char mcf[MCFSZ];
1435 if (sn_getmcf(&sc->arpcom, mcf)) {
1436 /* set filter */
1437 SMC_SELECT_BANK(3);
1438 outw(BASE + MULTICAST1_REG_W,
1439 ((u_short)mcf[1] << 8) | mcf[0]);
1440 outw(BASE + MULTICAST2_REG_W,
1441 ((u_short)mcf[3] << 8) | mcf[2]);
1442 outw(BASE + MULTICAST3_REG_W,
1443 ((u_short)mcf[5] << 8) | mcf[4]);
1444 outw(BASE + MULTICAST4_REG_W,
1445 ((u_short)mcf[7] << 8) | mcf[6]);
1446 } else {
1447 flags |= RCR_ALMUL;
1448 }
1449 }
1450 SMC_SELECT_BANK(0);
1451 outw(BASE + RECV_CONTROL_REG_W, flags);
1452}
1453
1454static int
1455sn_getmcf(struct arpcom *ac, u_char *mcf)
1456{
1457 int i;
1458 register u_int index, index2;
1459 register u_char *af = (u_char *) mcf;
1460 struct ifmultiaddr *ifma;
1461
1462 bzero(mcf, MCFSZ);
1463
1464 LIST_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) {
1464 TAILQ_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) {
1465 if (ifma->ifma_addr->sa_family != AF_LINK)
1466 return 0;
1467 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1468 index2 = 0;
1469 for (i = 0; i < 6; i++) {
1470 index2 <<= 1;
1471 index2 |= (index & 0x01);
1472 index >>= 1;
1473 }
1474 af[index2 >> 3] |= 1 << (index2 & 7);
1475 }
1476 return 1; /* use multicast filter */
1477}
1478
1479static u_int
1480smc_crc(u_char *s)
1481{
1482 int perByte;
1483 int perBit;
1484 const u_int poly = 0xedb88320;
1485 u_int v = 0xffffffff;
1486 u_char c;
1487
1488 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1489 c = s[perByte];
1490 for (perBit = 0; perBit < 8; perBit++) {
1491 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);
1492 c >>= 1;
1493 }
1494 }
1495 return v;
1496}
1465 if (ifma->ifma_addr->sa_family != AF_LINK)
1466 return 0;
1467 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1468 index2 = 0;
1469 for (i = 0; i < 6; i++) {
1470 index2 <<= 1;
1471 index2 |= (index & 0x01);
1472 index >>= 1;
1473 }
1474 af[index2 >> 3] |= 1 << (index2 & 7);
1475 }
1476 return 1; /* use multicast filter */
1477}
1478
1479static u_int
1480smc_crc(u_char *s)
1481{
1482 int perByte;
1483 int perBit;
1484 const u_int poly = 0xedb88320;
1485 u_int v = 0xffffffff;
1486 u_char c;
1487
1488 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1489 c = s[perByte];
1490 for (perBit = 0; perBit < 8; perBit++) {
1491 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);
1492 c >>= 1;
1493 }
1494 }
1495 return v;
1496}