133};
134
135static int si_Nports;
136static int si_Nmodules;
137static int si_debug = 0; /* data, not bss, so it's patchable */
138
139SYSCTL_INT(_machdep, OID_AUTO, si_debug, CTLFLAG_RW, &si_debug, 0, "");
140TUNABLE_INT("machdep.si_debug", &si_debug);
141
142static int si_numunits;
143
144devclass_t si_devclass;
145
146#ifndef B2000 /* not standard, but the hardware knows it. */
147# define B2000 2000
148#endif
149static struct speedtab bdrates[] = {
150 { B75, CLK75, }, /* 0x0 */
151 { B110, CLK110, }, /* 0x1 */
152 { B150, CLK150, }, /* 0x3 */
153 { B300, CLK300, }, /* 0x4 */
154 { B600, CLK600, }, /* 0x5 */
155 { B1200, CLK1200, }, /* 0x6 */
156 { B2000, CLK2000, }, /* 0x7 */
157 { B2400, CLK2400, }, /* 0x8 */
158 { B4800, CLK4800, }, /* 0x9 */
159 { B9600, CLK9600, }, /* 0xb */
160 { B19200, CLK19200, }, /* 0xc */
161 { B38400, CLK38400, }, /* 0x2 (out of order!) */
162 { B57600, CLK57600, }, /* 0xd */
163 { B115200, CLK110, }, /* 0x1 (dupe!, 110 baud on "si") */
164 { -1, -1 },
165};
166
167
168/* populated with approx character/sec rates - translated at card
169 * initialisation time to chars per tick of the clock */
170static int done_chartimes = 0;
171static struct speedtab chartimes[] = {
172 { B75, 8, },
173 { B110, 11, },
174 { B150, 15, },
175 { B300, 30, },
176 { B600, 60, },
177 { B1200, 120, },
178 { B2000, 200, },
179 { B2400, 240, },
180 { B4800, 480, },
181 { B9600, 960, },
182 { B19200, 1920, },
183 { B38400, 3840, },
184 { B57600, 5760, },
185 { B115200, 11520, },
186 { -1, -1 },
187};
188static volatile int in_intr = 0; /* Inside interrupt handler? */
189
190#ifdef POLL
191static int si_pollrate; /* in addition to irq */
192static int si_realpoll = 0; /* poll HW on timer */
193
194SYSCTL_INT(_machdep, OID_AUTO, si_pollrate, CTLFLAG_RW, &si_pollrate, 0, "");
195SYSCTL_INT(_machdep, OID_AUTO, si_realpoll, CTLFLAG_RW, &si_realpoll, 0, "");
196
197static int init_finished = 0;
198static void si_poll(void *);
199#endif
200
201/*
202 * Array of adapter types and the corresponding RAM size. The order of
203 * entries here MUST match the ordinal of the adapter type.
204 */
205static char *si_type[] = {
206 "EMPTY",
207 "SIHOST",
208 "SIMCA", /* FreeBSD does not support Microchannel */
209 "SIHOST2",
210 "SIEISA",
211 "SIPCI",
212 "SXPCI",
213 "SXISA",
214};
215
216/*
217 * We have to make an 8 bit version of bcopy, since some cards can't
218 * deal with 32 bit I/O
219 */
220static void __inline
221si_bcopy(const void *src, void *dst, size_t len)
222{
223 while (len--)
224 *(((u_char *)dst)++) = *(((const u_char *)src)++);
225}
226static void __inline
227si_vbcopy(const volatile void *src, void *dst, size_t len)
228{
229 while (len--)
230 *(((u_char *)dst)++) = *(((const volatile u_char *)src)++);
231}
232static void __inline
233si_bcopyv(const void *src, volatile void *dst, size_t len)
234{
235 while (len--)
236 *(((volatile u_char *)dst)++) = *(((const u_char *)src)++);
237}
238
239
240/*
241 * Attach the device. Initialize the card.
242 */
243int
244siattach(device_t dev)
245{
246 int unit;
247 struct si_softc *sc;
248 struct si_port *pp;
249 volatile struct si_channel *ccbp;
250 volatile struct si_reg *regp;
251 volatile caddr_t maddr;
252 struct si_module *modp;
253 struct speedtab *spt;
254 int nmodule, nport, x, y;
255 int uart_type;
256
257 sc = device_get_softc(dev);
258 unit = device_get_unit(dev);
259
260 sc->sc_typename = si_type[sc->sc_type];
261 if (si_numunits < unit + 1)
262 si_numunits = unit + 1;
263
264 DPRINT((0, DBG_AUTOBOOT, "si%d: siattach\n", unit));
265
266#ifdef POLL
267 if (si_pollrate == 0) {
268 si_pollrate = POLLHZ; /* in addition to irq */
269#ifdef REALPOLL
270 si_realpoll = 1; /* scan always */
271#endif
272 }
273#endif
274
275 DPRINT((0, DBG_AUTOBOOT, "si%d: type: %s paddr: %x maddr: %x\n", unit,
276 sc->sc_typename, sc->sc_paddr, sc->sc_maddr));
277
278 sc->sc_ports = NULL; /* mark as uninitialised */
279
280 maddr = sc->sc_maddr;
281
282 /* Stop the CPU first so it won't stomp around while we load */
283
284 switch (sc->sc_type) {
285 case SIEISA:
286 outb(sc->sc_iobase + 2, sc->sc_irq << 4);
287 break;
288 case SIPCI:
289 *(maddr+SIPCIRESET) = 0;
290 break;
291 case SIJETPCI: /* fall through to JET ISA */
292 case SIJETISA:
293 *(maddr+SIJETCONFIG) = 0;
294 break;
295 case SIHOST2:
296 *(maddr+SIPLRESET) = 0;
297 break;
298 case SIHOST:
299 *(maddr+SIRESET) = 0;
300 break;
301 default: /* this should never happen */
302 printf("si%d: unsupported configuration\n", unit);
303 return EINVAL;
304 break;
305 }
306
307 /* OK, now lets download the download code */
308
309 if (SI_ISJET(sc->sc_type)) {
310 DPRINT((0, DBG_DOWNLOAD, "si%d: jet_download: nbytes %d\n",
311 unit, si3_t225_dsize));
312 si_bcopy(si3_t225_download, maddr + si3_t225_downloadaddr,
313 si3_t225_dsize);
314 DPRINT((0, DBG_DOWNLOAD,
315 "si%d: jet_bootstrap: nbytes %d -> %x\n",
316 unit, si3_t225_bsize, si3_t225_bootloadaddr));
317 si_bcopy(si3_t225_bootstrap, maddr + si3_t225_bootloadaddr,
318 si3_t225_bsize);
319 } else {
320 DPRINT((0, DBG_DOWNLOAD, "si%d: si_download: nbytes %d\n",
321 unit, si2_z280_dsize));
322 si_bcopy(si2_z280_download, maddr + si2_z280_downloadaddr,
323 si2_z280_dsize);
324 }
325
326 /* Now start the CPU */
327
328 switch (sc->sc_type) {
329 case SIEISA:
330 /* modify the download code to tell it that it's on an EISA */
331 *(maddr + 0x42) = 1;
332 outb(sc->sc_iobase + 2, (sc->sc_irq << 4) | 4);
333 (void)inb(sc->sc_iobase + 3); /* reset interrupt */
334 break;
335 case SIPCI:
336 /* modify the download code to tell it that it's on a PCI */
337 *(maddr+0x42) = 1;
338 *(maddr+SIPCIRESET) = 1;
339 *(maddr+SIPCIINTCL) = 0;
340 break;
341 case SIJETPCI:
342 *(maddr+SIJETRESET) = 0;
343 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN;
344 break;
345 case SIJETISA:
346 *(maddr+SIJETRESET) = 0;
347 switch (sc->sc_irq) {
348 case 9:
349 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0x90;
350 break;
351 case 10:
352 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xa0;
353 break;
354 case 11:
355 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xb0;
356 break;
357 case 12:
358 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xc0;
359 break;
360 case 15:
361 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xf0;
362 break;
363 }
364 break;
365 case SIHOST:
366 *(maddr+SIRESET_CL) = 0;
367 *(maddr+SIINTCL_CL) = 0;
368 break;
369 case SIHOST2:
370 *(maddr+SIPLRESET) = 0x10;
371 switch (sc->sc_irq) {
372 case 11:
373 *(maddr+SIPLIRQ11) = 0x10;
374 break;
375 case 12:
376 *(maddr+SIPLIRQ12) = 0x10;
377 break;
378 case 15:
379 *(maddr+SIPLIRQ15) = 0x10;
380 break;
381 }
382 *(maddr+SIPLIRQCLR) = 0x10;
383 break;
384 default: /* this should _REALLY_ never happen */
385 printf("si%d: Uh, it was supported a second ago...\n", unit);
386 return EINVAL;
387 }
388
389 DELAY(1000000); /* wait around for a second */
390
391 regp = (struct si_reg *)maddr;
392 y = 0;
393 /* wait max of 5 sec for init OK */
394 while (regp->initstat == 0 && y++ < 10) {
395 DELAY(500000);
396 }
397 switch (regp->initstat) {
398 case 0:
399 printf("si%d: startup timeout - aborting\n", unit);
400 sc->sc_type = SIEMPTY;
401 return EINVAL;
402 case 1:
403 if (SI_ISJET(sc->sc_type)) {
404 /* set throttle to 100 times per second */
405 regp->int_count = JET_INT_COUNT;
406 /* rx_intr_count is a NOP in Jet */
407 } else {
408 /* set throttle to 125 times per second */
409 regp->int_count = INT_COUNT;
410 /* rx intr max of 25 times per second */
411 regp->rx_int_count = RXINT_COUNT;
412 }
413 regp->int_pending = 0; /* no intr pending */
414 regp->int_scounter = 0; /* reset counter */
415 break;
416 case 0xff:
417 /*
418 * No modules found, so give up on this one.
419 */
420 printf("si%d: %s - no ports found\n", unit,
421 si_type[sc->sc_type]);
422 return 0;
423 default:
424 printf("si%d: download code version error - initstat %x\n",
425 unit, regp->initstat);
426 return EINVAL;
427 }
428
429 /*
430 * First time around the ports just count them in order
431 * to allocate some memory.
432 */
433 nport = 0;
434 modp = (struct si_module *)(maddr + 0x80);
435 for (;;) {
436 DPRINT((0, DBG_DOWNLOAD, "si%d: ccb addr 0x%x\n", unit, modp));
437 switch (modp->sm_type) {
438 case TA4:
439 DPRINT((0, DBG_DOWNLOAD,
440 "si%d: Found old TA4 module, 4 ports\n",
441 unit));
442 x = 4;
443 break;
444 case TA8:
445 DPRINT((0, DBG_DOWNLOAD,
446 "si%d: Found old TA8 module, 8 ports\n",
447 unit));
448 x = 8;
449 break;
450 case TA4_ASIC:
451 DPRINT((0, DBG_DOWNLOAD,
452 "si%d: Found ASIC TA4 module, 4 ports\n",
453 unit));
454 x = 4;
455 break;
456 case TA8_ASIC:
457 DPRINT((0, DBG_DOWNLOAD,
458 "si%d: Found ASIC TA8 module, 8 ports\n",
459 unit));
460 x = 8;
461 break;
462 case MTA:
463 DPRINT((0, DBG_DOWNLOAD,
464 "si%d: Found CD1400 module, 8 ports\n",
465 unit));
466 x = 8;
467 break;
468 case SXDC:
469 DPRINT((0, DBG_DOWNLOAD,
470 "si%d: Found SXDC module, 8 ports\n",
471 unit));
472 x = 8;
473 break;
474 default:
475 printf("si%d: unknown module type %d\n",
476 unit, modp->sm_type);
477 goto try_next;
478 }
479
480 /* this was limited in firmware and is also a driver issue */
481 if ((nport + x) > SI_MAXPORTPERCARD) {
482 printf("si%d: extra ports ignored\n", unit);
483 goto try_next;
484 }
485
486 nport += x;
487 si_Nports += x;
488 si_Nmodules++;
489
490try_next:
491 if (modp->sm_next == 0)
492 break;
493 modp = (struct si_module *)
494 (maddr + (unsigned)(modp->sm_next & 0x7fff));
495 }
496 sc->sc_ports = (struct si_port *)malloc(sizeof(struct si_port) * nport,
497 M_DEVBUF, M_NOWAIT | M_ZERO);
498 if (sc->sc_ports == 0) {
499 printf("si%d: fail to malloc memory for port structs\n",
500 unit);
501 return EINVAL;
502 }
503 sc->sc_nport = nport;
504
505 /*
506 * Scan round the ports again, this time initialising.
507 */
508 pp = sc->sc_ports;
509 nmodule = 0;
510 modp = (struct si_module *)(maddr + 0x80);
511 uart_type = 1000; /* arbitary, > uchar_max */
512 for (;;) {
513 switch (modp->sm_type) {
514 case TA4:
515 nport = 4;
516 break;
517 case TA8:
518 nport = 8;
519 break;
520 case TA4_ASIC:
521 nport = 4;
522 break;
523 case TA8_ASIC:
524 nport = 8;
525 break;
526 case MTA:
527 nport = 8;
528 break;
529 case SXDC:
530 nport = 8;
531 break;
532 default:
533 goto try_next2;
534 }
535 nmodule++;
536 ccbp = (struct si_channel *)((char *)modp + 0x100);
537 if (uart_type == 1000)
538 uart_type = ccbp->type;
539 else if (uart_type != ccbp->type)
540 printf("si%d: Warning: module %d mismatch! (%d%s != %d%s)\n",
541 unit, nmodule,
542 ccbp->type, si_modulename(sc->sc_type, ccbp->type),
543 uart_type, si_modulename(sc->sc_type, uart_type));
544
545 for (x = 0; x < nport; x++, pp++, ccbp++) {
546 pp->sp_ccb = ccbp; /* save the address */
547 pp->sp_tty = ttymalloc(NULL);
548 pp->sp_pend = IDLE_CLOSE;
549 pp->sp_state = 0; /* internal flag */
550 pp->sp_dtr_wait = 3 * hz;
551 pp->sp_iin.c_iflag = TTYDEF_IFLAG;
552 pp->sp_iin.c_oflag = TTYDEF_OFLAG;
553 pp->sp_iin.c_cflag = TTYDEF_CFLAG;
554 pp->sp_iin.c_lflag = TTYDEF_LFLAG;
555 termioschars(&pp->sp_iin);
556 pp->sp_iin.c_ispeed = pp->sp_iin.c_ospeed =
557 TTYDEF_SPEED;;
558 pp->sp_iout = pp->sp_iin;
559 }
560try_next2:
561 if (modp->sm_next == 0) {
562 printf("si%d: card: %s, ports: %d, modules: %d, type: %d%s\n",
563 unit,
564 sc->sc_typename,
565 sc->sc_nport,
566 nmodule,
567 uart_type,
568 si_modulename(sc->sc_type, uart_type));
569 break;
570 }
571 modp = (struct si_module *)
572 (maddr + (unsigned)(modp->sm_next & 0x7fff));
573 }
574 if (done_chartimes == 0) {
575 for (spt = chartimes ; spt->sp_speed != -1; spt++) {
576 if ((spt->sp_code /= hz) == 0)
577 spt->sp_code = 1;
578 }
579 done_chartimes = 1;
580 }
581
582/* path name devsw minor type uid gid perm*/
583 for (x = 0; x < sc->sc_nport; x++) {
584 /* sync with the manuals that start at 1 */
585 y = x + 1 + unit * (1 << SI_CARDSHIFT);
586 make_dev(&si_cdevsw, x, 0, 0, 0600, "ttyA%02d", y);
587 make_dev(&si_cdevsw, x + 0x00080, 0, 0, 0600, "cuaA%02d", y);
588 make_dev(&si_cdevsw, x + 0x10000, 0, 0, 0600, "ttyiA%02d", y);
589 make_dev(&si_cdevsw, x + 0x10080, 0, 0, 0600, "cuaiA%02d", y);
590 make_dev(&si_cdevsw, x + 0x20000, 0, 0, 0600, "ttylA%02d", y);
591 make_dev(&si_cdevsw, x + 0x20080, 0, 0, 0600, "cualA%02d", y);
592 }
593 make_dev(&si_cdevsw, 0x40000, 0, 0, 0600, "si_control");
594 return (0);
595}
596
597static int
598siopen(dev_t dev, int flag, int mode, struct thread *td)
599{
600 int oldspl, error;
601 int card, port;
602 struct si_softc *sc;
603 struct tty *tp;
604 volatile struct si_channel *ccbp;
605 struct si_port *pp;
606 int mynor = minor(dev);
607
608 /* quickly let in /dev/si_control */
609 if (IS_CONTROLDEV(mynor)) {
610 if ((error = suser(td)))
611 return(error);
612 return(0);
613 }
614
615 card = SI_CARD(mynor);
616 sc = devclass_get_softc(si_devclass, card);
617 if (sc == NULL)
618 return (ENXIO);
619
620 if (sc->sc_type == SIEMPTY) {
621 DPRINT((0, DBG_OPEN|DBG_FAIL, "si%d: type %s??\n",
622 card, sc->sc_typename));
623 return(ENXIO);
624 }
625
626 port = SI_PORT(mynor);
627 if (port >= sc->sc_nport) {
628 DPRINT((0, DBG_OPEN|DBG_FAIL, "si%d: nports %d\n",
629 card, sc->sc_nport));
630 return(ENXIO);
631 }
632
633#ifdef POLL
634 /*
635 * We've now got a device, so start the poller.
636 */
637 if (init_finished == 0) {
638 timeout(si_poll, (caddr_t)0L, si_pollrate);
639 init_finished = 1;
640 }
641#endif
642
643 /* initial/lock device */
644 if (IS_STATE(mynor)) {
645 return(0);
646 }
647
648 pp = sc->sc_ports + port;
649 tp = pp->sp_tty; /* the "real" tty */
650 dev->si_tty = tp;
651 ccbp = pp->sp_ccb; /* Find control block */
652 DPRINT((pp, DBG_ENTRY|DBG_OPEN, "siopen(%s,%x,%x,%x)\n",
653 devtoname(dev), flag, mode, td));
654
655 oldspl = spltty(); /* Keep others out */
656 error = 0;
657
658open_top:
659 while (pp->sp_state & SS_DTR_OFF) {
660 error = tsleep(&pp->sp_dtr_wait, TTIPRI|PCATCH, "sidtr", 0);
661 if (error != 0)
662 goto out;
663 }
664
665 if (tp->t_state & TS_ISOPEN) {
666 /*
667 * The device is open, so everything has been initialised.
668 * handle conflicts.
669 */
670 if (IS_CALLOUT(mynor)) {
671 if (!pp->sp_active_out) {
672 error = EBUSY;
673 goto out;
674 }
675 } else {
676 if (pp->sp_active_out) {
677 if (flag & O_NONBLOCK) {
678 error = EBUSY;
679 goto out;
680 }
681 error = tsleep(&pp->sp_active_out,
682 TTIPRI|PCATCH, "sibi", 0);
683 if (error != 0)
684 goto out;
685 goto open_top;
686 }
687 }
688 if (tp->t_state & TS_XCLUDE &&
689 suser(td)) {
690 DPRINT((pp, DBG_OPEN|DBG_FAIL,
691 "already open and EXCLUSIVE set\n"));
692 error = EBUSY;
693 goto out;
694 }
695 } else {
696 /*
697 * The device isn't open, so there are no conflicts.
698 * Initialize it. Avoid sleep... :-)
699 */
700 DPRINT((pp, DBG_OPEN, "first open\n"));
701 tp->t_oproc = si_start;
702 tp->t_stop = si_stop;
703 tp->t_param = siparam;
704 tp->t_dev = dev;
705 tp->t_termios = mynor & SI_CALLOUT_MASK
706 ? pp->sp_iout : pp->sp_iin;
707
708 (void) si_modem(pp, SET, TIOCM_DTR|TIOCM_RTS);
709
710 ++pp->sp_wopeners; /* in case of sleep in siparam */
711
712 error = siparam(tp, &tp->t_termios);
713
714 --pp->sp_wopeners;
715 if (error != 0)
716 goto out;
717 /* XXX: we should goto_top if siparam slept */
718
719 /* set initial DCD state */
720 pp->sp_last_hi_ip = ccbp->hi_ip;
721 if ((pp->sp_last_hi_ip & IP_DCD) || IS_CALLOUT(mynor)) {
722 (*linesw[tp->t_line].l_modem)(tp, 1);
723 }
724 }
725
726 /* whoops! we beat the close! */
727 if (pp->sp_state & SS_CLOSING) {
728 /* try and stop it from proceeding to bash the hardware */
729 pp->sp_state &= ~SS_CLOSING;
730 }
731
732 /*
733 * Wait for DCD if necessary
734 */
735 if (!(tp->t_state & TS_CARR_ON) &&
736 !IS_CALLOUT(mynor) &&
737 !(tp->t_cflag & CLOCAL) &&
738 !(flag & O_NONBLOCK)) {
739 ++pp->sp_wopeners;
740 DPRINT((pp, DBG_OPEN, "sleeping for carrier\n"));
741 error = tsleep(TSA_CARR_ON(tp), TTIPRI|PCATCH, "sidcd", 0);
742 --pp->sp_wopeners;
743 if (error != 0)
744 goto out;
745 goto open_top;
746 }
747
748 error = (*linesw[tp->t_line].l_open)(dev, tp);
749 si_disc_optim(tp, &tp->t_termios, pp);
750 if (tp->t_state & TS_ISOPEN && IS_CALLOUT(mynor))
751 pp->sp_active_out = TRUE;
752
753 pp->sp_state |= SS_OPEN; /* made it! */
754
755out:
756 splx(oldspl);
757
758 DPRINT((pp, DBG_OPEN, "leaving siopen\n"));
759
760 if (!(tp->t_state & TS_ISOPEN) && pp->sp_wopeners == 0)
761 sihardclose(pp);
762
763 return(error);
764}
765
766static int
767siclose(dev_t dev, int flag, int mode, struct thread *td)
768{
769 struct si_port *pp;
770 struct tty *tp;
771 int oldspl;
772 int error = 0;
773 int mynor = minor(dev);
774
775 if (IS_SPECIAL(mynor))
776 return(0);
777
778 oldspl = spltty();
779
780 pp = MINOR2PP(mynor);
781 tp = pp->sp_tty;
782
783 DPRINT((pp, DBG_ENTRY|DBG_CLOSE, "siclose(%s,%x,%x,%x) sp_state:%x\n",
784 devtoname(dev), flag, mode, td, pp->sp_state));
785
786 /* did we sleep and loose a race? */
787 if (pp->sp_state & SS_CLOSING) {
788 /* error = ESOMETING? */
789 goto out;
790 }
791
792 /* begin race detection.. */
793 pp->sp_state |= SS_CLOSING;
794
795 si_write_enable(pp, 0); /* block writes for ttywait() */
796
797 /* THIS MAY SLEEP IN TTYWAIT!!! */
798 (*linesw[tp->t_line].l_close)(tp, flag);
799
800 si_write_enable(pp, 1);
801
802 /* did we sleep and somebody started another open? */
803 if (!(pp->sp_state & SS_CLOSING)) {
804 /* error = ESOMETING? */
805 goto out;
806 }
807 /* ok. we are now still on the right track.. nuke the hardware */
808
809 if (pp->sp_state & SS_LSTART) {
810 untimeout(si_lstart, (caddr_t)pp, pp->lstart_ch);
811 pp->sp_state &= ~SS_LSTART;
812 }
813
814 si_stop(tp, FREAD | FWRITE);
815
816 sihardclose(pp);
817 ttyclose(tp);
818 pp->sp_state &= ~SS_OPEN;
819
820out:
821 DPRINT((pp, DBG_CLOSE|DBG_EXIT, "close done, returning\n"));
822 splx(oldspl);
823 return(error);
824}
825
826static void
827sihardclose(struct si_port *pp)
828{
829 int oldspl;
830 struct tty *tp;
831 volatile struct si_channel *ccbp;
832
833 oldspl = spltty();
834
835 tp = pp->sp_tty;
836 ccbp = pp->sp_ccb; /* Find control block */
837 if (tp->t_cflag & HUPCL ||
838 (!pp->sp_active_out &&
839 !(ccbp->hi_ip & IP_DCD) &&
840 !(pp->sp_iin.c_cflag && CLOCAL)) ||
841 !(tp->t_state & TS_ISOPEN)) {
842
843 (void) si_modem(pp, BIC, TIOCM_DTR|TIOCM_RTS);
844 (void) si_command(pp, FCLOSE, SI_NOWAIT);
845
846 if (pp->sp_dtr_wait != 0) {
847 timeout(sidtrwakeup, pp, pp->sp_dtr_wait);
848 pp->sp_state |= SS_DTR_OFF;
849 }
850
851 }
852 pp->sp_active_out = FALSE;
853 wakeup(&pp->sp_active_out);
854 wakeup(TSA_CARR_ON(tp));
855
856 splx(oldspl);
857}
858
859
860/*
861 * called at splsoftclock()...
862 */
863static void
864sidtrwakeup(void *chan)
865{
866 struct si_port *pp;
867 int oldspl;
868
869 oldspl = spltty();
870
871 pp = (struct si_port *)chan;
872 pp->sp_state &= ~SS_DTR_OFF;
873 wakeup(&pp->sp_dtr_wait);
874
875 splx(oldspl);
876}
877
878static int
879siwrite(dev_t dev, struct uio *uio, int flag)
880{
881 struct si_port *pp;
882 struct tty *tp;
883 int error = 0;
884 int mynor = minor(dev);
885 int oldspl;
886
887 if (IS_SPECIAL(mynor)) {
888 DPRINT((0, DBG_ENTRY|DBG_FAIL|DBG_WRITE, "siwrite(CONTROLDEV!!)\n"));
889 return(ENODEV);
890 }
891 pp = MINOR2PP(mynor);
892 tp = pp->sp_tty;
893 DPRINT((pp, DBG_WRITE, "siwrite(%s,%x,%x)\n", devtoname(dev), uio, flag));
894
895 oldspl = spltty();
896 /*
897 * If writes are currently blocked, wait on the "real" tty
898 */
899 while (pp->sp_state & SS_BLOCKWRITE) {
900 pp->sp_state |= SS_WAITWRITE;
901 DPRINT((pp, DBG_WRITE, "in siwrite, wait for SS_BLOCKWRITE to clear\n"));
902 if ((error = ttysleep(tp, (caddr_t)pp, TTOPRI|PCATCH,
903 "siwrite", tp->t_timeout))) {
904 if (error == EWOULDBLOCK)
905 error = EIO;
906 goto out;
907 }
908 }
909
910 error = (*linesw[tp->t_line].l_write)(tp, uio, flag);
911out:
912 splx(oldspl);
913 return (error);
914}
915
916
917static int
918siioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
919{
920 struct si_port *pp;
921 struct tty *tp;
922 int error;
923 int mynor = minor(dev);
924 int oldspl;
925 int blocked = 0;
926#if defined(COMPAT_43)
927 u_long oldcmd;
928 struct termios term;
929#endif
930
931 if (IS_SI_IOCTL(cmd))
932 return(si_Sioctl(dev, cmd, data, flag, td));
933
934 pp = MINOR2PP(mynor);
935 tp = pp->sp_tty;
936
937 DPRINT((pp, DBG_ENTRY|DBG_IOCTL, "siioctl(%s,%lx,%x,%x)\n",
938 devtoname(dev), cmd, data, flag));
939 if (IS_STATE(mynor)) {
940 struct termios *ct;
941
942 switch (mynor & SI_STATE_MASK) {
943 case SI_INIT_STATE_MASK:
944 ct = IS_CALLOUT(mynor) ? &pp->sp_iout : &pp->sp_iin;
945 break;
946 case SI_LOCK_STATE_MASK:
947 ct = IS_CALLOUT(mynor) ? &pp->sp_lout : &pp->sp_lin;
948 break;
949 default:
950 return (ENODEV);
951 }
952 switch (cmd) {
953 case TIOCSETA:
954 error = suser(td);
955 if (error != 0)
956 return (error);
957 *ct = *(struct termios *)data;
958 return (0);
959 case TIOCGETA:
960 *(struct termios *)data = *ct;
961 return (0);
962 case TIOCGETD:
963 *(int *)data = TTYDISC;
964 return (0);
965 case TIOCGWINSZ:
966 bzero(data, sizeof(struct winsize));
967 return (0);
968 default:
969 return (ENOTTY);
970 }
971 }
972 /*
973 * Do the old-style ioctl compat routines...
974 */
975#if defined(COMPAT_43)
976 term = tp->t_termios;
977 oldcmd = cmd;
978 error = ttsetcompat(tp, &cmd, data, &term);
979 if (error != 0)
980 return (error);
981 if (cmd != oldcmd)
982 data = (caddr_t)&term;
983#endif
984 /*
985 * Do the initial / lock state business
986 */
987 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
988 int cc;
989 struct termios *dt = (struct termios *)data;
990 struct termios *lt = mynor & SI_CALLOUT_MASK
991 ? &pp->sp_lout : &pp->sp_lin;
992
993 dt->c_iflag = (tp->t_iflag & lt->c_iflag) |
994 (dt->c_iflag & ~lt->c_iflag);
995 dt->c_oflag = (tp->t_oflag & lt->c_oflag) |
996 (dt->c_oflag & ~lt->c_oflag);
997 dt->c_cflag = (tp->t_cflag & lt->c_cflag) |
998 (dt->c_cflag & ~lt->c_cflag);
999 dt->c_lflag = (tp->t_lflag & lt->c_lflag) |
1000 (dt->c_lflag & ~lt->c_lflag);
1001 for (cc = 0; cc < NCCS; ++cc)
1002 if (lt->c_cc[cc] != 0)
1003 dt->c_cc[cc] = tp->t_cc[cc];
1004 if (lt->c_ispeed != 0)
1005 dt->c_ispeed = tp->t_ispeed;
1006 if (lt->c_ospeed != 0)
1007 dt->c_ospeed = tp->t_ospeed;
1008 }
1009
1010 /*
1011 * Block user-level writes to give the ttywait()
1012 * a chance to completely drain for commands
1013 * that require the port to be in a quiescent state.
1014 */
1015 switch (cmd) {
1016 case TIOCSETAW:
1017 case TIOCSETAF:
1018 case TIOCDRAIN:
1019#ifdef COMPAT_43
1020 case TIOCSETP:
1021#endif
1022 blocked++; /* block writes for ttywait() and siparam() */
1023 si_write_enable(pp, 0);
1024 }
1025
1026 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td);
1027 if (error != ENOIOCTL)
1028 goto out;
1029
1030 oldspl = spltty();
1031
1032 error = ttioctl(tp, cmd, data, flag);
1033 si_disc_optim(tp, &tp->t_termios, pp);
1034 if (error != ENOIOCTL) {
1035 splx(oldspl);
1036 goto out;
1037 }
1038
1039 error = 0;
1040 switch (cmd) {
1041 case TIOCSBRK:
1042 si_command(pp, SBREAK, SI_WAIT);
1043 break;
1044 case TIOCCBRK:
1045 si_command(pp, EBREAK, SI_WAIT);
1046 break;
1047 case TIOCSDTR:
1048 (void) si_modem(pp, SET, TIOCM_DTR|TIOCM_RTS);
1049 break;
1050 case TIOCCDTR:
1051 (void) si_modem(pp, SET, 0);
1052 break;
1053 case TIOCMSET:
1054 (void) si_modem(pp, SET, *(int *)data);
1055 break;
1056 case TIOCMBIS:
1057 (void) si_modem(pp, BIS, *(int *)data);
1058 break;
1059 case TIOCMBIC:
1060 (void) si_modem(pp, BIC, *(int *)data);
1061 break;
1062 case TIOCMGET:
1063 *(int *)data = si_modem(pp, GET, 0);
1064 break;
1065 case TIOCMSDTRWAIT:
1066 /* must be root since the wait applies to following logins */
1067 error = suser(td);
1068 if (error == 0)
1069 pp->sp_dtr_wait = *(int *)data * hz / 100;
1070 break;
1071 case TIOCMGDTRWAIT:
1072 *(int *)data = pp->sp_dtr_wait * 100 / hz;
1073 break;
1074 default:
1075 error = ENOTTY;
1076 }
1077 splx(oldspl);
1078
1079out:
1080 DPRINT((pp, DBG_IOCTL|DBG_EXIT, "siioctl ret %d\n", error));
1081 if (blocked)
1082 si_write_enable(pp, 1);
1083 return(error);
1084}
1085
1086/*
1087 * Handle the Specialix ioctls. All MUST be called via the CONTROL device
1088 */
1089static int
1090si_Sioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
1091{
1092 struct si_softc *xsc;
1093 struct si_port *xpp;
1094 volatile struct si_reg *regp;
1095 struct si_tcsi *dp;
1096 struct si_pstat *sps;
1097 int *ip, error = 0;
1098 int oldspl;
1099 int card, port;
1100 int mynor = minor(dev);
1101
1102 DPRINT((0, DBG_ENTRY|DBG_IOCTL, "si_Sioctl(%s,%lx,%x,%x)\n",
1103 devtoname(dev), cmd, data, flag));
1104
1105#if 1
1106 DPRINT((0, DBG_IOCTL, "TCSI_PORT=%x\n", TCSI_PORT));
1107 DPRINT((0, DBG_IOCTL, "TCSI_CCB=%x\n", TCSI_CCB));
1108 DPRINT((0, DBG_IOCTL, "TCSI_TTY=%x\n", TCSI_TTY));
1109#endif
1110
1111 if (!IS_CONTROLDEV(mynor)) {
1112 DPRINT((0, DBG_IOCTL|DBG_FAIL, "not called from control device!\n"));
1113 return(ENODEV);
1114 }
1115
1116 oldspl = spltty(); /* better safe than sorry */
1117
1118 ip = (int *)data;
1119
1120#define SUCHECK if ((error = suser(td))) goto out
1121
1122 switch (cmd) {
1123 case TCSIPORTS:
1124 *ip = si_Nports;
1125 goto out;
1126 case TCSIMODULES:
1127 *ip = si_Nmodules;
1128 goto out;
1129 case TCSISDBG_ALL:
1130 SUCHECK;
1131 si_debug = *ip;
1132 goto out;
1133 case TCSIGDBG_ALL:
1134 *ip = si_debug;
1135 goto out;
1136 default:
1137 /*
1138 * Check that a controller for this port exists
1139 */
1140
1141 /* may also be a struct si_pstat, a superset of si_tcsi */
1142
1143 dp = (struct si_tcsi *)data;
1144 sps = (struct si_pstat *)data;
1145 card = dp->tc_card;
1146 xsc = devclass_get_softc(si_devclass, card); /* check.. */
1147 if (xsc == NULL || xsc->sc_type == SIEMPTY) {
1148 error = ENOENT;
1149 goto out;
1150 }
1151 /*
1152 * And check that a port exists
1153 */
1154 port = dp->tc_port;
1155 if (port < 0 || port >= xsc->sc_nport) {
1156 error = ENOENT;
1157 goto out;
1158 }
1159 xpp = xsc->sc_ports + port;
1160 regp = (struct si_reg *)xsc->sc_maddr;
1161 }
1162
1163 switch (cmd) {
1164 case TCSIDEBUG:
1165#ifdef SI_DEBUG
1166 SUCHECK;
1167 if (xpp->sp_debug)
1168 xpp->sp_debug = 0;
1169 else {
1170 xpp->sp_debug = DBG_ALL;
1171 DPRINT((xpp, DBG_IOCTL, "debug toggled %s\n",
1172 (xpp->sp_debug&DBG_ALL)?"ON":"OFF"));
1173 }
1174 break;
1175#else
1176 error = ENODEV;
1177 goto out;
1178#endif
1179 case TCSISDBG_LEVEL:
1180 case TCSIGDBG_LEVEL:
1181#ifdef SI_DEBUG
1182 if (cmd == TCSIGDBG_LEVEL) {
1183 dp->tc_dbglvl = xpp->sp_debug;
1184 } else {
1185 SUCHECK;
1186 xpp->sp_debug = dp->tc_dbglvl;
1187 }
1188 break;
1189#else
1190 error = ENODEV;
1191 goto out;
1192#endif
1193 case TCSIGRXIT:
1194 dp->tc_int = regp->rx_int_count;
1195 break;
1196 case TCSIRXIT:
1197 SUCHECK;
1198 regp->rx_int_count = dp->tc_int;
1199 break;
1200 case TCSIGIT:
1201 dp->tc_int = regp->int_count;
1202 break;
1203 case TCSIIT:
1204 SUCHECK;
1205 regp->int_count = dp->tc_int;
1206 break;
1207 case TCSISTATE:
1208 dp->tc_int = xpp->sp_ccb->hi_ip;
1209 break;
1210 /* these next three use a different structure */
1211 case TCSI_PORT:
1212 SUCHECK;
1213 si_bcopy(xpp, &sps->tc_siport, sizeof(sps->tc_siport));
1214 break;
1215 case TCSI_CCB:
1216 SUCHECK;
1217 si_vbcopy(xpp->sp_ccb, &sps->tc_ccb, sizeof(sps->tc_ccb));
1218 break;
1219 case TCSI_TTY:
1220 SUCHECK;
1221 si_bcopy(xpp->sp_tty, &sps->tc_tty, sizeof(sps->tc_tty));
1222 break;
1223 default:
1224 error = EINVAL;
1225 goto out;
1226 }
1227out:
1228 splx(oldspl);
1229 return(error); /* success */
1230}
1231
1232/*
1233 * siparam() : Configure line params
1234 * called at spltty();
1235 * this may sleep, does not flush, nor wait for drain, nor block writes
1236 * caller must arrange this if it's important..
1237 */
1238static int
1239siparam(struct tty *tp, struct termios *t)
1240{
1241 struct si_port *pp = TP2PP(tp);
1242 volatile struct si_channel *ccbp;
1243 int oldspl, cflag, iflag, oflag, lflag;
1244 int error = 0; /* shutup gcc */
1245 int ispeed = 0; /* shutup gcc */
1246 int ospeed = 0; /* shutup gcc */
1247 BYTE val;
1248
1249 DPRINT((pp, DBG_ENTRY|DBG_PARAM, "siparam(%x,%x)\n", tp, t));
1250 cflag = t->c_cflag;
1251 iflag = t->c_iflag;
1252 oflag = t->c_oflag;
1253 lflag = t->c_lflag;
1254 DPRINT((pp, DBG_PARAM, "OFLAG 0x%x CFLAG 0x%x IFLAG 0x%x LFLAG 0x%x\n",
1255 oflag, cflag, iflag, lflag));
1256
1257 /* XXX - if Jet host and SXDC module, use extended baud rates */
1258
1259 /* if not hung up.. */
1260 if (t->c_ospeed != 0) {
1261 /* translate baud rate to firmware values */
1262 ospeed = ttspeedtab(t->c_ospeed, bdrates);
1263 ispeed = t->c_ispeed ?
1264 ttspeedtab(t->c_ispeed, bdrates) : ospeed;
1265
1266 /* enforce legit baud rate */
1267 if (ospeed < 0 || ispeed < 0)
1268 return (EINVAL);
1269 }
1270
1271 oldspl = spltty();
1272
1273 ccbp = pp->sp_ccb;
1274
1275 /* ========== set hi_break ========== */
1276 val = 0;
1277 if (iflag & IGNBRK) /* Breaks */
1278 val |= BR_IGN;
1279 if (iflag & BRKINT) /* Interrupt on break? */
1280 val |= BR_INT;
1281 if (iflag & PARMRK) /* Parity mark? */
1282 val |= BR_PARMRK;
1283 if (iflag & IGNPAR) /* Ignore chars with parity errors? */
1284 val |= BR_PARIGN;
1285 ccbp->hi_break = val;
1286
1287 /* ========== set hi_csr ========== */
1288 /* if not hung up.. */
1289 if (t->c_ospeed != 0) {
1290 /* Set I/O speeds */
1291 val = (ispeed << 4) | ospeed;
1292 }
1293 ccbp->hi_csr = val;
1294
1295 /* ========== set hi_mr2 ========== */
1296 val = 0;
1297 if (cflag & CSTOPB) /* Stop bits */
1298 val |= MR2_2_STOP;
1299 else
1300 val |= MR2_1_STOP;
1301 /*
1302 * Enable H/W RTS/CTS handshaking. The default TA/MTA is
1303 * a DCE, hence the reverse sense of RTS and CTS
1304 */
1305 /* Output Flow - RTS must be raised before data can be sent */
1306 if (cflag & CCTS_OFLOW)
1307 val |= MR2_RTSCONT;
1308
1309 ccbp->hi_mr2 = val;
1310
1311 /* ========== set hi_mr1 ========== */
1312 val = 0;
1313 if (!(cflag & PARENB)) /* Parity */
1314 val |= MR1_NONE;
1315 else
1316 val |= MR1_WITH;
1317 if (cflag & PARODD)
1318 val |= MR1_ODD;
1319
1320 if ((cflag & CS8) == CS8) { /* 8 data bits? */
1321 val |= MR1_8_BITS;
1322 } else if ((cflag & CS7) == CS7) { /* 7 data bits? */
1323 val |= MR1_7_BITS;
1324 } else if ((cflag & CS6) == CS6) { /* 6 data bits? */
1325 val |= MR1_6_BITS;
1326 } else { /* Must be 5 */
1327 val |= MR1_5_BITS;
1328 }
1329 /*
1330 * Enable H/W RTS/CTS handshaking. The default TA/MTA is
1331 * a DCE, hence the reverse sense of RTS and CTS
1332 */
1333 /* Input Flow - CTS is raised when port is ready to receive data */
1334 if (cflag & CRTS_IFLOW)
1335 val |= MR1_CTSCONT;
1336
1337 ccbp->hi_mr1 = val;
1338
1339 /* ========== set hi_mask ========== */
1340 val = 0xff;
1341 if ((cflag & CS8) == CS8) { /* 8 data bits? */
1342 val &= 0xFF;
1343 } else if ((cflag & CS7) == CS7) { /* 7 data bits? */
1344 val &= 0x7F;
1345 } else if ((cflag & CS6) == CS6) { /* 6 data bits? */
1346 val &= 0x3F;
1347 } else { /* Must be 5 */
1348 val &= 0x1F;
1349 }
1350 if (iflag & ISTRIP)
1351 val &= 0x7F;
1352
1353 ccbp->hi_mask = val;
1354
1355 /* ========== set hi_prtcl ========== */
1356 val = SP_DCEN; /* Monitor DCD always, or TIOCMGET misses it */
1357 if (iflag & IXANY)
1358 val |= SP_TANY;
1359 if (iflag & IXON)
1360 val |= SP_TXEN;
1361 if (iflag & IXOFF)
1362 val |= SP_RXEN;
1363 if (iflag & INPCK)
1364 val |= SP_PAEN;
1365
1366 ccbp->hi_prtcl = val;
1367
1368
1369 /* ========== set hi_{rx|tx}{on|off} ========== */
1370 /* XXX: the card TOTALLY shields us from the flow control... */
1371 ccbp->hi_txon = t->c_cc[VSTART];
1372 ccbp->hi_txoff = t->c_cc[VSTOP];
1373
1374 ccbp->hi_rxon = t->c_cc[VSTART];
1375 ccbp->hi_rxoff = t->c_cc[VSTOP];
1376
1377 /* ========== send settings to the card ========== */
1378 /* potential sleep here */
1379 if (ccbp->hi_stat == IDLE_CLOSE) /* Not yet open */
1380 si_command(pp, LOPEN, SI_WAIT); /* open it */
1381 else
1382 si_command(pp, CONFIG, SI_WAIT); /* change params */
1383
1384 /* ========== set DTR etc ========== */
1385 /* Hangup if ospeed == 0 */
1386 if (t->c_ospeed == 0) {
1387 (void) si_modem(pp, BIC, TIOCM_DTR|TIOCM_RTS);
1388 } else {
1389 /*
1390 * If the previous speed was 0, may need to re-enable
1391 * the modem signals
1392 */
1393 (void) si_modem(pp, SET, TIOCM_DTR|TIOCM_RTS);
1394 }
1395
1396 DPRINT((pp, DBG_PARAM, "siparam, complete: MR1 %x MR2 %x HI_MASK %x PRTCL %x HI_BREAK %x\n",
1397 ccbp->hi_mr1, ccbp->hi_mr2, ccbp->hi_mask, ccbp->hi_prtcl, ccbp->hi_break));
1398
1399 splx(oldspl);
1400 return(error);
1401}
1402
1403/*
1404 * Enable or Disable the writes to this channel...
1405 * "state" -> enabled = 1; disabled = 0;
1406 */
1407static void
1408si_write_enable(struct si_port *pp, int state)
1409{
1410 int oldspl;
1411
1412 oldspl = spltty();
1413
1414 if (state) {
1415 pp->sp_state &= ~SS_BLOCKWRITE;
1416 if (pp->sp_state & SS_WAITWRITE) {
1417 pp->sp_state &= ~SS_WAITWRITE;
1418 /* thunder away! */
1419 wakeup(pp);
1420 }
1421 } else {
1422 pp->sp_state |= SS_BLOCKWRITE;
1423 }
1424
1425 splx(oldspl);
1426}
1427
1428/*
1429 * Set/Get state of modem control lines.
1430 * Due to DCE-like behaviour of the adapter, some signals need translation:
1431 * TIOCM_DTR DSR
1432 * TIOCM_RTS CTS
1433 */
1434static int
1435si_modem(struct si_port *pp, enum si_mctl cmd, int bits)
1436{
1437 volatile struct si_channel *ccbp;
1438 int x;
1439
1440 DPRINT((pp, DBG_ENTRY|DBG_MODEM, "si_modem(%x,%s,%x)\n", pp, si_mctl2str(cmd), bits));
1441 ccbp = pp->sp_ccb; /* Find channel address */
1442 switch (cmd) {
1443 case GET:
1444 x = ccbp->hi_ip;
1445 bits = TIOCM_LE;
1446 if (x & IP_DCD) bits |= TIOCM_CAR;
1447 if (x & IP_DTR) bits |= TIOCM_DTR;
1448 if (x & IP_RTS) bits |= TIOCM_RTS;
1449 if (x & IP_RI) bits |= TIOCM_RI;
1450 return(bits);
1451 case SET:
1452 ccbp->hi_op &= ~(OP_DSR|OP_CTS);
1453 /* fall through */
1454 case BIS:
1455 x = 0;
1456 if (bits & TIOCM_DTR)
1457 x |= OP_DSR;
1458 if (bits & TIOCM_RTS)
1459 x |= OP_CTS;
1460 ccbp->hi_op |= x;
1461 break;
1462 case BIC:
1463 if (bits & TIOCM_DTR)
1464 ccbp->hi_op &= ~OP_DSR;
1465 if (bits & TIOCM_RTS)
1466 ccbp->hi_op &= ~OP_CTS;
1467 }
1468 return 0;
1469}
1470
1471/*
1472 * Handle change of modem state
1473 */
1474static void
1475si_modem_state(struct si_port *pp, struct tty *tp, int hi_ip)
1476{
1477 /* if a modem dev */
1478 if (hi_ip & IP_DCD) {
1479 if (!(pp->sp_last_hi_ip & IP_DCD)) {
1480 DPRINT((pp, DBG_INTR, "modem carr on t_line %d\n",
1481 tp->t_line));
1482 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
1483 }
1484 } else {
1485 if (pp->sp_last_hi_ip & IP_DCD) {
1486 DPRINT((pp, DBG_INTR, "modem carr off\n"));
1487 if ((*linesw[tp->t_line].l_modem)(tp, 0))
1488 (void) si_modem(pp, SET, 0);
1489 }
1490 }
1491 pp->sp_last_hi_ip = hi_ip;
1492
1493}
1494
1495/*
1496 * Poller to catch missed interrupts.
1497 *
1498 * Note that the SYSV Specialix drivers poll at 100 times per second to get
1499 * better response. We could really use a "periodic" version timeout(). :-)
1500 */
1501#ifdef POLL
1502static void
1503si_poll(void *nothing)
1504{
1505 struct si_softc *sc;
1506 int i;
1507 volatile struct si_reg *regp;
1508 struct si_port *pp;
1509 int lost, oldspl, port;
1510
1511 DPRINT((0, DBG_POLL, "si_poll()\n"));
1512 oldspl = spltty();
1513 if (in_intr)
1514 goto out;
1515 lost = 0;
1516 for (i = 0; i < si_numunits; i++) {
1517 sc = devclass_get_softc(si_devclass, i);
1518 if (sc == NULL || sc->sc_type == SIEMPTY)
1519 continue;
1520 regp = (struct si_reg *)sc->sc_maddr;
1521
1522 /*
1523 * See if there has been a pending interrupt for 2 seconds
1524 * or so. The test (int_scounter >= 200) won't correspond
1525 * to 2 seconds if int_count gets changed.
1526 */
1527 if (regp->int_pending != 0) {
1528 if (regp->int_scounter >= 200 &&
1529 regp->initstat == 1) {
1530 printf("si%d: lost intr\n", i);
1531 lost++;
1532 }
1533 } else {
1534 regp->int_scounter = 0;
1535 }
1536
1537 /*
1538 * gripe about no input flow control..
1539 */
1540 pp = sc->sc_ports;
1541 for (port = 0; port < sc->sc_nport; pp++, port++) {
1542 if (pp->sp_delta_overflows > 0) {
1543 printf("si%d: %d tty level buffer overflows\n",
1544 i, pp->sp_delta_overflows);
1545 pp->sp_delta_overflows = 0;
1546 }
1547 }
1548 }
1549 if (lost || si_realpoll)
1550 si_intr(NULL); /* call intr with fake vector */
1551out:
1552 splx(oldspl);
1553
1554 timeout(si_poll, (caddr_t)0L, si_pollrate);
1555}
1556#endif /* ifdef POLL */
1557
1558/*
1559 * The interrupt handler polls ALL ports on ALL adapters each time
1560 * it is called.
1561 */
1562
1563static BYTE si_rxbuf[SI_BUFFERSIZE]; /* input staging area */
1564static BYTE si_txbuf[SI_BUFFERSIZE]; /* output staging area */
1565
1566void
1567si_intr(void *arg)
1568{
1569 struct si_softc *sc;
1570 struct si_port *pp;
1571 volatile struct si_channel *ccbp;
1572 struct tty *tp;
1573 volatile caddr_t maddr;
1574 BYTE op, ip;
1575 int x, card, port, n, i, isopen;
1576 volatile BYTE *z;
1577 BYTE c;
1578
1579 sc = arg;
1580
1581 DPRINT((0, arg == NULL ? DBG_POLL:DBG_INTR, "si_intr\n"));
1582 if (in_intr)
1583 return;
1584 in_intr = 1;
1585
1586 /*
1587 * When we get an int we poll all the channels and do ALL pending
1588 * work, not just the first one we find. This allows all cards to
1589 * share the same vector.
1590 *
1591 * XXX - But if we're sharing the vector with something that's NOT
1592 * a SI/XIO/SX card, we may be making more work for ourselves.
1593 */
1594 for (card = 0; card < si_numunits; card++) {
1595 sc = devclass_get_softc(si_devclass, card);
1596 if (sc == NULL || sc->sc_type == SIEMPTY)
1597 continue;
1598
1599 /*
1600 * First, clear the interrupt
1601 */
1602 switch(sc->sc_type) {
1603 case SIHOST:
1604 maddr = sc->sc_maddr;
1605 ((volatile struct si_reg *)maddr)->int_pending = 0;
1606 /* flag nothing pending */
1607 *(maddr+SIINTCL) = 0x00; /* Set IRQ clear */
1608 *(maddr+SIINTCL_CL) = 0x00; /* Clear IRQ clear */
1609 break;
1610 case SIHOST2:
1611 maddr = sc->sc_maddr;
1612 ((volatile struct si_reg *)maddr)->int_pending = 0;
1613 *(maddr+SIPLIRQCLR) = 0x00;
1614 *(maddr+SIPLIRQCLR) = 0x10;
1615 break;
1616 case SIPCI:
1617 maddr = sc->sc_maddr;
1618 ((volatile struct si_reg *)maddr)->int_pending = 0;
1619 *(maddr+SIPCIINTCL) = 0x0;
1620 break;
1621 case SIJETPCI: /* fall through to JETISA case */
1622 case SIJETISA:
1623 maddr = sc->sc_maddr;
1624 ((volatile struct si_reg *)maddr)->int_pending = 0;
1625 *(maddr+SIJETINTCL) = 0x0;
1626 break;
1627 case SIEISA:
1628 maddr = sc->sc_maddr;
1629 ((volatile struct si_reg *)maddr)->int_pending = 0;
1630 (void)inb(sc->sc_iobase + 3);
1631 break;
1632 case SIEMPTY:
1633 default:
1634 continue;
1635 }
1636 ((volatile struct si_reg *)maddr)->int_scounter = 0;
1637
1638 /*
1639 * check each port
1640 */
1641 for (pp = sc->sc_ports, port = 0; port < sc->sc_nport;
1642 pp++, port++) {
1643 ccbp = pp->sp_ccb;
1644 tp = pp->sp_tty;
1645
1646 /*
1647 * See if a command has completed ?
1648 */
1649 if (ccbp->hi_stat != pp->sp_pend) {
1650 DPRINT((pp, DBG_INTR,
1651 "si_intr hi_stat = 0x%x, pend = %d\n",
1652 ccbp->hi_stat, pp->sp_pend));
1653 switch(pp->sp_pend) {
1654 case LOPEN:
1655 case MPEND:
1656 case MOPEN:
1657 case CONFIG:
1658 case SBREAK:
1659 case EBREAK:
1660 pp->sp_pend = ccbp->hi_stat;
1661 /* sleeping in si_command */
1662 wakeup(&pp->sp_state);
1663 break;
1664 default:
1665 pp->sp_pend = ccbp->hi_stat;
1666 }
1667 }
1668
1669 /*
1670 * Continue on if it's closed
1671 */
1672 if (ccbp->hi_stat == IDLE_CLOSE) {
1673 continue;
1674 }
1675
1676 /*
1677 * Do modem state change if not a local device
1678 */
1679 si_modem_state(pp, tp, ccbp->hi_ip);
1680
1681 /*
1682 * Check to see if we should 'receive' characters.
1683 */
1684 if (tp->t_state & TS_CONNECTED &&
1685 tp->t_state & TS_ISOPEN)
1686 isopen = 1;
1687 else
1688 isopen = 0;
1689
1690 /*
1691 * Do input break processing
1692 */
1693 if (ccbp->hi_state & ST_BREAK) {
1694 if (isopen) {
1695 (*linesw[tp->t_line].l_rint)(TTY_BI, tp);
1696 }
1697 ccbp->hi_state &= ~ST_BREAK; /* A Bit iffy this */
1698 DPRINT((pp, DBG_INTR, "si_intr break\n"));
1699 }
1700
1701 /*
1702 * Do RX stuff - if not open then dump any characters.
1703 * XXX: This is VERY messy and needs to be cleaned up.
1704 *
1705 * XXX: can we leave data in the host adapter buffer
1706 * when the clists are full? That may be dangerous
1707 * if the user cannot get an interrupt signal through.
1708 */
1709
1710 more_rx: /* XXX Sorry. the nesting was driving me bats! :-( */
1711
1712 if (!isopen) {
1713 ccbp->hi_rxopos = ccbp->hi_rxipos;
1714 goto end_rx;
1715 }
1716
1717 /*
1718 * If the tty input buffers are blocked, stop emptying
1719 * the incoming buffers and let the auto flow control
1720 * assert..
1721 */
1722 if (tp->t_state & TS_TBLOCK) {
1723 goto end_rx;
1724 }
1725
1726 /*
1727 * Process read characters if not skipped above
1728 */
1729 op = ccbp->hi_rxopos;
1730 ip = ccbp->hi_rxipos;
1731 c = ip - op;
1732 if (c == 0) {
1733 goto end_rx;
1734 }
1735
1736 n = c & 0xff;
1737 if (n > 250)
1738 n = 250;
1739
1740 DPRINT((pp, DBG_INTR, "n = %d, op = %d, ip = %d\n",
1741 n, op, ip));
1742
1743 /*
1744 * Suck characters out of host card buffer into the
1745 * "input staging buffer" - so that we dont leave the
1746 * host card in limbo while we're possibly echoing
1747 * characters and possibly flushing input inside the
1748 * ldisc l_rint() routine.
1749 */
1750 if (n <= SI_BUFFERSIZE - op) {
1751
1752 DPRINT((pp, DBG_INTR, "\tsingle copy\n"));
1753 z = ccbp->hi_rxbuf + op;
1754 si_vbcopy(z, si_rxbuf, n);
1755
1756 op += n;
1757 } else {
1758 x = SI_BUFFERSIZE - op;
1759
1760 DPRINT((pp, DBG_INTR, "\tdouble part 1 %d\n", x));
1761 z = ccbp->hi_rxbuf + op;
1762 si_vbcopy(z, si_rxbuf, x);
1763
1764 DPRINT((pp, DBG_INTR, "\tdouble part 2 %d\n",
1765 n - x));
1766 z = ccbp->hi_rxbuf;
1767 si_vbcopy(z, si_rxbuf + x, n - x);
1768
1769 op += n;
1770 }
1771
1772 /* clear collected characters from buffer */
1773 ccbp->hi_rxopos = op;
1774
1775 DPRINT((pp, DBG_INTR, "n = %d, op = %d, ip = %d\n",
1776 n, op, ip));
1777
1778 /*
1779 * at this point...
1780 * n = number of chars placed in si_rxbuf
1781 */
1782
1783 /*
1784 * Avoid the grotesquely inefficient lineswitch
1785 * routine (ttyinput) in "raw" mode. It usually
1786 * takes about 450 instructions (that's without
1787 * canonical processing or echo!). slinput is
1788 * reasonably fast (usually 40 instructions
1789 * plus call overhead).
1790 */
1791 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1792
1793 /* block if the driver supports it */
1794 if (tp->t_rawq.c_cc + n >= SI_I_HIGH_WATER &&
1795 (tp->t_cflag & CRTS_IFLOW ||
1796 tp->t_iflag & IXOFF) &&
1797 !(tp->t_state & TS_TBLOCK))
1798 ttyblock(tp);
1799
1800 tk_nin += n;
1801 tk_rawcc += n;
1802 tp->t_rawcc += n;
1803
1804 pp->sp_delta_overflows +=
1805 b_to_q((char *)si_rxbuf, n, &tp->t_rawq);
1806
1807 ttwakeup(tp);
1808 if (tp->t_state & TS_TTSTOP &&
1809 (tp->t_iflag & IXANY ||
1810 tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1811 tp->t_state &= ~TS_TTSTOP;
1812 tp->t_lflag &= ~FLUSHO;
1813 si_start(tp);
1814 }
1815 } else {
1816 /*
1817 * It'd be nice to not have to go through the
1818 * function call overhead for each char here.
1819 * It'd be nice to block input it, saving a
1820 * loop here and the call/return overhead.
1821 */
1822 for(x = 0; x < n; x++) {
1823 i = si_rxbuf[x];
1824 if ((*linesw[tp->t_line].l_rint)(i, tp)
1825 == -1) {
1826 pp->sp_delta_overflows++;
1827 }
1828 }
1829 }
1830 goto more_rx; /* try for more until RXbuf is empty */
1831
1832 end_rx: /* XXX: Again, sorry about the gotos.. :-) */
1833
1834 /*
1835 * Do TX stuff
1836 */
1837 (*linesw[tp->t_line].l_start)(tp);
1838
1839 } /* end of for (all ports on this controller) */
1840 } /* end of for (all controllers) */
1841
1842 in_intr = 0;
1843 DPRINT((0, arg == NULL ? DBG_POLL:DBG_INTR, "end si_intr\n"));
1844}
1845
1846/*
1847 * Nudge the transmitter...
1848 *
1849 * XXX: I inherited some funny code here. It implies the host card only
1850 * interrupts when the transmit buffer reaches the low-water-mark, and does
1851 * not interrupt when it's actually hits empty. In some cases, we have
1852 * processes waiting for complete drain, and we need to simulate an interrupt
1853 * about when we think the buffer is going to be empty (and retry if not).
1854 * I really am not certain about this... I *need* the hardware manuals.
1855 */
1856static void
1857si_start(struct tty *tp)
1858{
1859 struct si_port *pp;
1860 volatile struct si_channel *ccbp;
1861 struct clist *qp;
1862 BYTE ipos;
1863 int nchar;
1864 int oldspl, count, n, amount, buffer_full;
1865
1866 oldspl = spltty();
1867
1868 qp = &tp->t_outq;
1869 pp = TP2PP(tp);
1870
1871 DPRINT((pp, DBG_ENTRY|DBG_START,
1872 "si_start(%x) t_state %x sp_state %x t_outq.c_cc %d\n",
1873 tp, tp->t_state, pp->sp_state, qp->c_cc));
1874
1875 if (tp->t_state & (TS_TIMEOUT|TS_TTSTOP))
1876 goto out;
1877
1878 buffer_full = 0;
1879 ccbp = pp->sp_ccb;
1880
1881 count = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
1882 DPRINT((pp, DBG_START, "count %d\n", (BYTE)count));
1883
1884 while ((nchar = qp->c_cc) > 0) {
1885 if ((BYTE)count >= 255) {
1886 buffer_full++;
1887 break;
1888 }
1889 amount = min(nchar, (255 - (BYTE)count));
1890 ipos = (unsigned int)ccbp->hi_txipos;
1891 n = q_to_b(&tp->t_outq, si_txbuf, amount);
1892 /* will it fit in one lump? */
1893 if ((SI_BUFFERSIZE - ipos) >= n) {
1894 si_bcopyv(si_txbuf, &ccbp->hi_txbuf[ipos], n);
1895 } else {
1896 si_bcopyv(si_txbuf, &ccbp->hi_txbuf[ipos],
1897 SI_BUFFERSIZE - ipos);
1898 si_bcopyv(si_txbuf + (SI_BUFFERSIZE - ipos),
1899 &ccbp->hi_txbuf[0], n - (SI_BUFFERSIZE - ipos));
1900 }
1901 ccbp->hi_txipos += n;
1902 count = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
1903 }
1904
1905 if (count != 0 && nchar == 0) {
1906 tp->t_state |= TS_BUSY;
1907 } else {
1908 tp->t_state &= ~TS_BUSY;
1909 }
1910
1911 /* wakeup time? */
1912 ttwwakeup(tp);
1913
1914 DPRINT((pp, DBG_START, "count %d, nchar %d, tp->t_state 0x%x\n",
1915 (BYTE)count, nchar, tp->t_state));
1916
1917 if (tp->t_state & TS_BUSY)
1918 {
1919 int time;
1920
1921 time = ttspeedtab(tp->t_ospeed, chartimes);
1922
1923 if (time > 0) {
1924 if (time < nchar)
1925 time = nchar / time;
1926 else
1927 time = 2;
1928 } else {
1929 DPRINT((pp, DBG_START,
1930 "bad char time value! %d\n", time));
1931 time = hz/10;
1932 }
1933
1934 if ((pp->sp_state & (SS_LSTART|SS_INLSTART)) == SS_LSTART) {
1935 untimeout(si_lstart, (caddr_t)pp, pp->lstart_ch);
1936 } else {
1937 pp->sp_state |= SS_LSTART;
1938 }
1939 DPRINT((pp, DBG_START, "arming lstart, time=%d\n", time));
1940 pp->lstart_ch = timeout(si_lstart, (caddr_t)pp, time);
1941 }
1942
1943out:
1944 splx(oldspl);
1945 DPRINT((pp, DBG_EXIT|DBG_START, "leave si_start()\n"));
1946}
1947
1948/*
1949 * Note: called at splsoftclock from the timeout code
1950 * This has to deal with two things... cause wakeups while waiting for
1951 * tty drains on last process exit, and call l_start at about the right
1952 * time for protocols like ppp.
1953 */
1954static void
1955si_lstart(void *arg)
1956{
1957 struct si_port *pp = arg;
1958 struct tty *tp;
1959 int oldspl;
1960
1961 DPRINT((pp, DBG_ENTRY|DBG_LSTART, "si_lstart(%x) sp_state %x\n",
1962 pp, pp->sp_state));
1963
1964 oldspl = spltty();
1965
1966 if ((pp->sp_state & SS_OPEN) == 0 || (pp->sp_state & SS_LSTART) == 0) {
1967 splx(oldspl);
1968 return;
1969 }
1970 pp->sp_state &= ~SS_LSTART;
1971 pp->sp_state |= SS_INLSTART;
1972
1973 tp = pp->sp_tty;
1974
1975 /* deal with the process exit case */
1976 ttwwakeup(tp);
1977
1978 /* nudge protocols - eg: ppp */
1979 (*linesw[tp->t_line].l_start)(tp);
1980
1981 pp->sp_state &= ~SS_INLSTART;
1982 splx(oldspl);
1983}
1984
1985/*
1986 * Stop output on a line. called at spltty();
1987 */
1988static void
1989si_stop(struct tty *tp, int rw)
1990{
1991 volatile struct si_channel *ccbp;
1992 struct si_port *pp;
1993
1994 pp = TP2PP(tp);
1995 ccbp = pp->sp_ccb;
1996
1997 DPRINT((TP2PP(tp), DBG_ENTRY|DBG_STOP, "si_stop(%x,%x)\n", tp, rw));
1998
1999 /* XXX: must check (rw & FWRITE | FREAD) etc flushing... */
2000 if (rw & FWRITE) {
2001 /* what level are we meant to be flushing anyway? */
2002 if (tp->t_state & TS_BUSY) {
2003 si_command(TP2PP(tp), WFLUSH, SI_NOWAIT);
2004 tp->t_state &= ~TS_BUSY;
2005 ttwwakeup(tp); /* Bruce???? */
2006 }
2007 }
2008#if 1 /* XXX: this doesn't work right yet.. */
2009 /* XXX: this may have been failing because we used to call l_rint()
2010 * while we were looping based on these two counters. Now, we collect
2011 * the data and then loop stuffing it into l_rint(), making this
2012 * useless. Should we cause this to blow away the staging buffer?
2013 */
2014 if (rw & FREAD) {
2015 ccbp->hi_rxopos = ccbp->hi_rxipos;
2016 }
2017#endif
2018}
2019
2020/*
2021 * Issue a command to the host card CPU.
2022 */
2023
2024static void
2025si_command(struct si_port *pp, int cmd, int waitflag)
2026{
2027 int oldspl;
2028 volatile struct si_channel *ccbp = pp->sp_ccb;
2029 int x;
2030
2031 DPRINT((pp, DBG_ENTRY|DBG_PARAM, "si_command(%x,%x,%d): hi_stat 0x%x\n",
2032 pp, cmd, waitflag, ccbp->hi_stat));
2033
2034 oldspl = spltty(); /* Keep others out */
2035
2036 /* wait until it's finished what it was doing.. */
2037 /* XXX: sits in IDLE_BREAK until something disturbs it or break
2038 * is turned off. */
2039 while((x = ccbp->hi_stat) != IDLE_OPEN &&
2040 x != IDLE_CLOSE &&
2041 x != IDLE_BREAK &&
2042 x != cmd) {
2043 if (in_intr) { /* Prevent sleep in intr */
2044 DPRINT((pp, DBG_PARAM,
2045 "cmd intr collision - completing %d\trequested %d\n",
2046 x, cmd));
2047 splx(oldspl);
2048 return;
2049 } else if (ttysleep(pp->sp_tty, (caddr_t)&pp->sp_state, TTIPRI|PCATCH,
2050 "sicmd1", 1)) {
2051 splx(oldspl);
2052 return;
2053 }
2054 }
2055 /* it should now be in IDLE_{OPEN|CLOSE|BREAK}, or "cmd" */
2056
2057 /* if there was a pending command, cause a state-change wakeup */
2058 switch(pp->sp_pend) {
2059 case LOPEN:
2060 case MPEND:
2061 case MOPEN:
2062 case CONFIG:
2063 case SBREAK:
2064 case EBREAK:
2065 wakeup(&pp->sp_state);
2066 break;
2067 default:
2068 break;
2069 }
2070
2071 pp->sp_pend = cmd; /* New command pending */
2072 ccbp->hi_stat = cmd; /* Post it */
2073
2074 if (waitflag) {
2075 if (in_intr) { /* If in interrupt handler */
2076 DPRINT((pp, DBG_PARAM,
2077 "attempt to sleep in si_intr - cmd req %d\n",
2078 cmd));
2079 splx(oldspl);
2080 return;
2081 } else while(ccbp->hi_stat != IDLE_OPEN &&
2082 ccbp->hi_stat != IDLE_BREAK) {
2083 if (ttysleep(pp->sp_tty, (caddr_t)&pp->sp_state, TTIPRI|PCATCH,
2084 "sicmd2", 0))
2085 break;
2086 }
2087 }
2088 splx(oldspl);
2089}
2090
2091static void
2092si_disc_optim(struct tty *tp, struct termios *t, struct si_port *pp)
2093{
2094 /*
2095 * XXX can skip a lot more cases if Smarts. Maybe
2096 * (IGNCR | ISTRIP | IXON) in c_iflag. But perhaps we
2097 * shouldn't skip if (TS_CNTTB | TS_LNCH) is set in t_state.
2098 */
2099 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) &&
2100 (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) &&
2101 (!(t->c_iflag & PARMRK) ||
2102 (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) &&
2103 !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) &&
2104 linesw[tp->t_line].l_rint == ttyinput)
2105 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2106 else
2107 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2108 pp->sp_hotchar = linesw[tp->t_line].l_hotchar;
2109 DPRINT((pp, DBG_OPTIM, "bypass: %s, hotchar: %x\n",
2110 (tp->t_state & TS_CAN_BYPASS_L_RINT) ? "on" : "off",
2111 pp->sp_hotchar));
2112}
2113
2114
2115#ifdef SI_DEBUG
2116
2117void
2118si_dprintf(struct si_port *pp, int flags, const char *fmt, ...)
2119{
2120 va_list ap;
2121
2122 if ((pp == NULL && (si_debug&flags)) ||
2123 (pp != NULL && ((pp->sp_debug&flags) || (si_debug&flags)))) {
2124 if (pp != NULL)
2125 printf("%ci%d(%d): ", 's',
2126 (int)SI_CARD(minor(pp->sp_tty->t_dev)),
2127 (int)SI_PORT(minor(pp->sp_tty->t_dev)));
2128 va_start(ap, fmt);
2129 vprintf(fmt, ap);
2130 va_end(ap);
2131 }
2132}
2133
2134static char *
2135si_mctl2str(enum si_mctl cmd)
2136{
2137 switch (cmd) {
2138 case GET:
2139 return("GET");
2140 case SET:
2141 return("SET");
2142 case BIS:
2143 return("BIS");
2144 case BIC:
2145 return("BIC");
2146 }
2147 return("BAD");
2148}
2149
2150#endif /* DEBUG */
2151
2152static char *
2153si_modulename(int host_type, int uart_type)
2154{
2155 switch (host_type) {
2156 /* Z280 based cards */
2157 case SIEISA:
2158 case SIHOST2:
2159 case SIHOST:
2160 case SIPCI:
2161 switch (uart_type) {
2162 case 0:
2163 return(" (XIO)");
2164 case 1:
2165 return(" (SI)");
2166 }
2167 break;
2168 /* T225 based hosts */
2169 case SIJETPCI:
2170 case SIJETISA:
2171 switch (uart_type) {
2172 case 0:
2173 return(" (SI)");
2174 case 40:
2175 return(" (XIO)");
2176 case 72:
2177 return(" (SXDC)");
2178 }
2179 break;
2180 }
2181 return("");
2182}
| 129};
130
131static int si_Nports;
132static int si_Nmodules;
133static int si_debug = 0; /* data, not bss, so it's patchable */
134
135SYSCTL_INT(_machdep, OID_AUTO, si_debug, CTLFLAG_RW, &si_debug, 0, "");
136TUNABLE_INT("machdep.si_debug", &si_debug);
137
138static int si_numunits;
139
140devclass_t si_devclass;
141
142#ifndef B2000 /* not standard, but the hardware knows it. */
143# define B2000 2000
144#endif
145static struct speedtab bdrates[] = {
146 { B75, CLK75, }, /* 0x0 */
147 { B110, CLK110, }, /* 0x1 */
148 { B150, CLK150, }, /* 0x3 */
149 { B300, CLK300, }, /* 0x4 */
150 { B600, CLK600, }, /* 0x5 */
151 { B1200, CLK1200, }, /* 0x6 */
152 { B2000, CLK2000, }, /* 0x7 */
153 { B2400, CLK2400, }, /* 0x8 */
154 { B4800, CLK4800, }, /* 0x9 */
155 { B9600, CLK9600, }, /* 0xb */
156 { B19200, CLK19200, }, /* 0xc */
157 { B38400, CLK38400, }, /* 0x2 (out of order!) */
158 { B57600, CLK57600, }, /* 0xd */
159 { B115200, CLK110, }, /* 0x1 (dupe!, 110 baud on "si") */
160 { -1, -1 },
161};
162
163
164/* populated with approx character/sec rates - translated at card
165 * initialisation time to chars per tick of the clock */
166static int done_chartimes = 0;
167static struct speedtab chartimes[] = {
168 { B75, 8, },
169 { B110, 11, },
170 { B150, 15, },
171 { B300, 30, },
172 { B600, 60, },
173 { B1200, 120, },
174 { B2000, 200, },
175 { B2400, 240, },
176 { B4800, 480, },
177 { B9600, 960, },
178 { B19200, 1920, },
179 { B38400, 3840, },
180 { B57600, 5760, },
181 { B115200, 11520, },
182 { -1, -1 },
183};
184static volatile int in_intr = 0; /* Inside interrupt handler? */
185
186#ifdef POLL
187static int si_pollrate; /* in addition to irq */
188static int si_realpoll = 0; /* poll HW on timer */
189
190SYSCTL_INT(_machdep, OID_AUTO, si_pollrate, CTLFLAG_RW, &si_pollrate, 0, "");
191SYSCTL_INT(_machdep, OID_AUTO, si_realpoll, CTLFLAG_RW, &si_realpoll, 0, "");
192
193static int init_finished = 0;
194static void si_poll(void *);
195#endif
196
197/*
198 * Array of adapter types and the corresponding RAM size. The order of
199 * entries here MUST match the ordinal of the adapter type.
200 */
201static char *si_type[] = {
202 "EMPTY",
203 "SIHOST",
204 "SIMCA", /* FreeBSD does not support Microchannel */
205 "SIHOST2",
206 "SIEISA",
207 "SIPCI",
208 "SXPCI",
209 "SXISA",
210};
211
212/*
213 * We have to make an 8 bit version of bcopy, since some cards can't
214 * deal with 32 bit I/O
215 */
216static void __inline
217si_bcopy(const void *src, void *dst, size_t len)
218{
219 while (len--)
220 *(((u_char *)dst)++) = *(((const u_char *)src)++);
221}
222static void __inline
223si_vbcopy(const volatile void *src, void *dst, size_t len)
224{
225 while (len--)
226 *(((u_char *)dst)++) = *(((const volatile u_char *)src)++);
227}
228static void __inline
229si_bcopyv(const void *src, volatile void *dst, size_t len)
230{
231 while (len--)
232 *(((volatile u_char *)dst)++) = *(((const u_char *)src)++);
233}
234
235
236/*
237 * Attach the device. Initialize the card.
238 */
239int
240siattach(device_t dev)
241{
242 int unit;
243 struct si_softc *sc;
244 struct si_port *pp;
245 volatile struct si_channel *ccbp;
246 volatile struct si_reg *regp;
247 volatile caddr_t maddr;
248 struct si_module *modp;
249 struct speedtab *spt;
250 int nmodule, nport, x, y;
251 int uart_type;
252
253 sc = device_get_softc(dev);
254 unit = device_get_unit(dev);
255
256 sc->sc_typename = si_type[sc->sc_type];
257 if (si_numunits < unit + 1)
258 si_numunits = unit + 1;
259
260 DPRINT((0, DBG_AUTOBOOT, "si%d: siattach\n", unit));
261
262#ifdef POLL
263 if (si_pollrate == 0) {
264 si_pollrate = POLLHZ; /* in addition to irq */
265#ifdef REALPOLL
266 si_realpoll = 1; /* scan always */
267#endif
268 }
269#endif
270
271 DPRINT((0, DBG_AUTOBOOT, "si%d: type: %s paddr: %x maddr: %x\n", unit,
272 sc->sc_typename, sc->sc_paddr, sc->sc_maddr));
273
274 sc->sc_ports = NULL; /* mark as uninitialised */
275
276 maddr = sc->sc_maddr;
277
278 /* Stop the CPU first so it won't stomp around while we load */
279
280 switch (sc->sc_type) {
281 case SIEISA:
282 outb(sc->sc_iobase + 2, sc->sc_irq << 4);
283 break;
284 case SIPCI:
285 *(maddr+SIPCIRESET) = 0;
286 break;
287 case SIJETPCI: /* fall through to JET ISA */
288 case SIJETISA:
289 *(maddr+SIJETCONFIG) = 0;
290 break;
291 case SIHOST2:
292 *(maddr+SIPLRESET) = 0;
293 break;
294 case SIHOST:
295 *(maddr+SIRESET) = 0;
296 break;
297 default: /* this should never happen */
298 printf("si%d: unsupported configuration\n", unit);
299 return EINVAL;
300 break;
301 }
302
303 /* OK, now lets download the download code */
304
305 if (SI_ISJET(sc->sc_type)) {
306 DPRINT((0, DBG_DOWNLOAD, "si%d: jet_download: nbytes %d\n",
307 unit, si3_t225_dsize));
308 si_bcopy(si3_t225_download, maddr + si3_t225_downloadaddr,
309 si3_t225_dsize);
310 DPRINT((0, DBG_DOWNLOAD,
311 "si%d: jet_bootstrap: nbytes %d -> %x\n",
312 unit, si3_t225_bsize, si3_t225_bootloadaddr));
313 si_bcopy(si3_t225_bootstrap, maddr + si3_t225_bootloadaddr,
314 si3_t225_bsize);
315 } else {
316 DPRINT((0, DBG_DOWNLOAD, "si%d: si_download: nbytes %d\n",
317 unit, si2_z280_dsize));
318 si_bcopy(si2_z280_download, maddr + si2_z280_downloadaddr,
319 si2_z280_dsize);
320 }
321
322 /* Now start the CPU */
323
324 switch (sc->sc_type) {
325 case SIEISA:
326 /* modify the download code to tell it that it's on an EISA */
327 *(maddr + 0x42) = 1;
328 outb(sc->sc_iobase + 2, (sc->sc_irq << 4) | 4);
329 (void)inb(sc->sc_iobase + 3); /* reset interrupt */
330 break;
331 case SIPCI:
332 /* modify the download code to tell it that it's on a PCI */
333 *(maddr+0x42) = 1;
334 *(maddr+SIPCIRESET) = 1;
335 *(maddr+SIPCIINTCL) = 0;
336 break;
337 case SIJETPCI:
338 *(maddr+SIJETRESET) = 0;
339 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN;
340 break;
341 case SIJETISA:
342 *(maddr+SIJETRESET) = 0;
343 switch (sc->sc_irq) {
344 case 9:
345 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0x90;
346 break;
347 case 10:
348 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xa0;
349 break;
350 case 11:
351 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xb0;
352 break;
353 case 12:
354 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xc0;
355 break;
356 case 15:
357 *(maddr+SIJETCONFIG) = SIJETBUSEN|SIJETIRQEN|0xf0;
358 break;
359 }
360 break;
361 case SIHOST:
362 *(maddr+SIRESET_CL) = 0;
363 *(maddr+SIINTCL_CL) = 0;
364 break;
365 case SIHOST2:
366 *(maddr+SIPLRESET) = 0x10;
367 switch (sc->sc_irq) {
368 case 11:
369 *(maddr+SIPLIRQ11) = 0x10;
370 break;
371 case 12:
372 *(maddr+SIPLIRQ12) = 0x10;
373 break;
374 case 15:
375 *(maddr+SIPLIRQ15) = 0x10;
376 break;
377 }
378 *(maddr+SIPLIRQCLR) = 0x10;
379 break;
380 default: /* this should _REALLY_ never happen */
381 printf("si%d: Uh, it was supported a second ago...\n", unit);
382 return EINVAL;
383 }
384
385 DELAY(1000000); /* wait around for a second */
386
387 regp = (struct si_reg *)maddr;
388 y = 0;
389 /* wait max of 5 sec for init OK */
390 while (regp->initstat == 0 && y++ < 10) {
391 DELAY(500000);
392 }
393 switch (regp->initstat) {
394 case 0:
395 printf("si%d: startup timeout - aborting\n", unit);
396 sc->sc_type = SIEMPTY;
397 return EINVAL;
398 case 1:
399 if (SI_ISJET(sc->sc_type)) {
400 /* set throttle to 100 times per second */
401 regp->int_count = JET_INT_COUNT;
402 /* rx_intr_count is a NOP in Jet */
403 } else {
404 /* set throttle to 125 times per second */
405 regp->int_count = INT_COUNT;
406 /* rx intr max of 25 times per second */
407 regp->rx_int_count = RXINT_COUNT;
408 }
409 regp->int_pending = 0; /* no intr pending */
410 regp->int_scounter = 0; /* reset counter */
411 break;
412 case 0xff:
413 /*
414 * No modules found, so give up on this one.
415 */
416 printf("si%d: %s - no ports found\n", unit,
417 si_type[sc->sc_type]);
418 return 0;
419 default:
420 printf("si%d: download code version error - initstat %x\n",
421 unit, regp->initstat);
422 return EINVAL;
423 }
424
425 /*
426 * First time around the ports just count them in order
427 * to allocate some memory.
428 */
429 nport = 0;
430 modp = (struct si_module *)(maddr + 0x80);
431 for (;;) {
432 DPRINT((0, DBG_DOWNLOAD, "si%d: ccb addr 0x%x\n", unit, modp));
433 switch (modp->sm_type) {
434 case TA4:
435 DPRINT((0, DBG_DOWNLOAD,
436 "si%d: Found old TA4 module, 4 ports\n",
437 unit));
438 x = 4;
439 break;
440 case TA8:
441 DPRINT((0, DBG_DOWNLOAD,
442 "si%d: Found old TA8 module, 8 ports\n",
443 unit));
444 x = 8;
445 break;
446 case TA4_ASIC:
447 DPRINT((0, DBG_DOWNLOAD,
448 "si%d: Found ASIC TA4 module, 4 ports\n",
449 unit));
450 x = 4;
451 break;
452 case TA8_ASIC:
453 DPRINT((0, DBG_DOWNLOAD,
454 "si%d: Found ASIC TA8 module, 8 ports\n",
455 unit));
456 x = 8;
457 break;
458 case MTA:
459 DPRINT((0, DBG_DOWNLOAD,
460 "si%d: Found CD1400 module, 8 ports\n",
461 unit));
462 x = 8;
463 break;
464 case SXDC:
465 DPRINT((0, DBG_DOWNLOAD,
466 "si%d: Found SXDC module, 8 ports\n",
467 unit));
468 x = 8;
469 break;
470 default:
471 printf("si%d: unknown module type %d\n",
472 unit, modp->sm_type);
473 goto try_next;
474 }
475
476 /* this was limited in firmware and is also a driver issue */
477 if ((nport + x) > SI_MAXPORTPERCARD) {
478 printf("si%d: extra ports ignored\n", unit);
479 goto try_next;
480 }
481
482 nport += x;
483 si_Nports += x;
484 si_Nmodules++;
485
486try_next:
487 if (modp->sm_next == 0)
488 break;
489 modp = (struct si_module *)
490 (maddr + (unsigned)(modp->sm_next & 0x7fff));
491 }
492 sc->sc_ports = (struct si_port *)malloc(sizeof(struct si_port) * nport,
493 M_DEVBUF, M_NOWAIT | M_ZERO);
494 if (sc->sc_ports == 0) {
495 printf("si%d: fail to malloc memory for port structs\n",
496 unit);
497 return EINVAL;
498 }
499 sc->sc_nport = nport;
500
501 /*
502 * Scan round the ports again, this time initialising.
503 */
504 pp = sc->sc_ports;
505 nmodule = 0;
506 modp = (struct si_module *)(maddr + 0x80);
507 uart_type = 1000; /* arbitary, > uchar_max */
508 for (;;) {
509 switch (modp->sm_type) {
510 case TA4:
511 nport = 4;
512 break;
513 case TA8:
514 nport = 8;
515 break;
516 case TA4_ASIC:
517 nport = 4;
518 break;
519 case TA8_ASIC:
520 nport = 8;
521 break;
522 case MTA:
523 nport = 8;
524 break;
525 case SXDC:
526 nport = 8;
527 break;
528 default:
529 goto try_next2;
530 }
531 nmodule++;
532 ccbp = (struct si_channel *)((char *)modp + 0x100);
533 if (uart_type == 1000)
534 uart_type = ccbp->type;
535 else if (uart_type != ccbp->type)
536 printf("si%d: Warning: module %d mismatch! (%d%s != %d%s)\n",
537 unit, nmodule,
538 ccbp->type, si_modulename(sc->sc_type, ccbp->type),
539 uart_type, si_modulename(sc->sc_type, uart_type));
540
541 for (x = 0; x < nport; x++, pp++, ccbp++) {
542 pp->sp_ccb = ccbp; /* save the address */
543 pp->sp_tty = ttymalloc(NULL);
544 pp->sp_pend = IDLE_CLOSE;
545 pp->sp_state = 0; /* internal flag */
546 pp->sp_dtr_wait = 3 * hz;
547 pp->sp_iin.c_iflag = TTYDEF_IFLAG;
548 pp->sp_iin.c_oflag = TTYDEF_OFLAG;
549 pp->sp_iin.c_cflag = TTYDEF_CFLAG;
550 pp->sp_iin.c_lflag = TTYDEF_LFLAG;
551 termioschars(&pp->sp_iin);
552 pp->sp_iin.c_ispeed = pp->sp_iin.c_ospeed =
553 TTYDEF_SPEED;;
554 pp->sp_iout = pp->sp_iin;
555 }
556try_next2:
557 if (modp->sm_next == 0) {
558 printf("si%d: card: %s, ports: %d, modules: %d, type: %d%s\n",
559 unit,
560 sc->sc_typename,
561 sc->sc_nport,
562 nmodule,
563 uart_type,
564 si_modulename(sc->sc_type, uart_type));
565 break;
566 }
567 modp = (struct si_module *)
568 (maddr + (unsigned)(modp->sm_next & 0x7fff));
569 }
570 if (done_chartimes == 0) {
571 for (spt = chartimes ; spt->sp_speed != -1; spt++) {
572 if ((spt->sp_code /= hz) == 0)
573 spt->sp_code = 1;
574 }
575 done_chartimes = 1;
576 }
577
578/* path name devsw minor type uid gid perm*/
579 for (x = 0; x < sc->sc_nport; x++) {
580 /* sync with the manuals that start at 1 */
581 y = x + 1 + unit * (1 << SI_CARDSHIFT);
582 make_dev(&si_cdevsw, x, 0, 0, 0600, "ttyA%02d", y);
583 make_dev(&si_cdevsw, x + 0x00080, 0, 0, 0600, "cuaA%02d", y);
584 make_dev(&si_cdevsw, x + 0x10000, 0, 0, 0600, "ttyiA%02d", y);
585 make_dev(&si_cdevsw, x + 0x10080, 0, 0, 0600, "cuaiA%02d", y);
586 make_dev(&si_cdevsw, x + 0x20000, 0, 0, 0600, "ttylA%02d", y);
587 make_dev(&si_cdevsw, x + 0x20080, 0, 0, 0600, "cualA%02d", y);
588 }
589 make_dev(&si_cdevsw, 0x40000, 0, 0, 0600, "si_control");
590 return (0);
591}
592
593static int
594siopen(dev_t dev, int flag, int mode, struct thread *td)
595{
596 int oldspl, error;
597 int card, port;
598 struct si_softc *sc;
599 struct tty *tp;
600 volatile struct si_channel *ccbp;
601 struct si_port *pp;
602 int mynor = minor(dev);
603
604 /* quickly let in /dev/si_control */
605 if (IS_CONTROLDEV(mynor)) {
606 if ((error = suser(td)))
607 return(error);
608 return(0);
609 }
610
611 card = SI_CARD(mynor);
612 sc = devclass_get_softc(si_devclass, card);
613 if (sc == NULL)
614 return (ENXIO);
615
616 if (sc->sc_type == SIEMPTY) {
617 DPRINT((0, DBG_OPEN|DBG_FAIL, "si%d: type %s??\n",
618 card, sc->sc_typename));
619 return(ENXIO);
620 }
621
622 port = SI_PORT(mynor);
623 if (port >= sc->sc_nport) {
624 DPRINT((0, DBG_OPEN|DBG_FAIL, "si%d: nports %d\n",
625 card, sc->sc_nport));
626 return(ENXIO);
627 }
628
629#ifdef POLL
630 /*
631 * We've now got a device, so start the poller.
632 */
633 if (init_finished == 0) {
634 timeout(si_poll, (caddr_t)0L, si_pollrate);
635 init_finished = 1;
636 }
637#endif
638
639 /* initial/lock device */
640 if (IS_STATE(mynor)) {
641 return(0);
642 }
643
644 pp = sc->sc_ports + port;
645 tp = pp->sp_tty; /* the "real" tty */
646 dev->si_tty = tp;
647 ccbp = pp->sp_ccb; /* Find control block */
648 DPRINT((pp, DBG_ENTRY|DBG_OPEN, "siopen(%s,%x,%x,%x)\n",
649 devtoname(dev), flag, mode, td));
650
651 oldspl = spltty(); /* Keep others out */
652 error = 0;
653
654open_top:
655 while (pp->sp_state & SS_DTR_OFF) {
656 error = tsleep(&pp->sp_dtr_wait, TTIPRI|PCATCH, "sidtr", 0);
657 if (error != 0)
658 goto out;
659 }
660
661 if (tp->t_state & TS_ISOPEN) {
662 /*
663 * The device is open, so everything has been initialised.
664 * handle conflicts.
665 */
666 if (IS_CALLOUT(mynor)) {
667 if (!pp->sp_active_out) {
668 error = EBUSY;
669 goto out;
670 }
671 } else {
672 if (pp->sp_active_out) {
673 if (flag & O_NONBLOCK) {
674 error = EBUSY;
675 goto out;
676 }
677 error = tsleep(&pp->sp_active_out,
678 TTIPRI|PCATCH, "sibi", 0);
679 if (error != 0)
680 goto out;
681 goto open_top;
682 }
683 }
684 if (tp->t_state & TS_XCLUDE &&
685 suser(td)) {
686 DPRINT((pp, DBG_OPEN|DBG_FAIL,
687 "already open and EXCLUSIVE set\n"));
688 error = EBUSY;
689 goto out;
690 }
691 } else {
692 /*
693 * The device isn't open, so there are no conflicts.
694 * Initialize it. Avoid sleep... :-)
695 */
696 DPRINT((pp, DBG_OPEN, "first open\n"));
697 tp->t_oproc = si_start;
698 tp->t_stop = si_stop;
699 tp->t_param = siparam;
700 tp->t_dev = dev;
701 tp->t_termios = mynor & SI_CALLOUT_MASK
702 ? pp->sp_iout : pp->sp_iin;
703
704 (void) si_modem(pp, SET, TIOCM_DTR|TIOCM_RTS);
705
706 ++pp->sp_wopeners; /* in case of sleep in siparam */
707
708 error = siparam(tp, &tp->t_termios);
709
710 --pp->sp_wopeners;
711 if (error != 0)
712 goto out;
713 /* XXX: we should goto_top if siparam slept */
714
715 /* set initial DCD state */
716 pp->sp_last_hi_ip = ccbp->hi_ip;
717 if ((pp->sp_last_hi_ip & IP_DCD) || IS_CALLOUT(mynor)) {
718 (*linesw[tp->t_line].l_modem)(tp, 1);
719 }
720 }
721
722 /* whoops! we beat the close! */
723 if (pp->sp_state & SS_CLOSING) {
724 /* try and stop it from proceeding to bash the hardware */
725 pp->sp_state &= ~SS_CLOSING;
726 }
727
728 /*
729 * Wait for DCD if necessary
730 */
731 if (!(tp->t_state & TS_CARR_ON) &&
732 !IS_CALLOUT(mynor) &&
733 !(tp->t_cflag & CLOCAL) &&
734 !(flag & O_NONBLOCK)) {
735 ++pp->sp_wopeners;
736 DPRINT((pp, DBG_OPEN, "sleeping for carrier\n"));
737 error = tsleep(TSA_CARR_ON(tp), TTIPRI|PCATCH, "sidcd", 0);
738 --pp->sp_wopeners;
739 if (error != 0)
740 goto out;
741 goto open_top;
742 }
743
744 error = (*linesw[tp->t_line].l_open)(dev, tp);
745 si_disc_optim(tp, &tp->t_termios, pp);
746 if (tp->t_state & TS_ISOPEN && IS_CALLOUT(mynor))
747 pp->sp_active_out = TRUE;
748
749 pp->sp_state |= SS_OPEN; /* made it! */
750
751out:
752 splx(oldspl);
753
754 DPRINT((pp, DBG_OPEN, "leaving siopen\n"));
755
756 if (!(tp->t_state & TS_ISOPEN) && pp->sp_wopeners == 0)
757 sihardclose(pp);
758
759 return(error);
760}
761
762static int
763siclose(dev_t dev, int flag, int mode, struct thread *td)
764{
765 struct si_port *pp;
766 struct tty *tp;
767 int oldspl;
768 int error = 0;
769 int mynor = minor(dev);
770
771 if (IS_SPECIAL(mynor))
772 return(0);
773
774 oldspl = spltty();
775
776 pp = MINOR2PP(mynor);
777 tp = pp->sp_tty;
778
779 DPRINT((pp, DBG_ENTRY|DBG_CLOSE, "siclose(%s,%x,%x,%x) sp_state:%x\n",
780 devtoname(dev), flag, mode, td, pp->sp_state));
781
782 /* did we sleep and loose a race? */
783 if (pp->sp_state & SS_CLOSING) {
784 /* error = ESOMETING? */
785 goto out;
786 }
787
788 /* begin race detection.. */
789 pp->sp_state |= SS_CLOSING;
790
791 si_write_enable(pp, 0); /* block writes for ttywait() */
792
793 /* THIS MAY SLEEP IN TTYWAIT!!! */
794 (*linesw[tp->t_line].l_close)(tp, flag);
795
796 si_write_enable(pp, 1);
797
798 /* did we sleep and somebody started another open? */
799 if (!(pp->sp_state & SS_CLOSING)) {
800 /* error = ESOMETING? */
801 goto out;
802 }
803 /* ok. we are now still on the right track.. nuke the hardware */
804
805 if (pp->sp_state & SS_LSTART) {
806 untimeout(si_lstart, (caddr_t)pp, pp->lstart_ch);
807 pp->sp_state &= ~SS_LSTART;
808 }
809
810 si_stop(tp, FREAD | FWRITE);
811
812 sihardclose(pp);
813 ttyclose(tp);
814 pp->sp_state &= ~SS_OPEN;
815
816out:
817 DPRINT((pp, DBG_CLOSE|DBG_EXIT, "close done, returning\n"));
818 splx(oldspl);
819 return(error);
820}
821
822static void
823sihardclose(struct si_port *pp)
824{
825 int oldspl;
826 struct tty *tp;
827 volatile struct si_channel *ccbp;
828
829 oldspl = spltty();
830
831 tp = pp->sp_tty;
832 ccbp = pp->sp_ccb; /* Find control block */
833 if (tp->t_cflag & HUPCL ||
834 (!pp->sp_active_out &&
835 !(ccbp->hi_ip & IP_DCD) &&
836 !(pp->sp_iin.c_cflag && CLOCAL)) ||
837 !(tp->t_state & TS_ISOPEN)) {
838
839 (void) si_modem(pp, BIC, TIOCM_DTR|TIOCM_RTS);
840 (void) si_command(pp, FCLOSE, SI_NOWAIT);
841
842 if (pp->sp_dtr_wait != 0) {
843 timeout(sidtrwakeup, pp, pp->sp_dtr_wait);
844 pp->sp_state |= SS_DTR_OFF;
845 }
846
847 }
848 pp->sp_active_out = FALSE;
849 wakeup(&pp->sp_active_out);
850 wakeup(TSA_CARR_ON(tp));
851
852 splx(oldspl);
853}
854
855
856/*
857 * called at splsoftclock()...
858 */
859static void
860sidtrwakeup(void *chan)
861{
862 struct si_port *pp;
863 int oldspl;
864
865 oldspl = spltty();
866
867 pp = (struct si_port *)chan;
868 pp->sp_state &= ~SS_DTR_OFF;
869 wakeup(&pp->sp_dtr_wait);
870
871 splx(oldspl);
872}
873
874static int
875siwrite(dev_t dev, struct uio *uio, int flag)
876{
877 struct si_port *pp;
878 struct tty *tp;
879 int error = 0;
880 int mynor = minor(dev);
881 int oldspl;
882
883 if (IS_SPECIAL(mynor)) {
884 DPRINT((0, DBG_ENTRY|DBG_FAIL|DBG_WRITE, "siwrite(CONTROLDEV!!)\n"));
885 return(ENODEV);
886 }
887 pp = MINOR2PP(mynor);
888 tp = pp->sp_tty;
889 DPRINT((pp, DBG_WRITE, "siwrite(%s,%x,%x)\n", devtoname(dev), uio, flag));
890
891 oldspl = spltty();
892 /*
893 * If writes are currently blocked, wait on the "real" tty
894 */
895 while (pp->sp_state & SS_BLOCKWRITE) {
896 pp->sp_state |= SS_WAITWRITE;
897 DPRINT((pp, DBG_WRITE, "in siwrite, wait for SS_BLOCKWRITE to clear\n"));
898 if ((error = ttysleep(tp, (caddr_t)pp, TTOPRI|PCATCH,
899 "siwrite", tp->t_timeout))) {
900 if (error == EWOULDBLOCK)
901 error = EIO;
902 goto out;
903 }
904 }
905
906 error = (*linesw[tp->t_line].l_write)(tp, uio, flag);
907out:
908 splx(oldspl);
909 return (error);
910}
911
912
913static int
914siioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
915{
916 struct si_port *pp;
917 struct tty *tp;
918 int error;
919 int mynor = minor(dev);
920 int oldspl;
921 int blocked = 0;
922#if defined(COMPAT_43)
923 u_long oldcmd;
924 struct termios term;
925#endif
926
927 if (IS_SI_IOCTL(cmd))
928 return(si_Sioctl(dev, cmd, data, flag, td));
929
930 pp = MINOR2PP(mynor);
931 tp = pp->sp_tty;
932
933 DPRINT((pp, DBG_ENTRY|DBG_IOCTL, "siioctl(%s,%lx,%x,%x)\n",
934 devtoname(dev), cmd, data, flag));
935 if (IS_STATE(mynor)) {
936 struct termios *ct;
937
938 switch (mynor & SI_STATE_MASK) {
939 case SI_INIT_STATE_MASK:
940 ct = IS_CALLOUT(mynor) ? &pp->sp_iout : &pp->sp_iin;
941 break;
942 case SI_LOCK_STATE_MASK:
943 ct = IS_CALLOUT(mynor) ? &pp->sp_lout : &pp->sp_lin;
944 break;
945 default:
946 return (ENODEV);
947 }
948 switch (cmd) {
949 case TIOCSETA:
950 error = suser(td);
951 if (error != 0)
952 return (error);
953 *ct = *(struct termios *)data;
954 return (0);
955 case TIOCGETA:
956 *(struct termios *)data = *ct;
957 return (0);
958 case TIOCGETD:
959 *(int *)data = TTYDISC;
960 return (0);
961 case TIOCGWINSZ:
962 bzero(data, sizeof(struct winsize));
963 return (0);
964 default:
965 return (ENOTTY);
966 }
967 }
968 /*
969 * Do the old-style ioctl compat routines...
970 */
971#if defined(COMPAT_43)
972 term = tp->t_termios;
973 oldcmd = cmd;
974 error = ttsetcompat(tp, &cmd, data, &term);
975 if (error != 0)
976 return (error);
977 if (cmd != oldcmd)
978 data = (caddr_t)&term;
979#endif
980 /*
981 * Do the initial / lock state business
982 */
983 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
984 int cc;
985 struct termios *dt = (struct termios *)data;
986 struct termios *lt = mynor & SI_CALLOUT_MASK
987 ? &pp->sp_lout : &pp->sp_lin;
988
989 dt->c_iflag = (tp->t_iflag & lt->c_iflag) |
990 (dt->c_iflag & ~lt->c_iflag);
991 dt->c_oflag = (tp->t_oflag & lt->c_oflag) |
992 (dt->c_oflag & ~lt->c_oflag);
993 dt->c_cflag = (tp->t_cflag & lt->c_cflag) |
994 (dt->c_cflag & ~lt->c_cflag);
995 dt->c_lflag = (tp->t_lflag & lt->c_lflag) |
996 (dt->c_lflag & ~lt->c_lflag);
997 for (cc = 0; cc < NCCS; ++cc)
998 if (lt->c_cc[cc] != 0)
999 dt->c_cc[cc] = tp->t_cc[cc];
1000 if (lt->c_ispeed != 0)
1001 dt->c_ispeed = tp->t_ispeed;
1002 if (lt->c_ospeed != 0)
1003 dt->c_ospeed = tp->t_ospeed;
1004 }
1005
1006 /*
1007 * Block user-level writes to give the ttywait()
1008 * a chance to completely drain for commands
1009 * that require the port to be in a quiescent state.
1010 */
1011 switch (cmd) {
1012 case TIOCSETAW:
1013 case TIOCSETAF:
1014 case TIOCDRAIN:
1015#ifdef COMPAT_43
1016 case TIOCSETP:
1017#endif
1018 blocked++; /* block writes for ttywait() and siparam() */
1019 si_write_enable(pp, 0);
1020 }
1021
1022 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td);
1023 if (error != ENOIOCTL)
1024 goto out;
1025
1026 oldspl = spltty();
1027
1028 error = ttioctl(tp, cmd, data, flag);
1029 si_disc_optim(tp, &tp->t_termios, pp);
1030 if (error != ENOIOCTL) {
1031 splx(oldspl);
1032 goto out;
1033 }
1034
1035 error = 0;
1036 switch (cmd) {
1037 case TIOCSBRK:
1038 si_command(pp, SBREAK, SI_WAIT);
1039 break;
1040 case TIOCCBRK:
1041 si_command(pp, EBREAK, SI_WAIT);
1042 break;
1043 case TIOCSDTR:
1044 (void) si_modem(pp, SET, TIOCM_DTR|TIOCM_RTS);
1045 break;
1046 case TIOCCDTR:
1047 (void) si_modem(pp, SET, 0);
1048 break;
1049 case TIOCMSET:
1050 (void) si_modem(pp, SET, *(int *)data);
1051 break;
1052 case TIOCMBIS:
1053 (void) si_modem(pp, BIS, *(int *)data);
1054 break;
1055 case TIOCMBIC:
1056 (void) si_modem(pp, BIC, *(int *)data);
1057 break;
1058 case TIOCMGET:
1059 *(int *)data = si_modem(pp, GET, 0);
1060 break;
1061 case TIOCMSDTRWAIT:
1062 /* must be root since the wait applies to following logins */
1063 error = suser(td);
1064 if (error == 0)
1065 pp->sp_dtr_wait = *(int *)data * hz / 100;
1066 break;
1067 case TIOCMGDTRWAIT:
1068 *(int *)data = pp->sp_dtr_wait * 100 / hz;
1069 break;
1070 default:
1071 error = ENOTTY;
1072 }
1073 splx(oldspl);
1074
1075out:
1076 DPRINT((pp, DBG_IOCTL|DBG_EXIT, "siioctl ret %d\n", error));
1077 if (blocked)
1078 si_write_enable(pp, 1);
1079 return(error);
1080}
1081
1082/*
1083 * Handle the Specialix ioctls. All MUST be called via the CONTROL device
1084 */
1085static int
1086si_Sioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
1087{
1088 struct si_softc *xsc;
1089 struct si_port *xpp;
1090 volatile struct si_reg *regp;
1091 struct si_tcsi *dp;
1092 struct si_pstat *sps;
1093 int *ip, error = 0;
1094 int oldspl;
1095 int card, port;
1096 int mynor = minor(dev);
1097
1098 DPRINT((0, DBG_ENTRY|DBG_IOCTL, "si_Sioctl(%s,%lx,%x,%x)\n",
1099 devtoname(dev), cmd, data, flag));
1100
1101#if 1
1102 DPRINT((0, DBG_IOCTL, "TCSI_PORT=%x\n", TCSI_PORT));
1103 DPRINT((0, DBG_IOCTL, "TCSI_CCB=%x\n", TCSI_CCB));
1104 DPRINT((0, DBG_IOCTL, "TCSI_TTY=%x\n", TCSI_TTY));
1105#endif
1106
1107 if (!IS_CONTROLDEV(mynor)) {
1108 DPRINT((0, DBG_IOCTL|DBG_FAIL, "not called from control device!\n"));
1109 return(ENODEV);
1110 }
1111
1112 oldspl = spltty(); /* better safe than sorry */
1113
1114 ip = (int *)data;
1115
1116#define SUCHECK if ((error = suser(td))) goto out
1117
1118 switch (cmd) {
1119 case TCSIPORTS:
1120 *ip = si_Nports;
1121 goto out;
1122 case TCSIMODULES:
1123 *ip = si_Nmodules;
1124 goto out;
1125 case TCSISDBG_ALL:
1126 SUCHECK;
1127 si_debug = *ip;
1128 goto out;
1129 case TCSIGDBG_ALL:
1130 *ip = si_debug;
1131 goto out;
1132 default:
1133 /*
1134 * Check that a controller for this port exists
1135 */
1136
1137 /* may also be a struct si_pstat, a superset of si_tcsi */
1138
1139 dp = (struct si_tcsi *)data;
1140 sps = (struct si_pstat *)data;
1141 card = dp->tc_card;
1142 xsc = devclass_get_softc(si_devclass, card); /* check.. */
1143 if (xsc == NULL || xsc->sc_type == SIEMPTY) {
1144 error = ENOENT;
1145 goto out;
1146 }
1147 /*
1148 * And check that a port exists
1149 */
1150 port = dp->tc_port;
1151 if (port < 0 || port >= xsc->sc_nport) {
1152 error = ENOENT;
1153 goto out;
1154 }
1155 xpp = xsc->sc_ports + port;
1156 regp = (struct si_reg *)xsc->sc_maddr;
1157 }
1158
1159 switch (cmd) {
1160 case TCSIDEBUG:
1161#ifdef SI_DEBUG
1162 SUCHECK;
1163 if (xpp->sp_debug)
1164 xpp->sp_debug = 0;
1165 else {
1166 xpp->sp_debug = DBG_ALL;
1167 DPRINT((xpp, DBG_IOCTL, "debug toggled %s\n",
1168 (xpp->sp_debug&DBG_ALL)?"ON":"OFF"));
1169 }
1170 break;
1171#else
1172 error = ENODEV;
1173 goto out;
1174#endif
1175 case TCSISDBG_LEVEL:
1176 case TCSIGDBG_LEVEL:
1177#ifdef SI_DEBUG
1178 if (cmd == TCSIGDBG_LEVEL) {
1179 dp->tc_dbglvl = xpp->sp_debug;
1180 } else {
1181 SUCHECK;
1182 xpp->sp_debug = dp->tc_dbglvl;
1183 }
1184 break;
1185#else
1186 error = ENODEV;
1187 goto out;
1188#endif
1189 case TCSIGRXIT:
1190 dp->tc_int = regp->rx_int_count;
1191 break;
1192 case TCSIRXIT:
1193 SUCHECK;
1194 regp->rx_int_count = dp->tc_int;
1195 break;
1196 case TCSIGIT:
1197 dp->tc_int = regp->int_count;
1198 break;
1199 case TCSIIT:
1200 SUCHECK;
1201 regp->int_count = dp->tc_int;
1202 break;
1203 case TCSISTATE:
1204 dp->tc_int = xpp->sp_ccb->hi_ip;
1205 break;
1206 /* these next three use a different structure */
1207 case TCSI_PORT:
1208 SUCHECK;
1209 si_bcopy(xpp, &sps->tc_siport, sizeof(sps->tc_siport));
1210 break;
1211 case TCSI_CCB:
1212 SUCHECK;
1213 si_vbcopy(xpp->sp_ccb, &sps->tc_ccb, sizeof(sps->tc_ccb));
1214 break;
1215 case TCSI_TTY:
1216 SUCHECK;
1217 si_bcopy(xpp->sp_tty, &sps->tc_tty, sizeof(sps->tc_tty));
1218 break;
1219 default:
1220 error = EINVAL;
1221 goto out;
1222 }
1223out:
1224 splx(oldspl);
1225 return(error); /* success */
1226}
1227
1228/*
1229 * siparam() : Configure line params
1230 * called at spltty();
1231 * this may sleep, does not flush, nor wait for drain, nor block writes
1232 * caller must arrange this if it's important..
1233 */
1234static int
1235siparam(struct tty *tp, struct termios *t)
1236{
1237 struct si_port *pp = TP2PP(tp);
1238 volatile struct si_channel *ccbp;
1239 int oldspl, cflag, iflag, oflag, lflag;
1240 int error = 0; /* shutup gcc */
1241 int ispeed = 0; /* shutup gcc */
1242 int ospeed = 0; /* shutup gcc */
1243 BYTE val;
1244
1245 DPRINT((pp, DBG_ENTRY|DBG_PARAM, "siparam(%x,%x)\n", tp, t));
1246 cflag = t->c_cflag;
1247 iflag = t->c_iflag;
1248 oflag = t->c_oflag;
1249 lflag = t->c_lflag;
1250 DPRINT((pp, DBG_PARAM, "OFLAG 0x%x CFLAG 0x%x IFLAG 0x%x LFLAG 0x%x\n",
1251 oflag, cflag, iflag, lflag));
1252
1253 /* XXX - if Jet host and SXDC module, use extended baud rates */
1254
1255 /* if not hung up.. */
1256 if (t->c_ospeed != 0) {
1257 /* translate baud rate to firmware values */
1258 ospeed = ttspeedtab(t->c_ospeed, bdrates);
1259 ispeed = t->c_ispeed ?
1260 ttspeedtab(t->c_ispeed, bdrates) : ospeed;
1261
1262 /* enforce legit baud rate */
1263 if (ospeed < 0 || ispeed < 0)
1264 return (EINVAL);
1265 }
1266
1267 oldspl = spltty();
1268
1269 ccbp = pp->sp_ccb;
1270
1271 /* ========== set hi_break ========== */
1272 val = 0;
1273 if (iflag & IGNBRK) /* Breaks */
1274 val |= BR_IGN;
1275 if (iflag & BRKINT) /* Interrupt on break? */
1276 val |= BR_INT;
1277 if (iflag & PARMRK) /* Parity mark? */
1278 val |= BR_PARMRK;
1279 if (iflag & IGNPAR) /* Ignore chars with parity errors? */
1280 val |= BR_PARIGN;
1281 ccbp->hi_break = val;
1282
1283 /* ========== set hi_csr ========== */
1284 /* if not hung up.. */
1285 if (t->c_ospeed != 0) {
1286 /* Set I/O speeds */
1287 val = (ispeed << 4) | ospeed;
1288 }
1289 ccbp->hi_csr = val;
1290
1291 /* ========== set hi_mr2 ========== */
1292 val = 0;
1293 if (cflag & CSTOPB) /* Stop bits */
1294 val |= MR2_2_STOP;
1295 else
1296 val |= MR2_1_STOP;
1297 /*
1298 * Enable H/W RTS/CTS handshaking. The default TA/MTA is
1299 * a DCE, hence the reverse sense of RTS and CTS
1300 */
1301 /* Output Flow - RTS must be raised before data can be sent */
1302 if (cflag & CCTS_OFLOW)
1303 val |= MR2_RTSCONT;
1304
1305 ccbp->hi_mr2 = val;
1306
1307 /* ========== set hi_mr1 ========== */
1308 val = 0;
1309 if (!(cflag & PARENB)) /* Parity */
1310 val |= MR1_NONE;
1311 else
1312 val |= MR1_WITH;
1313 if (cflag & PARODD)
1314 val |= MR1_ODD;
1315
1316 if ((cflag & CS8) == CS8) { /* 8 data bits? */
1317 val |= MR1_8_BITS;
1318 } else if ((cflag & CS7) == CS7) { /* 7 data bits? */
1319 val |= MR1_7_BITS;
1320 } else if ((cflag & CS6) == CS6) { /* 6 data bits? */
1321 val |= MR1_6_BITS;
1322 } else { /* Must be 5 */
1323 val |= MR1_5_BITS;
1324 }
1325 /*
1326 * Enable H/W RTS/CTS handshaking. The default TA/MTA is
1327 * a DCE, hence the reverse sense of RTS and CTS
1328 */
1329 /* Input Flow - CTS is raised when port is ready to receive data */
1330 if (cflag & CRTS_IFLOW)
1331 val |= MR1_CTSCONT;
1332
1333 ccbp->hi_mr1 = val;
1334
1335 /* ========== set hi_mask ========== */
1336 val = 0xff;
1337 if ((cflag & CS8) == CS8) { /* 8 data bits? */
1338 val &= 0xFF;
1339 } else if ((cflag & CS7) == CS7) { /* 7 data bits? */
1340 val &= 0x7F;
1341 } else if ((cflag & CS6) == CS6) { /* 6 data bits? */
1342 val &= 0x3F;
1343 } else { /* Must be 5 */
1344 val &= 0x1F;
1345 }
1346 if (iflag & ISTRIP)
1347 val &= 0x7F;
1348
1349 ccbp->hi_mask = val;
1350
1351 /* ========== set hi_prtcl ========== */
1352 val = SP_DCEN; /* Monitor DCD always, or TIOCMGET misses it */
1353 if (iflag & IXANY)
1354 val |= SP_TANY;
1355 if (iflag & IXON)
1356 val |= SP_TXEN;
1357 if (iflag & IXOFF)
1358 val |= SP_RXEN;
1359 if (iflag & INPCK)
1360 val |= SP_PAEN;
1361
1362 ccbp->hi_prtcl = val;
1363
1364
1365 /* ========== set hi_{rx|tx}{on|off} ========== */
1366 /* XXX: the card TOTALLY shields us from the flow control... */
1367 ccbp->hi_txon = t->c_cc[VSTART];
1368 ccbp->hi_txoff = t->c_cc[VSTOP];
1369
1370 ccbp->hi_rxon = t->c_cc[VSTART];
1371 ccbp->hi_rxoff = t->c_cc[VSTOP];
1372
1373 /* ========== send settings to the card ========== */
1374 /* potential sleep here */
1375 if (ccbp->hi_stat == IDLE_CLOSE) /* Not yet open */
1376 si_command(pp, LOPEN, SI_WAIT); /* open it */
1377 else
1378 si_command(pp, CONFIG, SI_WAIT); /* change params */
1379
1380 /* ========== set DTR etc ========== */
1381 /* Hangup if ospeed == 0 */
1382 if (t->c_ospeed == 0) {
1383 (void) si_modem(pp, BIC, TIOCM_DTR|TIOCM_RTS);
1384 } else {
1385 /*
1386 * If the previous speed was 0, may need to re-enable
1387 * the modem signals
1388 */
1389 (void) si_modem(pp, SET, TIOCM_DTR|TIOCM_RTS);
1390 }
1391
1392 DPRINT((pp, DBG_PARAM, "siparam, complete: MR1 %x MR2 %x HI_MASK %x PRTCL %x HI_BREAK %x\n",
1393 ccbp->hi_mr1, ccbp->hi_mr2, ccbp->hi_mask, ccbp->hi_prtcl, ccbp->hi_break));
1394
1395 splx(oldspl);
1396 return(error);
1397}
1398
1399/*
1400 * Enable or Disable the writes to this channel...
1401 * "state" -> enabled = 1; disabled = 0;
1402 */
1403static void
1404si_write_enable(struct si_port *pp, int state)
1405{
1406 int oldspl;
1407
1408 oldspl = spltty();
1409
1410 if (state) {
1411 pp->sp_state &= ~SS_BLOCKWRITE;
1412 if (pp->sp_state & SS_WAITWRITE) {
1413 pp->sp_state &= ~SS_WAITWRITE;
1414 /* thunder away! */
1415 wakeup(pp);
1416 }
1417 } else {
1418 pp->sp_state |= SS_BLOCKWRITE;
1419 }
1420
1421 splx(oldspl);
1422}
1423
1424/*
1425 * Set/Get state of modem control lines.
1426 * Due to DCE-like behaviour of the adapter, some signals need translation:
1427 * TIOCM_DTR DSR
1428 * TIOCM_RTS CTS
1429 */
1430static int
1431si_modem(struct si_port *pp, enum si_mctl cmd, int bits)
1432{
1433 volatile struct si_channel *ccbp;
1434 int x;
1435
1436 DPRINT((pp, DBG_ENTRY|DBG_MODEM, "si_modem(%x,%s,%x)\n", pp, si_mctl2str(cmd), bits));
1437 ccbp = pp->sp_ccb; /* Find channel address */
1438 switch (cmd) {
1439 case GET:
1440 x = ccbp->hi_ip;
1441 bits = TIOCM_LE;
1442 if (x & IP_DCD) bits |= TIOCM_CAR;
1443 if (x & IP_DTR) bits |= TIOCM_DTR;
1444 if (x & IP_RTS) bits |= TIOCM_RTS;
1445 if (x & IP_RI) bits |= TIOCM_RI;
1446 return(bits);
1447 case SET:
1448 ccbp->hi_op &= ~(OP_DSR|OP_CTS);
1449 /* fall through */
1450 case BIS:
1451 x = 0;
1452 if (bits & TIOCM_DTR)
1453 x |= OP_DSR;
1454 if (bits & TIOCM_RTS)
1455 x |= OP_CTS;
1456 ccbp->hi_op |= x;
1457 break;
1458 case BIC:
1459 if (bits & TIOCM_DTR)
1460 ccbp->hi_op &= ~OP_DSR;
1461 if (bits & TIOCM_RTS)
1462 ccbp->hi_op &= ~OP_CTS;
1463 }
1464 return 0;
1465}
1466
1467/*
1468 * Handle change of modem state
1469 */
1470static void
1471si_modem_state(struct si_port *pp, struct tty *tp, int hi_ip)
1472{
1473 /* if a modem dev */
1474 if (hi_ip & IP_DCD) {
1475 if (!(pp->sp_last_hi_ip & IP_DCD)) {
1476 DPRINT((pp, DBG_INTR, "modem carr on t_line %d\n",
1477 tp->t_line));
1478 (void)(*linesw[tp->t_line].l_modem)(tp, 1);
1479 }
1480 } else {
1481 if (pp->sp_last_hi_ip & IP_DCD) {
1482 DPRINT((pp, DBG_INTR, "modem carr off\n"));
1483 if ((*linesw[tp->t_line].l_modem)(tp, 0))
1484 (void) si_modem(pp, SET, 0);
1485 }
1486 }
1487 pp->sp_last_hi_ip = hi_ip;
1488
1489}
1490
1491/*
1492 * Poller to catch missed interrupts.
1493 *
1494 * Note that the SYSV Specialix drivers poll at 100 times per second to get
1495 * better response. We could really use a "periodic" version timeout(). :-)
1496 */
1497#ifdef POLL
1498static void
1499si_poll(void *nothing)
1500{
1501 struct si_softc *sc;
1502 int i;
1503 volatile struct si_reg *regp;
1504 struct si_port *pp;
1505 int lost, oldspl, port;
1506
1507 DPRINT((0, DBG_POLL, "si_poll()\n"));
1508 oldspl = spltty();
1509 if (in_intr)
1510 goto out;
1511 lost = 0;
1512 for (i = 0; i < si_numunits; i++) {
1513 sc = devclass_get_softc(si_devclass, i);
1514 if (sc == NULL || sc->sc_type == SIEMPTY)
1515 continue;
1516 regp = (struct si_reg *)sc->sc_maddr;
1517
1518 /*
1519 * See if there has been a pending interrupt for 2 seconds
1520 * or so. The test (int_scounter >= 200) won't correspond
1521 * to 2 seconds if int_count gets changed.
1522 */
1523 if (regp->int_pending != 0) {
1524 if (regp->int_scounter >= 200 &&
1525 regp->initstat == 1) {
1526 printf("si%d: lost intr\n", i);
1527 lost++;
1528 }
1529 } else {
1530 regp->int_scounter = 0;
1531 }
1532
1533 /*
1534 * gripe about no input flow control..
1535 */
1536 pp = sc->sc_ports;
1537 for (port = 0; port < sc->sc_nport; pp++, port++) {
1538 if (pp->sp_delta_overflows > 0) {
1539 printf("si%d: %d tty level buffer overflows\n",
1540 i, pp->sp_delta_overflows);
1541 pp->sp_delta_overflows = 0;
1542 }
1543 }
1544 }
1545 if (lost || si_realpoll)
1546 si_intr(NULL); /* call intr with fake vector */
1547out:
1548 splx(oldspl);
1549
1550 timeout(si_poll, (caddr_t)0L, si_pollrate);
1551}
1552#endif /* ifdef POLL */
1553
1554/*
1555 * The interrupt handler polls ALL ports on ALL adapters each time
1556 * it is called.
1557 */
1558
1559static BYTE si_rxbuf[SI_BUFFERSIZE]; /* input staging area */
1560static BYTE si_txbuf[SI_BUFFERSIZE]; /* output staging area */
1561
1562void
1563si_intr(void *arg)
1564{
1565 struct si_softc *sc;
1566 struct si_port *pp;
1567 volatile struct si_channel *ccbp;
1568 struct tty *tp;
1569 volatile caddr_t maddr;
1570 BYTE op, ip;
1571 int x, card, port, n, i, isopen;
1572 volatile BYTE *z;
1573 BYTE c;
1574
1575 sc = arg;
1576
1577 DPRINT((0, arg == NULL ? DBG_POLL:DBG_INTR, "si_intr\n"));
1578 if (in_intr)
1579 return;
1580 in_intr = 1;
1581
1582 /*
1583 * When we get an int we poll all the channels and do ALL pending
1584 * work, not just the first one we find. This allows all cards to
1585 * share the same vector.
1586 *
1587 * XXX - But if we're sharing the vector with something that's NOT
1588 * a SI/XIO/SX card, we may be making more work for ourselves.
1589 */
1590 for (card = 0; card < si_numunits; card++) {
1591 sc = devclass_get_softc(si_devclass, card);
1592 if (sc == NULL || sc->sc_type == SIEMPTY)
1593 continue;
1594
1595 /*
1596 * First, clear the interrupt
1597 */
1598 switch(sc->sc_type) {
1599 case SIHOST:
1600 maddr = sc->sc_maddr;
1601 ((volatile struct si_reg *)maddr)->int_pending = 0;
1602 /* flag nothing pending */
1603 *(maddr+SIINTCL) = 0x00; /* Set IRQ clear */
1604 *(maddr+SIINTCL_CL) = 0x00; /* Clear IRQ clear */
1605 break;
1606 case SIHOST2:
1607 maddr = sc->sc_maddr;
1608 ((volatile struct si_reg *)maddr)->int_pending = 0;
1609 *(maddr+SIPLIRQCLR) = 0x00;
1610 *(maddr+SIPLIRQCLR) = 0x10;
1611 break;
1612 case SIPCI:
1613 maddr = sc->sc_maddr;
1614 ((volatile struct si_reg *)maddr)->int_pending = 0;
1615 *(maddr+SIPCIINTCL) = 0x0;
1616 break;
1617 case SIJETPCI: /* fall through to JETISA case */
1618 case SIJETISA:
1619 maddr = sc->sc_maddr;
1620 ((volatile struct si_reg *)maddr)->int_pending = 0;
1621 *(maddr+SIJETINTCL) = 0x0;
1622 break;
1623 case SIEISA:
1624 maddr = sc->sc_maddr;
1625 ((volatile struct si_reg *)maddr)->int_pending = 0;
1626 (void)inb(sc->sc_iobase + 3);
1627 break;
1628 case SIEMPTY:
1629 default:
1630 continue;
1631 }
1632 ((volatile struct si_reg *)maddr)->int_scounter = 0;
1633
1634 /*
1635 * check each port
1636 */
1637 for (pp = sc->sc_ports, port = 0; port < sc->sc_nport;
1638 pp++, port++) {
1639 ccbp = pp->sp_ccb;
1640 tp = pp->sp_tty;
1641
1642 /*
1643 * See if a command has completed ?
1644 */
1645 if (ccbp->hi_stat != pp->sp_pend) {
1646 DPRINT((pp, DBG_INTR,
1647 "si_intr hi_stat = 0x%x, pend = %d\n",
1648 ccbp->hi_stat, pp->sp_pend));
1649 switch(pp->sp_pend) {
1650 case LOPEN:
1651 case MPEND:
1652 case MOPEN:
1653 case CONFIG:
1654 case SBREAK:
1655 case EBREAK:
1656 pp->sp_pend = ccbp->hi_stat;
1657 /* sleeping in si_command */
1658 wakeup(&pp->sp_state);
1659 break;
1660 default:
1661 pp->sp_pend = ccbp->hi_stat;
1662 }
1663 }
1664
1665 /*
1666 * Continue on if it's closed
1667 */
1668 if (ccbp->hi_stat == IDLE_CLOSE) {
1669 continue;
1670 }
1671
1672 /*
1673 * Do modem state change if not a local device
1674 */
1675 si_modem_state(pp, tp, ccbp->hi_ip);
1676
1677 /*
1678 * Check to see if we should 'receive' characters.
1679 */
1680 if (tp->t_state & TS_CONNECTED &&
1681 tp->t_state & TS_ISOPEN)
1682 isopen = 1;
1683 else
1684 isopen = 0;
1685
1686 /*
1687 * Do input break processing
1688 */
1689 if (ccbp->hi_state & ST_BREAK) {
1690 if (isopen) {
1691 (*linesw[tp->t_line].l_rint)(TTY_BI, tp);
1692 }
1693 ccbp->hi_state &= ~ST_BREAK; /* A Bit iffy this */
1694 DPRINT((pp, DBG_INTR, "si_intr break\n"));
1695 }
1696
1697 /*
1698 * Do RX stuff - if not open then dump any characters.
1699 * XXX: This is VERY messy and needs to be cleaned up.
1700 *
1701 * XXX: can we leave data in the host adapter buffer
1702 * when the clists are full? That may be dangerous
1703 * if the user cannot get an interrupt signal through.
1704 */
1705
1706 more_rx: /* XXX Sorry. the nesting was driving me bats! :-( */
1707
1708 if (!isopen) {
1709 ccbp->hi_rxopos = ccbp->hi_rxipos;
1710 goto end_rx;
1711 }
1712
1713 /*
1714 * If the tty input buffers are blocked, stop emptying
1715 * the incoming buffers and let the auto flow control
1716 * assert..
1717 */
1718 if (tp->t_state & TS_TBLOCK) {
1719 goto end_rx;
1720 }
1721
1722 /*
1723 * Process read characters if not skipped above
1724 */
1725 op = ccbp->hi_rxopos;
1726 ip = ccbp->hi_rxipos;
1727 c = ip - op;
1728 if (c == 0) {
1729 goto end_rx;
1730 }
1731
1732 n = c & 0xff;
1733 if (n > 250)
1734 n = 250;
1735
1736 DPRINT((pp, DBG_INTR, "n = %d, op = %d, ip = %d\n",
1737 n, op, ip));
1738
1739 /*
1740 * Suck characters out of host card buffer into the
1741 * "input staging buffer" - so that we dont leave the
1742 * host card in limbo while we're possibly echoing
1743 * characters and possibly flushing input inside the
1744 * ldisc l_rint() routine.
1745 */
1746 if (n <= SI_BUFFERSIZE - op) {
1747
1748 DPRINT((pp, DBG_INTR, "\tsingle copy\n"));
1749 z = ccbp->hi_rxbuf + op;
1750 si_vbcopy(z, si_rxbuf, n);
1751
1752 op += n;
1753 } else {
1754 x = SI_BUFFERSIZE - op;
1755
1756 DPRINT((pp, DBG_INTR, "\tdouble part 1 %d\n", x));
1757 z = ccbp->hi_rxbuf + op;
1758 si_vbcopy(z, si_rxbuf, x);
1759
1760 DPRINT((pp, DBG_INTR, "\tdouble part 2 %d\n",
1761 n - x));
1762 z = ccbp->hi_rxbuf;
1763 si_vbcopy(z, si_rxbuf + x, n - x);
1764
1765 op += n;
1766 }
1767
1768 /* clear collected characters from buffer */
1769 ccbp->hi_rxopos = op;
1770
1771 DPRINT((pp, DBG_INTR, "n = %d, op = %d, ip = %d\n",
1772 n, op, ip));
1773
1774 /*
1775 * at this point...
1776 * n = number of chars placed in si_rxbuf
1777 */
1778
1779 /*
1780 * Avoid the grotesquely inefficient lineswitch
1781 * routine (ttyinput) in "raw" mode. It usually
1782 * takes about 450 instructions (that's without
1783 * canonical processing or echo!). slinput is
1784 * reasonably fast (usually 40 instructions
1785 * plus call overhead).
1786 */
1787 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1788
1789 /* block if the driver supports it */
1790 if (tp->t_rawq.c_cc + n >= SI_I_HIGH_WATER &&
1791 (tp->t_cflag & CRTS_IFLOW ||
1792 tp->t_iflag & IXOFF) &&
1793 !(tp->t_state & TS_TBLOCK))
1794 ttyblock(tp);
1795
1796 tk_nin += n;
1797 tk_rawcc += n;
1798 tp->t_rawcc += n;
1799
1800 pp->sp_delta_overflows +=
1801 b_to_q((char *)si_rxbuf, n, &tp->t_rawq);
1802
1803 ttwakeup(tp);
1804 if (tp->t_state & TS_TTSTOP &&
1805 (tp->t_iflag & IXANY ||
1806 tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1807 tp->t_state &= ~TS_TTSTOP;
1808 tp->t_lflag &= ~FLUSHO;
1809 si_start(tp);
1810 }
1811 } else {
1812 /*
1813 * It'd be nice to not have to go through the
1814 * function call overhead for each char here.
1815 * It'd be nice to block input it, saving a
1816 * loop here and the call/return overhead.
1817 */
1818 for(x = 0; x < n; x++) {
1819 i = si_rxbuf[x];
1820 if ((*linesw[tp->t_line].l_rint)(i, tp)
1821 == -1) {
1822 pp->sp_delta_overflows++;
1823 }
1824 }
1825 }
1826 goto more_rx; /* try for more until RXbuf is empty */
1827
1828 end_rx: /* XXX: Again, sorry about the gotos.. :-) */
1829
1830 /*
1831 * Do TX stuff
1832 */
1833 (*linesw[tp->t_line].l_start)(tp);
1834
1835 } /* end of for (all ports on this controller) */
1836 } /* end of for (all controllers) */
1837
1838 in_intr = 0;
1839 DPRINT((0, arg == NULL ? DBG_POLL:DBG_INTR, "end si_intr\n"));
1840}
1841
1842/*
1843 * Nudge the transmitter...
1844 *
1845 * XXX: I inherited some funny code here. It implies the host card only
1846 * interrupts when the transmit buffer reaches the low-water-mark, and does
1847 * not interrupt when it's actually hits empty. In some cases, we have
1848 * processes waiting for complete drain, and we need to simulate an interrupt
1849 * about when we think the buffer is going to be empty (and retry if not).
1850 * I really am not certain about this... I *need* the hardware manuals.
1851 */
1852static void
1853si_start(struct tty *tp)
1854{
1855 struct si_port *pp;
1856 volatile struct si_channel *ccbp;
1857 struct clist *qp;
1858 BYTE ipos;
1859 int nchar;
1860 int oldspl, count, n, amount, buffer_full;
1861
1862 oldspl = spltty();
1863
1864 qp = &tp->t_outq;
1865 pp = TP2PP(tp);
1866
1867 DPRINT((pp, DBG_ENTRY|DBG_START,
1868 "si_start(%x) t_state %x sp_state %x t_outq.c_cc %d\n",
1869 tp, tp->t_state, pp->sp_state, qp->c_cc));
1870
1871 if (tp->t_state & (TS_TIMEOUT|TS_TTSTOP))
1872 goto out;
1873
1874 buffer_full = 0;
1875 ccbp = pp->sp_ccb;
1876
1877 count = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
1878 DPRINT((pp, DBG_START, "count %d\n", (BYTE)count));
1879
1880 while ((nchar = qp->c_cc) > 0) {
1881 if ((BYTE)count >= 255) {
1882 buffer_full++;
1883 break;
1884 }
1885 amount = min(nchar, (255 - (BYTE)count));
1886 ipos = (unsigned int)ccbp->hi_txipos;
1887 n = q_to_b(&tp->t_outq, si_txbuf, amount);
1888 /* will it fit in one lump? */
1889 if ((SI_BUFFERSIZE - ipos) >= n) {
1890 si_bcopyv(si_txbuf, &ccbp->hi_txbuf[ipos], n);
1891 } else {
1892 si_bcopyv(si_txbuf, &ccbp->hi_txbuf[ipos],
1893 SI_BUFFERSIZE - ipos);
1894 si_bcopyv(si_txbuf + (SI_BUFFERSIZE - ipos),
1895 &ccbp->hi_txbuf[0], n - (SI_BUFFERSIZE - ipos));
1896 }
1897 ccbp->hi_txipos += n;
1898 count = (int)ccbp->hi_txipos - (int)ccbp->hi_txopos;
1899 }
1900
1901 if (count != 0 && nchar == 0) {
1902 tp->t_state |= TS_BUSY;
1903 } else {
1904 tp->t_state &= ~TS_BUSY;
1905 }
1906
1907 /* wakeup time? */
1908 ttwwakeup(tp);
1909
1910 DPRINT((pp, DBG_START, "count %d, nchar %d, tp->t_state 0x%x\n",
1911 (BYTE)count, nchar, tp->t_state));
1912
1913 if (tp->t_state & TS_BUSY)
1914 {
1915 int time;
1916
1917 time = ttspeedtab(tp->t_ospeed, chartimes);
1918
1919 if (time > 0) {
1920 if (time < nchar)
1921 time = nchar / time;
1922 else
1923 time = 2;
1924 } else {
1925 DPRINT((pp, DBG_START,
1926 "bad char time value! %d\n", time));
1927 time = hz/10;
1928 }
1929
1930 if ((pp->sp_state & (SS_LSTART|SS_INLSTART)) == SS_LSTART) {
1931 untimeout(si_lstart, (caddr_t)pp, pp->lstart_ch);
1932 } else {
1933 pp->sp_state |= SS_LSTART;
1934 }
1935 DPRINT((pp, DBG_START, "arming lstart, time=%d\n", time));
1936 pp->lstart_ch = timeout(si_lstart, (caddr_t)pp, time);
1937 }
1938
1939out:
1940 splx(oldspl);
1941 DPRINT((pp, DBG_EXIT|DBG_START, "leave si_start()\n"));
1942}
1943
1944/*
1945 * Note: called at splsoftclock from the timeout code
1946 * This has to deal with two things... cause wakeups while waiting for
1947 * tty drains on last process exit, and call l_start at about the right
1948 * time for protocols like ppp.
1949 */
1950static void
1951si_lstart(void *arg)
1952{
1953 struct si_port *pp = arg;
1954 struct tty *tp;
1955 int oldspl;
1956
1957 DPRINT((pp, DBG_ENTRY|DBG_LSTART, "si_lstart(%x) sp_state %x\n",
1958 pp, pp->sp_state));
1959
1960 oldspl = spltty();
1961
1962 if ((pp->sp_state & SS_OPEN) == 0 || (pp->sp_state & SS_LSTART) == 0) {
1963 splx(oldspl);
1964 return;
1965 }
1966 pp->sp_state &= ~SS_LSTART;
1967 pp->sp_state |= SS_INLSTART;
1968
1969 tp = pp->sp_tty;
1970
1971 /* deal with the process exit case */
1972 ttwwakeup(tp);
1973
1974 /* nudge protocols - eg: ppp */
1975 (*linesw[tp->t_line].l_start)(tp);
1976
1977 pp->sp_state &= ~SS_INLSTART;
1978 splx(oldspl);
1979}
1980
1981/*
1982 * Stop output on a line. called at spltty();
1983 */
1984static void
1985si_stop(struct tty *tp, int rw)
1986{
1987 volatile struct si_channel *ccbp;
1988 struct si_port *pp;
1989
1990 pp = TP2PP(tp);
1991 ccbp = pp->sp_ccb;
1992
1993 DPRINT((TP2PP(tp), DBG_ENTRY|DBG_STOP, "si_stop(%x,%x)\n", tp, rw));
1994
1995 /* XXX: must check (rw & FWRITE | FREAD) etc flushing... */
1996 if (rw & FWRITE) {
1997 /* what level are we meant to be flushing anyway? */
1998 if (tp->t_state & TS_BUSY) {
1999 si_command(TP2PP(tp), WFLUSH, SI_NOWAIT);
2000 tp->t_state &= ~TS_BUSY;
2001 ttwwakeup(tp); /* Bruce???? */
2002 }
2003 }
2004#if 1 /* XXX: this doesn't work right yet.. */
2005 /* XXX: this may have been failing because we used to call l_rint()
2006 * while we were looping based on these two counters. Now, we collect
2007 * the data and then loop stuffing it into l_rint(), making this
2008 * useless. Should we cause this to blow away the staging buffer?
2009 */
2010 if (rw & FREAD) {
2011 ccbp->hi_rxopos = ccbp->hi_rxipos;
2012 }
2013#endif
2014}
2015
2016/*
2017 * Issue a command to the host card CPU.
2018 */
2019
2020static void
2021si_command(struct si_port *pp, int cmd, int waitflag)
2022{
2023 int oldspl;
2024 volatile struct si_channel *ccbp = pp->sp_ccb;
2025 int x;
2026
2027 DPRINT((pp, DBG_ENTRY|DBG_PARAM, "si_command(%x,%x,%d): hi_stat 0x%x\n",
2028 pp, cmd, waitflag, ccbp->hi_stat));
2029
2030 oldspl = spltty(); /* Keep others out */
2031
2032 /* wait until it's finished what it was doing.. */
2033 /* XXX: sits in IDLE_BREAK until something disturbs it or break
2034 * is turned off. */
2035 while((x = ccbp->hi_stat) != IDLE_OPEN &&
2036 x != IDLE_CLOSE &&
2037 x != IDLE_BREAK &&
2038 x != cmd) {
2039 if (in_intr) { /* Prevent sleep in intr */
2040 DPRINT((pp, DBG_PARAM,
2041 "cmd intr collision - completing %d\trequested %d\n",
2042 x, cmd));
2043 splx(oldspl);
2044 return;
2045 } else if (ttysleep(pp->sp_tty, (caddr_t)&pp->sp_state, TTIPRI|PCATCH,
2046 "sicmd1", 1)) {
2047 splx(oldspl);
2048 return;
2049 }
2050 }
2051 /* it should now be in IDLE_{OPEN|CLOSE|BREAK}, or "cmd" */
2052
2053 /* if there was a pending command, cause a state-change wakeup */
2054 switch(pp->sp_pend) {
2055 case LOPEN:
2056 case MPEND:
2057 case MOPEN:
2058 case CONFIG:
2059 case SBREAK:
2060 case EBREAK:
2061 wakeup(&pp->sp_state);
2062 break;
2063 default:
2064 break;
2065 }
2066
2067 pp->sp_pend = cmd; /* New command pending */
2068 ccbp->hi_stat = cmd; /* Post it */
2069
2070 if (waitflag) {
2071 if (in_intr) { /* If in interrupt handler */
2072 DPRINT((pp, DBG_PARAM,
2073 "attempt to sleep in si_intr - cmd req %d\n",
2074 cmd));
2075 splx(oldspl);
2076 return;
2077 } else while(ccbp->hi_stat != IDLE_OPEN &&
2078 ccbp->hi_stat != IDLE_BREAK) {
2079 if (ttysleep(pp->sp_tty, (caddr_t)&pp->sp_state, TTIPRI|PCATCH,
2080 "sicmd2", 0))
2081 break;
2082 }
2083 }
2084 splx(oldspl);
2085}
2086
2087static void
2088si_disc_optim(struct tty *tp, struct termios *t, struct si_port *pp)
2089{
2090 /*
2091 * XXX can skip a lot more cases if Smarts. Maybe
2092 * (IGNCR | ISTRIP | IXON) in c_iflag. But perhaps we
2093 * shouldn't skip if (TS_CNTTB | TS_LNCH) is set in t_state.
2094 */
2095 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) &&
2096 (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) &&
2097 (!(t->c_iflag & PARMRK) ||
2098 (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) &&
2099 !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) &&
2100 linesw[tp->t_line].l_rint == ttyinput)
2101 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2102 else
2103 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2104 pp->sp_hotchar = linesw[tp->t_line].l_hotchar;
2105 DPRINT((pp, DBG_OPTIM, "bypass: %s, hotchar: %x\n",
2106 (tp->t_state & TS_CAN_BYPASS_L_RINT) ? "on" : "off",
2107 pp->sp_hotchar));
2108}
2109
2110
2111#ifdef SI_DEBUG
2112
2113void
2114si_dprintf(struct si_port *pp, int flags, const char *fmt, ...)
2115{
2116 va_list ap;
2117
2118 if ((pp == NULL && (si_debug&flags)) ||
2119 (pp != NULL && ((pp->sp_debug&flags) || (si_debug&flags)))) {
2120 if (pp != NULL)
2121 printf("%ci%d(%d): ", 's',
2122 (int)SI_CARD(minor(pp->sp_tty->t_dev)),
2123 (int)SI_PORT(minor(pp->sp_tty->t_dev)));
2124 va_start(ap, fmt);
2125 vprintf(fmt, ap);
2126 va_end(ap);
2127 }
2128}
2129
2130static char *
2131si_mctl2str(enum si_mctl cmd)
2132{
2133 switch (cmd) {
2134 case GET:
2135 return("GET");
2136 case SET:
2137 return("SET");
2138 case BIS:
2139 return("BIS");
2140 case BIC:
2141 return("BIC");
2142 }
2143 return("BAD");
2144}
2145
2146#endif /* DEBUG */
2147
2148static char *
2149si_modulename(int host_type, int uart_type)
2150{
2151 switch (host_type) {
2152 /* Z280 based cards */
2153 case SIEISA:
2154 case SIHOST2:
2155 case SIHOST:
2156 case SIPCI:
2157 switch (uart_type) {
2158 case 0:
2159 return(" (XIO)");
2160 case 1:
2161 return(" (SI)");
2162 }
2163 break;
2164 /* T225 based hosts */
2165 case SIJETPCI:
2166 case SIJETISA:
2167 switch (uart_type) {
2168 case 0:
2169 return(" (SI)");
2170 case 40:
2171 return(" (XIO)");
2172 case 72:
2173 return(" (SXDC)");
2174 }
2175 break;
2176 }
2177 return("");
2178}
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