1/*-
2 * Copyright (c) 2017 Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 2017 Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
|
27__FBSDID("$FreeBSD: stable/11/sys/dev/sdhci/sdhci_acpi.c 318494 2017-05-18 20:46:20Z marius $");
| 27__FBSDID("$FreeBSD: stable/11/sys/dev/sdhci/sdhci_acpi.c 318496 2017-05-18 21:00:50Z marius $");
|
28
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/bus.h>
32#include <sys/kernel.h>
33#include <sys/lock.h>
34#include <sys/module.h>
35#include <sys/mutex.h>
36#include <sys/resource.h>
37#include <sys/rman.h>
38#include <sys/sysctl.h>
39#include <sys/taskqueue.h>
40
41#include <machine/bus.h>
42#include <machine/resource.h>
43
44#include <contrib/dev/acpica/include/acpi.h>
45#include <dev/acpica/acpivar.h>
46
47#include <dev/mmc/bridge.h>
48
49#include <dev/sdhci/sdhci.h>
50
51#include "mmcbr_if.h"
52#include "sdhci_if.h"
53
54static const struct sdhci_acpi_device {
55 const char* hid;
56 int uid;
57 const char *desc;
58 u_int quirks;
59} sdhci_acpi_devices[] = {
| 28
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/bus.h>
32#include <sys/kernel.h>
33#include <sys/lock.h>
34#include <sys/module.h>
35#include <sys/mutex.h>
36#include <sys/resource.h>
37#include <sys/rman.h>
38#include <sys/sysctl.h>
39#include <sys/taskqueue.h>
40
41#include <machine/bus.h>
42#include <machine/resource.h>
43
44#include <contrib/dev/acpica/include/acpi.h>
45#include <dev/acpica/acpivar.h>
46
47#include <dev/mmc/bridge.h>
48
49#include <dev/sdhci/sdhci.h>
50
51#include "mmcbr_if.h"
52#include "sdhci_if.h"
53
54static const struct sdhci_acpi_device {
55 const char* hid;
56 int uid;
57 const char *desc;
58 u_int quirks;
59} sdhci_acpi_devices[] = {
|
60 { "80860F14", 1, "Intel Bay Trail eMMC 4.5 Controller",
| 60 { "80860F14", 1, "Intel Bay Trail/Braswell eMMC 4.5/4.5.1 Controller",
|
61 SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE |
62 SDHCI_QUIRK_INTEL_POWER_UP_RESET |
63 SDHCI_QUIRK_WAIT_WHILE_BUSY |
64 SDHCI_QUIRK_MMC_DDR52 |
65 SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
66 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
| 61 SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE |
62 SDHCI_QUIRK_INTEL_POWER_UP_RESET |
63 SDHCI_QUIRK_WAIT_WHILE_BUSY |
64 SDHCI_QUIRK_MMC_DDR52 |
65 SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
66 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
|
67 { "80860F14", 3, "Intel Bay Trail SDXC Controller",
| 67 { "80860F14", 3, "Intel Bay Trail/Braswell SDXC Controller",
|
68 SDHCI_QUIRK_WAIT_WHILE_BUSY |
69 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
| 68 SDHCI_QUIRK_WAIT_WHILE_BUSY |
69 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
|
70 { "80860F16", 0, "Intel Bay Trail SDXC Controller",
| 70 { "80860F16", 0, "Intel Bay Trail/Braswell SDXC Controller",
|
71 SDHCI_QUIRK_WAIT_WHILE_BUSY |
72 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
| 71 SDHCI_QUIRK_WAIT_WHILE_BUSY |
72 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
|
| 73 { "80865ACA", 0, "Intel Apollo Lake SDXC Controller",
74 SDHCI_QUIRK_BROKEN_DMA | /* APL18 erratum */
75 SDHCI_QUIRK_WAIT_WHILE_BUSY |
76 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
77 { "80865ACC", 0, "Intel Apollo Lake eMMC 5.0 Controller",
78 SDHCI_QUIRK_BROKEN_DMA | /* APL18 erratum */
79 SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE |
80 SDHCI_QUIRK_INTEL_POWER_UP_RESET |
81 SDHCI_QUIRK_WAIT_WHILE_BUSY |
82 SDHCI_QUIRK_MMC_DDR52 |
83 SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
84 SDHCI_QUIRK_PRESET_VALUE_BROKEN },
|
73 { NULL, 0, NULL, 0}
74};
75
76static char *sdhci_ids[] = {
77 "80860F14",
78 "80860F16",
| 85 { NULL, 0, NULL, 0}
86};
87
88static char *sdhci_ids[] = {
89 "80860F14",
90 "80860F16",
|
| 91 "80865ACA",
92 "80865ACC",
|
79 NULL
80};
81
82struct sdhci_acpi_softc {
83 u_int quirks; /* Chip specific quirks */
84 struct resource *irq_res; /* IRQ resource */
85 void *intrhand; /* Interrupt handle */
86
87 struct sdhci_slot slot;
88 struct resource *mem_res; /* Memory resource */
89};
90
91static void sdhci_acpi_intr(void *arg);
92static int sdhci_acpi_detach(device_t dev);
93
94static uint8_t
95sdhci_acpi_read_1(device_t dev, struct sdhci_slot *slot __unused,
96 bus_size_t off)
97{
98 struct sdhci_acpi_softc *sc = device_get_softc(dev);
99
100 bus_barrier(sc->mem_res, 0, 0xFF,
101 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
102 return bus_read_1(sc->mem_res, off);
103}
104
105static void
106sdhci_acpi_write_1(device_t dev, struct sdhci_slot *slot __unused,
107 bus_size_t off, uint8_t val)
108{
109 struct sdhci_acpi_softc *sc = device_get_softc(dev);
110
111 bus_barrier(sc->mem_res, 0, 0xFF,
112 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
113 bus_write_1(sc->mem_res, off, val);
114}
115
116static uint16_t
117sdhci_acpi_read_2(device_t dev, struct sdhci_slot *slot __unused,
118 bus_size_t off)
119{
120 struct sdhci_acpi_softc *sc = device_get_softc(dev);
121
122 bus_barrier(sc->mem_res, 0, 0xFF,
123 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
124 return bus_read_2(sc->mem_res, off);
125}
126
127static void
128sdhci_acpi_write_2(device_t dev, struct sdhci_slot *slot __unused,
129 bus_size_t off, uint16_t val)
130{
131 struct sdhci_acpi_softc *sc = device_get_softc(dev);
132
133 bus_barrier(sc->mem_res, 0, 0xFF,
134 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
135 bus_write_2(sc->mem_res, off, val);
136}
137
138static uint32_t
139sdhci_acpi_read_4(device_t dev, struct sdhci_slot *slot __unused,
140 bus_size_t off)
141{
142 struct sdhci_acpi_softc *sc = device_get_softc(dev);
143
144 bus_barrier(sc->mem_res, 0, 0xFF,
145 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
146 return bus_read_4(sc->mem_res, off);
147}
148
149static void
150sdhci_acpi_write_4(device_t dev, struct sdhci_slot *slot __unused,
151 bus_size_t off, uint32_t val)
152{
153 struct sdhci_acpi_softc *sc = device_get_softc(dev);
154
155 bus_barrier(sc->mem_res, 0, 0xFF,
156 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
157 bus_write_4(sc->mem_res, off, val);
158}
159
160static void
161sdhci_acpi_read_multi_4(device_t dev, struct sdhci_slot *slot __unused,
162 bus_size_t off, uint32_t *data, bus_size_t count)
163{
164 struct sdhci_acpi_softc *sc = device_get_softc(dev);
165
166 bus_read_multi_stream_4(sc->mem_res, off, data, count);
167}
168
169static void
170sdhci_acpi_write_multi_4(device_t dev, struct sdhci_slot *slot __unused,
171 bus_size_t off, uint32_t *data, bus_size_t count)
172{
173 struct sdhci_acpi_softc *sc = device_get_softc(dev);
174
175 bus_write_multi_stream_4(sc->mem_res, off, data, count);
176}
177
178static const struct sdhci_acpi_device *
179sdhci_acpi_find_device(device_t dev)
180{
181 const char *hid;
182 int i, uid;
183 ACPI_HANDLE handle;
184 ACPI_STATUS status;
185
186 hid = ACPI_ID_PROBE(device_get_parent(dev), dev, sdhci_ids);
187 if (hid == NULL)
188 return (NULL);
189
190 handle = acpi_get_handle(dev);
191 status = acpi_GetInteger(handle, "_UID", &uid);
192 if (ACPI_FAILURE(status))
193 uid = 0;
194
195 for (i = 0; sdhci_acpi_devices[i].hid != NULL; i++) {
196 if (strcmp(sdhci_acpi_devices[i].hid, hid) != 0)
197 continue;
198 if ((sdhci_acpi_devices[i].uid != 0) &&
199 (sdhci_acpi_devices[i].uid != uid))
200 continue;
201 return (&sdhci_acpi_devices[i]);
202 }
203
204 return (NULL);
205}
206
207static int
208sdhci_acpi_probe(device_t dev)
209{
210 const struct sdhci_acpi_device *acpi_dev;
211
212 acpi_dev = sdhci_acpi_find_device(dev);
213 if (acpi_dev == NULL)
214 return (ENXIO);
215
216 device_set_desc(dev, acpi_dev->desc);
217
218 return (BUS_PROBE_DEFAULT);
219}
220
221static int
222sdhci_acpi_attach(device_t dev)
223{
224 struct sdhci_acpi_softc *sc = device_get_softc(dev);
225 int rid, err;
226 const struct sdhci_acpi_device *acpi_dev;
227
228 acpi_dev = sdhci_acpi_find_device(dev);
229 if (acpi_dev == NULL)
230 return (ENXIO);
231
232 sc->quirks = acpi_dev->quirks;
233
234 /* Allocate IRQ. */
235 rid = 0;
236 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
237 RF_ACTIVE);
238 if (sc->irq_res == NULL) {
239 device_printf(dev, "can't allocate IRQ\n");
240 return (ENOMEM);
241 }
242
243 rid = 0;
244 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
245 &rid, RF_ACTIVE);
246 if (sc->mem_res == NULL) {
247 device_printf(dev, "can't allocate memory resource for slot\n");
248 sdhci_acpi_detach(dev);
249 return (ENOMEM);
250 }
251
| 93 NULL
94};
95
96struct sdhci_acpi_softc {
97 u_int quirks; /* Chip specific quirks */
98 struct resource *irq_res; /* IRQ resource */
99 void *intrhand; /* Interrupt handle */
100
101 struct sdhci_slot slot;
102 struct resource *mem_res; /* Memory resource */
103};
104
105static void sdhci_acpi_intr(void *arg);
106static int sdhci_acpi_detach(device_t dev);
107
108static uint8_t
109sdhci_acpi_read_1(device_t dev, struct sdhci_slot *slot __unused,
110 bus_size_t off)
111{
112 struct sdhci_acpi_softc *sc = device_get_softc(dev);
113
114 bus_barrier(sc->mem_res, 0, 0xFF,
115 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
116 return bus_read_1(sc->mem_res, off);
117}
118
119static void
120sdhci_acpi_write_1(device_t dev, struct sdhci_slot *slot __unused,
121 bus_size_t off, uint8_t val)
122{
123 struct sdhci_acpi_softc *sc = device_get_softc(dev);
124
125 bus_barrier(sc->mem_res, 0, 0xFF,
126 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
127 bus_write_1(sc->mem_res, off, val);
128}
129
130static uint16_t
131sdhci_acpi_read_2(device_t dev, struct sdhci_slot *slot __unused,
132 bus_size_t off)
133{
134 struct sdhci_acpi_softc *sc = device_get_softc(dev);
135
136 bus_barrier(sc->mem_res, 0, 0xFF,
137 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
138 return bus_read_2(sc->mem_res, off);
139}
140
141static void
142sdhci_acpi_write_2(device_t dev, struct sdhci_slot *slot __unused,
143 bus_size_t off, uint16_t val)
144{
145 struct sdhci_acpi_softc *sc = device_get_softc(dev);
146
147 bus_barrier(sc->mem_res, 0, 0xFF,
148 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
149 bus_write_2(sc->mem_res, off, val);
150}
151
152static uint32_t
153sdhci_acpi_read_4(device_t dev, struct sdhci_slot *slot __unused,
154 bus_size_t off)
155{
156 struct sdhci_acpi_softc *sc = device_get_softc(dev);
157
158 bus_barrier(sc->mem_res, 0, 0xFF,
159 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
160 return bus_read_4(sc->mem_res, off);
161}
162
163static void
164sdhci_acpi_write_4(device_t dev, struct sdhci_slot *slot __unused,
165 bus_size_t off, uint32_t val)
166{
167 struct sdhci_acpi_softc *sc = device_get_softc(dev);
168
169 bus_barrier(sc->mem_res, 0, 0xFF,
170 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
171 bus_write_4(sc->mem_res, off, val);
172}
173
174static void
175sdhci_acpi_read_multi_4(device_t dev, struct sdhci_slot *slot __unused,
176 bus_size_t off, uint32_t *data, bus_size_t count)
177{
178 struct sdhci_acpi_softc *sc = device_get_softc(dev);
179
180 bus_read_multi_stream_4(sc->mem_res, off, data, count);
181}
182
183static void
184sdhci_acpi_write_multi_4(device_t dev, struct sdhci_slot *slot __unused,
185 bus_size_t off, uint32_t *data, bus_size_t count)
186{
187 struct sdhci_acpi_softc *sc = device_get_softc(dev);
188
189 bus_write_multi_stream_4(sc->mem_res, off, data, count);
190}
191
192static const struct sdhci_acpi_device *
193sdhci_acpi_find_device(device_t dev)
194{
195 const char *hid;
196 int i, uid;
197 ACPI_HANDLE handle;
198 ACPI_STATUS status;
199
200 hid = ACPI_ID_PROBE(device_get_parent(dev), dev, sdhci_ids);
201 if (hid == NULL)
202 return (NULL);
203
204 handle = acpi_get_handle(dev);
205 status = acpi_GetInteger(handle, "_UID", &uid);
206 if (ACPI_FAILURE(status))
207 uid = 0;
208
209 for (i = 0; sdhci_acpi_devices[i].hid != NULL; i++) {
210 if (strcmp(sdhci_acpi_devices[i].hid, hid) != 0)
211 continue;
212 if ((sdhci_acpi_devices[i].uid != 0) &&
213 (sdhci_acpi_devices[i].uid != uid))
214 continue;
215 return (&sdhci_acpi_devices[i]);
216 }
217
218 return (NULL);
219}
220
221static int
222sdhci_acpi_probe(device_t dev)
223{
224 const struct sdhci_acpi_device *acpi_dev;
225
226 acpi_dev = sdhci_acpi_find_device(dev);
227 if (acpi_dev == NULL)
228 return (ENXIO);
229
230 device_set_desc(dev, acpi_dev->desc);
231
232 return (BUS_PROBE_DEFAULT);
233}
234
235static int
236sdhci_acpi_attach(device_t dev)
237{
238 struct sdhci_acpi_softc *sc = device_get_softc(dev);
239 int rid, err;
240 const struct sdhci_acpi_device *acpi_dev;
241
242 acpi_dev = sdhci_acpi_find_device(dev);
243 if (acpi_dev == NULL)
244 return (ENXIO);
245
246 sc->quirks = acpi_dev->quirks;
247
248 /* Allocate IRQ. */
249 rid = 0;
250 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
251 RF_ACTIVE);
252 if (sc->irq_res == NULL) {
253 device_printf(dev, "can't allocate IRQ\n");
254 return (ENOMEM);
255 }
256
257 rid = 0;
258 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
259 &rid, RF_ACTIVE);
260 if (sc->mem_res == NULL) {
261 device_printf(dev, "can't allocate memory resource for slot\n");
262 sdhci_acpi_detach(dev);
263 return (ENOMEM);
264 }
265
|
| 266 /* Intel Braswell eMMC 4.5.1 controller quirk */
267 if (strcmp(acpi_dev->hid, "80860F14") == 0 && acpi_dev->uid == 1 &&
268 SDHCI_READ_4(dev, &sc->slot, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
269 SDHCI_READ_4(dev, &sc->slot, SDHCI_CAPABILITIES2) == 0x00000807)
270 sc->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_1MHZ;
|
252 sc->quirks &= ~sdhci_quirk_clear;
253 sc->quirks |= sdhci_quirk_set;
254 sc->slot.quirks = sc->quirks;
255
256 err = sdhci_init_slot(dev, &sc->slot, 0);
257 if (err) {
258 device_printf(dev, "failed to init slot\n");
259 sdhci_acpi_detach(dev);
260 return (err);
261 }
262
263 /* Activate the interrupt */
264 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
265 NULL, sdhci_acpi_intr, sc, &sc->intrhand);
266 if (err) {
267 device_printf(dev, "can't setup IRQ\n");
268 sdhci_acpi_detach(dev);
269 return (err);
270 }
271
272 /* Process cards detection. */
273 sdhci_start_slot(&sc->slot);
274
275 return (0);
276}
277
278static int
279sdhci_acpi_detach(device_t dev)
280{
281 struct sdhci_acpi_softc *sc = device_get_softc(dev);
282
283 if (sc->intrhand)
284 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
285 if (sc->irq_res)
286 bus_release_resource(dev, SYS_RES_IRQ,
287 rman_get_rid(sc->irq_res), sc->irq_res);
288
289 if (sc->mem_res) {
290 sdhci_cleanup_slot(&sc->slot);
291 bus_release_resource(dev, SYS_RES_MEMORY,
292 rman_get_rid(sc->mem_res), sc->mem_res);
293 }
294
295 return (0);
296}
297
298static int
299sdhci_acpi_shutdown(device_t dev)
300{
301
302 return (0);
303}
304
305static int
306sdhci_acpi_suspend(device_t dev)
307{
308 struct sdhci_acpi_softc *sc = device_get_softc(dev);
309 int err;
310
311 err = bus_generic_suspend(dev);
312 if (err)
313 return (err);
314 sdhci_generic_suspend(&sc->slot);
315 return (0);
316}
317
318static int
319sdhci_acpi_resume(device_t dev)
320{
321 struct sdhci_acpi_softc *sc = device_get_softc(dev);
322 int err;
323
324 sdhci_generic_resume(&sc->slot);
325 err = bus_generic_resume(dev);
326 if (err)
327 return (err);
328 return (0);
329}
330
331static void
332sdhci_acpi_intr(void *arg)
333{
334 struct sdhci_acpi_softc *sc = (struct sdhci_acpi_softc *)arg;
335
336 sdhci_generic_intr(&sc->slot);
337}
338
339static device_method_t sdhci_methods[] = {
340 /* device_if */
341 DEVMETHOD(device_probe, sdhci_acpi_probe),
342 DEVMETHOD(device_attach, sdhci_acpi_attach),
343 DEVMETHOD(device_detach, sdhci_acpi_detach),
344 DEVMETHOD(device_shutdown, sdhci_acpi_shutdown),
345 DEVMETHOD(device_suspend, sdhci_acpi_suspend),
346 DEVMETHOD(device_resume, sdhci_acpi_resume),
347
348 /* Bus interface */
349 DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar),
350 DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
351
352 /* mmcbr_if */
353 DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
354 DEVMETHOD(mmcbr_switch_vccq, sdhci_generic_switch_vccq),
355 DEVMETHOD(mmcbr_request, sdhci_generic_request),
356 DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
357 DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
358 DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
359
360 /* SDHCI accessors */
361 DEVMETHOD(sdhci_read_1, sdhci_acpi_read_1),
362 DEVMETHOD(sdhci_read_2, sdhci_acpi_read_2),
363 DEVMETHOD(sdhci_read_4, sdhci_acpi_read_4),
364 DEVMETHOD(sdhci_read_multi_4, sdhci_acpi_read_multi_4),
365 DEVMETHOD(sdhci_write_1, sdhci_acpi_write_1),
366 DEVMETHOD(sdhci_write_2, sdhci_acpi_write_2),
367 DEVMETHOD(sdhci_write_4, sdhci_acpi_write_4),
368 DEVMETHOD(sdhci_write_multi_4, sdhci_acpi_write_multi_4),
369 DEVMETHOD(sdhci_set_uhs_timing, sdhci_generic_set_uhs_timing),
370
371 DEVMETHOD_END
372};
373
374static driver_t sdhci_acpi_driver = {
375 "sdhci_acpi",
376 sdhci_methods,
377 sizeof(struct sdhci_acpi_softc),
378};
379static devclass_t sdhci_acpi_devclass;
380
381DRIVER_MODULE(sdhci_acpi, acpi, sdhci_acpi_driver, sdhci_acpi_devclass, NULL,
382 NULL);
383MODULE_DEPEND(sdhci_acpi, sdhci, 1, 1, 1);
384MMC_DECLARE_BRIDGE(sdhci_acpi);
| 271 sc->quirks &= ~sdhci_quirk_clear;
272 sc->quirks |= sdhci_quirk_set;
273 sc->slot.quirks = sc->quirks;
274
275 err = sdhci_init_slot(dev, &sc->slot, 0);
276 if (err) {
277 device_printf(dev, "failed to init slot\n");
278 sdhci_acpi_detach(dev);
279 return (err);
280 }
281
282 /* Activate the interrupt */
283 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
284 NULL, sdhci_acpi_intr, sc, &sc->intrhand);
285 if (err) {
286 device_printf(dev, "can't setup IRQ\n");
287 sdhci_acpi_detach(dev);
288 return (err);
289 }
290
291 /* Process cards detection. */
292 sdhci_start_slot(&sc->slot);
293
294 return (0);
295}
296
297static int
298sdhci_acpi_detach(device_t dev)
299{
300 struct sdhci_acpi_softc *sc = device_get_softc(dev);
301
302 if (sc->intrhand)
303 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
304 if (sc->irq_res)
305 bus_release_resource(dev, SYS_RES_IRQ,
306 rman_get_rid(sc->irq_res), sc->irq_res);
307
308 if (sc->mem_res) {
309 sdhci_cleanup_slot(&sc->slot);
310 bus_release_resource(dev, SYS_RES_MEMORY,
311 rman_get_rid(sc->mem_res), sc->mem_res);
312 }
313
314 return (0);
315}
316
317static int
318sdhci_acpi_shutdown(device_t dev)
319{
320
321 return (0);
322}
323
324static int
325sdhci_acpi_suspend(device_t dev)
326{
327 struct sdhci_acpi_softc *sc = device_get_softc(dev);
328 int err;
329
330 err = bus_generic_suspend(dev);
331 if (err)
332 return (err);
333 sdhci_generic_suspend(&sc->slot);
334 return (0);
335}
336
337static int
338sdhci_acpi_resume(device_t dev)
339{
340 struct sdhci_acpi_softc *sc = device_get_softc(dev);
341 int err;
342
343 sdhci_generic_resume(&sc->slot);
344 err = bus_generic_resume(dev);
345 if (err)
346 return (err);
347 return (0);
348}
349
350static void
351sdhci_acpi_intr(void *arg)
352{
353 struct sdhci_acpi_softc *sc = (struct sdhci_acpi_softc *)arg;
354
355 sdhci_generic_intr(&sc->slot);
356}
357
358static device_method_t sdhci_methods[] = {
359 /* device_if */
360 DEVMETHOD(device_probe, sdhci_acpi_probe),
361 DEVMETHOD(device_attach, sdhci_acpi_attach),
362 DEVMETHOD(device_detach, sdhci_acpi_detach),
363 DEVMETHOD(device_shutdown, sdhci_acpi_shutdown),
364 DEVMETHOD(device_suspend, sdhci_acpi_suspend),
365 DEVMETHOD(device_resume, sdhci_acpi_resume),
366
367 /* Bus interface */
368 DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar),
369 DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
370
371 /* mmcbr_if */
372 DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
373 DEVMETHOD(mmcbr_switch_vccq, sdhci_generic_switch_vccq),
374 DEVMETHOD(mmcbr_request, sdhci_generic_request),
375 DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
376 DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
377 DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
378
379 /* SDHCI accessors */
380 DEVMETHOD(sdhci_read_1, sdhci_acpi_read_1),
381 DEVMETHOD(sdhci_read_2, sdhci_acpi_read_2),
382 DEVMETHOD(sdhci_read_4, sdhci_acpi_read_4),
383 DEVMETHOD(sdhci_read_multi_4, sdhci_acpi_read_multi_4),
384 DEVMETHOD(sdhci_write_1, sdhci_acpi_write_1),
385 DEVMETHOD(sdhci_write_2, sdhci_acpi_write_2),
386 DEVMETHOD(sdhci_write_4, sdhci_acpi_write_4),
387 DEVMETHOD(sdhci_write_multi_4, sdhci_acpi_write_multi_4),
388 DEVMETHOD(sdhci_set_uhs_timing, sdhci_generic_set_uhs_timing),
389
390 DEVMETHOD_END
391};
392
393static driver_t sdhci_acpi_driver = {
394 "sdhci_acpi",
395 sdhci_methods,
396 sizeof(struct sdhci_acpi_softc),
397};
398static devclass_t sdhci_acpi_devclass;
399
400DRIVER_MODULE(sdhci_acpi, acpi, sdhci_acpi_driver, sdhci_acpi_devclass, NULL,
401 NULL);
402MODULE_DEPEND(sdhci_acpi, sdhci, 1, 1, 1);
403MMC_DECLARE_BRIDGE(sdhci_acpi);
|