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sdhci.h (340763) sdhci.h (343504)
1/*-
2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 8 unchanged lines hidden (view full) ---

17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
1/*-
2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 8 unchanged lines hidden (view full) ---

17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * $FreeBSD: stable/11/sys/dev/sdhci/sdhci.h 340763 2018-11-22 13:14:15Z marius $
25 * $FreeBSD: stable/11/sys/dev/sdhci/sdhci.h 343504 2019-01-27 19:04:28Z marius $
26 */
27
28#ifndef __SDHCI_H__
29#define __SDHCI_H__
30
26 */
27
28#ifndef __SDHCI_H__
29#define __SDHCI_H__
30
31#define DMA_BLOCK_SIZE 4096
32#define DMA_BOUNDARY 0 /* DMA reload every 4K */
31/* Macro for sizing the SDMA bounce buffer on the SDMA buffer boundary. */
32#define SDHCI_SDMA_BNDRY_TO_BBUFSZ(bndry) (4096 * (1 << bndry))
33
34/* Controller doesn't honor resets unless we touch the clock register */
35#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1 << 0)
36/* Controller really supports DMA */
37#define SDHCI_QUIRK_FORCE_DMA (1 << 1)
38/* Controller has unusable DMA engine */
39#define SDHCI_QUIRK_BROKEN_DMA (1 << 2)
40/* Controller doesn't like to be reset when there is no card inserted. */

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86/* Controller reports support for eMMC HS400 mode as SDHCI_CAN_MMC_HS400. */
87#define SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 (1 << 26)
88/* Controller support for SDHCI_CTRL2_PRESET_VALUE is broken. */
89#define SDHCI_QUIRK_PRESET_VALUE_BROKEN (1 << 27)
90/* Controller does not support or the support for ACMD12 is broken. */
91#define SDHCI_QUIRK_BROKEN_AUTO_STOP (1 << 28)
92/* Controller supports eMMC HS400 mode if SDHCI_CAN_SDR104 is set. */
93#define SDHCI_QUIRK_MMC_HS400_IF_CAN_SDR104 (1 << 29)
33
34/* Controller doesn't honor resets unless we touch the clock register */
35#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1 << 0)
36/* Controller really supports DMA */
37#define SDHCI_QUIRK_FORCE_DMA (1 << 1)
38/* Controller has unusable DMA engine */
39#define SDHCI_QUIRK_BROKEN_DMA (1 << 2)
40/* Controller doesn't like to be reset when there is no card inserted. */

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86/* Controller reports support for eMMC HS400 mode as SDHCI_CAN_MMC_HS400. */
87#define SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 (1 << 26)
88/* Controller support for SDHCI_CTRL2_PRESET_VALUE is broken. */
89#define SDHCI_QUIRK_PRESET_VALUE_BROKEN (1 << 27)
90/* Controller does not support or the support for ACMD12 is broken. */
91#define SDHCI_QUIRK_BROKEN_AUTO_STOP (1 << 28)
92/* Controller supports eMMC HS400 mode if SDHCI_CAN_SDR104 is set. */
93#define SDHCI_QUIRK_MMC_HS400_IF_CAN_SDR104 (1 << 29)
94/* SDMA boundary in SDHCI_BLOCK_SIZE broken - use front-end supplied value. */
95#define SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY (1 << 30)
94
95/*
96 * Controller registers
97 */
98#define SDHCI_DMA_ADDRESS 0x00
99
100#define SDHCI_BLOCK_SIZE 0x04
96
97/*
98 * Controller registers
99 */
100#define SDHCI_DMA_ADDRESS 0x00
101
102#define SDHCI_BLOCK_SIZE 0x04
103#define SDHCI_BLKSZ_SDMA_BNDRY_4K 0x00
104#define SDHCI_BLKSZ_SDMA_BNDRY_8K 0x01
105#define SDHCI_BLKSZ_SDMA_BNDRY_16K 0x02
106#define SDHCI_BLKSZ_SDMA_BNDRY_32K 0x03
107#define SDHCI_BLKSZ_SDMA_BNDRY_64K 0x04
108#define SDHCI_BLKSZ_SDMA_BNDRY_128K 0x05
109#define SDHCI_BLKSZ_SDMA_BNDRY_256K 0x06
110#define SDHCI_BLKSZ_SDMA_BNDRY_512K 0x07
101#define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))
102
103#define SDHCI_BLOCK_COUNT 0x06
104
105#define SDHCI_ARGUMENT 0x08
106
107#define SDHCI_TRANSFER_MODE 0x0C
108#define SDHCI_TRNS_DMA 0x01

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353 u_char version;
354 int timeout; /* Transfer timeout */
355 uint32_t max_clk; /* Max possible freq */
356 uint32_t timeout_clk; /* Timeout freq */
357 bus_dma_tag_t dmatag;
358 bus_dmamap_t dmamap;
359 u_char *dmamem;
360 bus_addr_t paddr; /* DMA buffer address */
111#define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))
112
113#define SDHCI_BLOCK_COUNT 0x06
114
115#define SDHCI_ARGUMENT 0x08
116
117#define SDHCI_TRANSFER_MODE 0x0C
118#define SDHCI_TRNS_DMA 0x01

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363 u_char version;
364 int timeout; /* Transfer timeout */
365 uint32_t max_clk; /* Max possible freq */
366 uint32_t timeout_clk; /* Timeout freq */
367 bus_dma_tag_t dmatag;
368 bus_dmamap_t dmamap;
369 u_char *dmamem;
370 bus_addr_t paddr; /* DMA buffer address */
371 uint32_t sdma_bbufsz; /* SDMA bounce buffer size */
372 uint8_t sdma_boundary; /* SDMA boundary */
361 struct task card_task; /* Card presence check task */
362 struct timeout_task
363 card_delayed_task;/* Card insert delayed task */
364 struct callout card_poll_callout;/* Card present polling callout */
365 struct callout timeout_callout;/* Card command/data response timeout */
366 struct callout retune_callout; /* Re-tuning mode 1 callout */
367 struct mmc_host host; /* Host parameters */
368 struct mmc_request *req; /* Current request */

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416int sdhci_generic_acquire_host(device_t brdev, device_t reqdev);
417int sdhci_generic_release_host(device_t brdev, device_t reqdev);
418void sdhci_generic_intr(struct sdhci_slot *slot);
419uint32_t sdhci_generic_min_freq(device_t brdev, struct sdhci_slot *slot);
420bool sdhci_generic_get_card_present(device_t brdev, struct sdhci_slot *slot);
421void sdhci_generic_set_uhs_timing(device_t brdev, struct sdhci_slot *slot);
422void sdhci_handle_card_present(struct sdhci_slot *slot, bool is_present);
423
373 struct task card_task; /* Card presence check task */
374 struct timeout_task
375 card_delayed_task;/* Card insert delayed task */
376 struct callout card_poll_callout;/* Card present polling callout */
377 struct callout timeout_callout;/* Card command/data response timeout */
378 struct callout retune_callout; /* Re-tuning mode 1 callout */
379 struct mmc_host host; /* Host parameters */
380 struct mmc_request *req; /* Current request */

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428int sdhci_generic_acquire_host(device_t brdev, device_t reqdev);
429int sdhci_generic_release_host(device_t brdev, device_t reqdev);
430void sdhci_generic_intr(struct sdhci_slot *slot);
431uint32_t sdhci_generic_min_freq(device_t brdev, struct sdhci_slot *slot);
432bool sdhci_generic_get_card_present(device_t brdev, struct sdhci_slot *slot);
433void sdhci_generic_set_uhs_timing(device_t brdev, struct sdhci_slot *slot);
434void sdhci_handle_card_present(struct sdhci_slot *slot, bool is_present);
435
436#define SDHCI_VERSION 2
437
438#define SDHCI_DEPEND(name) \
439 MODULE_DEPEND(name, sdhci, SDHCI_VERSION, SDHCI_VERSION, SDHCI_VERSION);
440
424#endif /* __SDHCI_H__ */
441#endif /* __SDHCI_H__ */