| if_rlreg.h (171263) | if_rlreg.h (171560) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 171263 2007-07-06 00:05:12Z yongari $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 171560 2007-07-24 01:24:03Z yongari $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 618 unchanged lines hidden (view full) --- 659#ifdef RE_FIXUP_RX 660#define RE_ETHER_ALIGN sizeof(uint64_t) 661#define RE_RX_DESC_BUFLEN (MCLBYTES - RE_ETHER_ALIGN) 662#else 663#define RE_ETHER_ALIGN 0 664#define RE_RX_DESC_BUFLEN MCLBYTES 665#endif 666 | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 618 unchanged lines hidden (view full) --- 659#ifdef RE_FIXUP_RX 660#define RE_ETHER_ALIGN sizeof(uint64_t) 661#define RE_RX_DESC_BUFLEN (MCLBYTES - RE_ETHER_ALIGN) 662#else 663#define RE_ETHER_ALIGN 0 664#define RE_RX_DESC_BUFLEN MCLBYTES 665#endif 666 |
| 667#define RL_MSI_MESSAGES 2 668 |
|
| 667#define RL_ADDR_LO(y) ((uint64_t) (y) & 0xFFFFFFFF) 668#define RL_ADDR_HI(y) ((uint64_t) (y) >> 32) 669 670/* see comment in dev/re/if_re.c */ 671#define RL_JUMBO_FRAMELEN 7440 672#define RL_JUMBO_MTU (RL_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN) 673 674struct rl_softc; --- 30 unchanged lines hidden (view full) --- 705}; 706 707struct rl_softc { 708 struct ifnet *rl_ifp; /* interface info */ 709 bus_space_handle_t rl_bhandle; /* bus space handle */ 710 bus_space_tag_t rl_btag; /* bus space tag */ 711 device_t rl_dev; 712 struct resource *rl_res; | 669#define RL_ADDR_LO(y) ((uint64_t) (y) & 0xFFFFFFFF) 670#define RL_ADDR_HI(y) ((uint64_t) (y) >> 32) 671 672/* see comment in dev/re/if_re.c */ 673#define RL_JUMBO_FRAMELEN 7440 674#define RL_JUMBO_MTU (RL_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN) 675 676struct rl_softc; --- 30 unchanged lines hidden (view full) --- 707}; 708 709struct rl_softc { 710 struct ifnet *rl_ifp; /* interface info */ 711 bus_space_handle_t rl_bhandle; /* bus space handle */ 712 bus_space_tag_t rl_btag; /* bus space tag */ 713 device_t rl_dev; 714 struct resource *rl_res; |
| 713 struct resource *rl_irq; 714 void *rl_intrhand; | 715 struct resource *rl_irq[RL_MSI_MESSAGES]; 716 void *rl_intrhand[RL_MSI_MESSAGES]; |
| 715 device_t rl_miibus; 716 bus_dma_tag_t rl_parent_tag; 717 bus_dma_tag_t rl_tag; 718 uint8_t rl_type; 719 int rl_eecmd_read; 720 int rl_eewidth; 721 uint8_t rl_stats_no_timeout; 722 int rl_txthresh; --- 14 unchanged lines hidden (view full) --- 737#endif 738 739 struct task rl_txtask; 740 struct task rl_inttask; 741 742 struct mtx rl_intlock; 743 int rl_txstart; 744 int rl_link; | 717 device_t rl_miibus; 718 bus_dma_tag_t rl_parent_tag; 719 bus_dma_tag_t rl_tag; 720 uint8_t rl_type; 721 int rl_eecmd_read; 722 int rl_eewidth; 723 uint8_t rl_stats_no_timeout; 724 int rl_txthresh; --- 14 unchanged lines hidden (view full) --- 739#endif 740 741 struct task rl_txtask; 742 struct task rl_inttask; 743 744 struct mtx rl_intlock; 745 int rl_txstart; 746 int rl_link; |
| 747 int rl_msi; |
|
| 745}; 746 747#define RL_LOCK(_sc) mtx_lock(&(_sc)->rl_mtx) 748#define RL_UNLOCK(_sc) mtx_unlock(&(_sc)->rl_mtx) 749#define RL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rl_mtx, MA_OWNED) 750 751/* 752 * register space access macros --- 235 unchanged lines hidden --- | 748}; 749 750#define RL_LOCK(_sc) mtx_lock(&(_sc)->rl_mtx) 751#define RL_UNLOCK(_sc) mtx_unlock(&(_sc)->rl_mtx) 752#define RL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rl_mtx, MA_OWNED) 753 754/* 755 * register space access macros --- 235 unchanged lines hidden --- |