| if_rlreg.h (139825) | if_rlreg.h (140642) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 139825 2005-01-07 02:29:27Z imp $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 140642 2005-01-22 22:40:53Z imp $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 101 unchanged lines hidden (view full) --- 142#define RL_TXCFG_HWREV 0x7CC00000 143 144#define RL_LOOPTEST_OFF 0x00000000 145#define RL_LOOPTEST_ON 0x00020000 146#define RL_LOOPTEST_ON_CPLUS 0x00060000 147 148#define RL_HWREV_8169 0x00000000 149#define RL_HWREV_8169S 0x04000000 | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 101 unchanged lines hidden (view full) --- 142#define RL_TXCFG_HWREV 0x7CC00000 143 144#define RL_LOOPTEST_OFF 0x00000000 145#define RL_LOOPTEST_ON 0x00020000 146#define RL_LOOPTEST_ON_CPLUS 0x00060000 147 148#define RL_HWREV_8169 0x00000000 149#define RL_HWREV_8169S 0x04000000 |
| 150#define RL_HWREV_8169SB 0x10000000 |
|
| 150#define RL_HWREV_8110S 0x00800000 151#define RL_HWREV_8139 0x60000000 152#define RL_HWREV_8139A 0x70000000 153#define RL_HWREV_8139AG 0x70800000 154#define RL_HWREV_8139B 0x78000000 155#define RL_HWREV_8130 0x7C000000 156#define RL_HWREV_8139C 0x74000000 157#define RL_HWREV_8139D 0x74400000 --- 743 unchanged lines hidden --- | 151#define RL_HWREV_8110S 0x00800000 152#define RL_HWREV_8139 0x60000000 153#define RL_HWREV_8139A 0x70000000 154#define RL_HWREV_8139AG 0x70800000 155#define RL_HWREV_8139B 0x78000000 156#define RL_HWREV_8130 0x7C000000 157#define RL_HWREV_8139C 0x74000000 158#define RL_HWREV_8139D 0x74400000 --- 743 unchanged lines hidden --- |