| if_rlreg.h (103020) | if_rlreg.h (109095) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 103020 2002-09-06 16:38:06Z iwasaki $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 109095 2003-01-11 07:10:35Z sanpei $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 435 unchanged lines hidden (view full) --- 476#define DLINK_DEVICEID_690TXD 0x1340 477 478/* 479 * Corega K.K vendor ID 480 */ 481#define COREGA_VENDORID 0x1259 482 483/* | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 435 unchanged lines hidden (view full) --- 476#define DLINK_DEVICEID_690TXD 0x1340 477 478/* 479 * Corega K.K vendor ID 480 */ 481#define COREGA_VENDORID 0x1259 482 483/* |
| 484 * Coreaga FEther CB-TXD device ID | 484 * Corega FEther CB-TXD device ID |
| 485 */ | 485 */ |
| 486#define COREGA_DEVICEID_CBTXD 0xa117 | 486#define COREGA_DEVICEID_FETHERCBTXD 0xa117 |
| 487 488/* | 487 488/* |
| 489 * Corega FEtherII CB-TXD device ID 490 */ 491#define COREGA_DEVICEID_FETHERIICBTXD 0xa11e 492 493 494 495/* |
|
| 489 * PCI low memory base and low I/O base register, and 490 * other PCI registers. 491 */ 492 493#define RL_PCI_VENDOR_ID 0x00 494#define RL_PCI_DEVICE_ID 0x02 495#define RL_PCI_COMMAND 0x04 496#define RL_PCI_STATUS 0x06 --- 25 unchanged lines hidden --- | 496 * PCI low memory base and low I/O base register, and 497 * other PCI registers. 498 */ 499 500#define RL_PCI_VENDOR_ID 0x00 501#define RL_PCI_DEVICE_ID 0x02 502#define RL_PCI_COMMAND 0x04 503#define RL_PCI_STATUS 0x06 --- 25 unchanged lines hidden --- |