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pci.c (69295) pci.c (69783)
1/*
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
1/*
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/dev/pci/pci.c 69295 2000-11-28 07:12:12Z mdodd $
26 * $FreeBSD: head/sys/dev/pci/pci.c 69783 2000-12-08 22:11:23Z msmith $
27 *
28 */
29
30#include "opt_bus.h"
31
27 *
28 */
29
30#include "opt_bus.h"
31
32#include "opt_simos.h"
33#include "opt_compat_oldpci.h"
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/malloc.h>
38#include <sys/module.h>
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/malloc.h>
35#include <sys/module.h>
36#include <sys/linker.h>
39#include <sys/fcntl.h>
40#include <sys/conf.h>
41#include <sys/kernel.h>
42#include <sys/queue.h>
43#include <sys/types.h>
44
45#include <vm/vm.h>
46#include <vm/pmap.h>
47#include <vm/vm_extern.h>
48
49#include <sys/bus.h>
50#include <machine/bus.h>
51#include <sys/rman.h>
52#include <machine/resource.h>
37#include <sys/fcntl.h>
38#include <sys/conf.h>
39#include <sys/kernel.h>
40#include <sys/queue.h>
41#include <sys/types.h>
42
43#include <vm/vm.h>
44#include <vm/pmap.h>
45#include <vm/vm_extern.h>
46
47#include <sys/bus.h>
48#include <machine/bus.h>
49#include <sys/rman.h>
50#include <machine/resource.h>
53#include <machine/md_var.h> /* For the Alpha */
54
55#include <sys/pciio.h>
56#include <pci/pcireg.h>
57#include <pci/pcivar.h>
58
59#include "pcib_if.h"
60
51
52#include <sys/pciio.h>
53#include <pci/pcireg.h>
54#include <pci/pcivar.h>
55
56#include "pcib_if.h"
57
61#ifdef __alpha__
62#include <machine/rpb.h>
63#endif
58static char *pci_vendordata;
59static size_t pci_vendordata_size;
60static char *pci_describe_device(device_t dev);
64
61
65#ifdef APIC_IO
66#include <machine/smp.h>
67#endif /* APIC_IO */
68
69static devclass_t pci_devclass;
70
71struct pci_quirk {
72 u_int32_t devid; /* Vendor/device of the card */
73 int type;
74#define PCI_QUIRK_MAP_REG 1 /* PCI map register in wierd place */
75 int arg1;
76 int arg2;

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173 if (cfg->hdrtype != 0)
174 return;
175
176 /* PCI to PCI bridges use header type 1 */
177 if (cfg->baseclass == PCIC_BRIDGE && cfg->subclass == PCIS_BRIDGE_PCI)
178 cfg->hdrtype = 1;
179}
180
62static devclass_t pci_devclass;
63
64struct pci_quirk {
65 u_int32_t devid; /* Vendor/device of the card */
66 int type;
67#define PCI_QUIRK_MAP_REG 1 /* PCI map register in wierd place */
68 int arg1;
69 int arg2;

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166 if (cfg->hdrtype != 0)
167 return;
168
169 /* PCI to PCI bridges use header type 1 */
170 if (cfg->baseclass == PCIC_BRIDGE && cfg->subclass == PCIS_BRIDGE_PCI)
171 cfg->hdrtype = 1;
172}
173
181/* read config data specific to header type 1 device (PCI to PCI bridge) */
182
183static void *
184pci_readppb(device_t pcib, int b, int s, int f)
185{
186 pcih1cfgregs *p;
187
188 p = malloc(sizeof (pcih1cfgregs), M_DEVBUF, M_WAITOK);
189 if (p == NULL)
190 return (NULL);
191
192 bzero(p, sizeof *p);
193
194 p->secstat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECSTAT_1, 2);
195 p->bridgectl = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_BRIDGECTL_1, 2);
196
197 p->seclat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECLAT_1, 1);
198
199 p->iobase = PCI_PPBIOBASE (PCIB_READ_CONFIG(pcib, b, s, f,
200 PCIR_IOBASEH_1, 2),
201 PCIB_READ_CONFIG(pcib, b, s, f,
202 PCIR_IOBASEL_1, 1));
203 p->iolimit = PCI_PPBIOLIMIT (PCIB_READ_CONFIG(pcib, b, s, f,
204 PCIR_IOLIMITH_1, 2),
205 PCIB_READ_CONFIG(pcib, b, s, f,
206 PCIR_IOLIMITL_1, 1));
207
208 p->membase = PCI_PPBMEMBASE (0,
209 PCIB_READ_CONFIG(pcib, b, s, f,
210 PCIR_MEMBASE_1, 2));
211 p->memlimit = PCI_PPBMEMLIMIT (0,
212 PCIB_READ_CONFIG(pcib, b, s, f,
213 PCIR_MEMLIMIT_1, 2));
214
215 p->pmembase = PCI_PPBMEMBASE (
216 (pci_addr_t)PCIB_READ_CONFIG(pcib, b, s, f, PCIR_PMBASEH_1, 4),
217 PCIB_READ_CONFIG(pcib, b, s, f, PCIR_PMBASEL_1, 2));
218
219 p->pmemlimit = PCI_PPBMEMLIMIT (
220 (pci_addr_t)PCIB_READ_CONFIG(pcib, b, s, f,
221 PCIR_PMLIMITH_1, 4),
222 PCIB_READ_CONFIG(pcib, b, s, f, PCIR_PMLIMITL_1, 2));
223
224 return (p);
225}
226
227/* read config data specific to header type 2 device (PCI to CardBus bridge) */
228
229static void *
230pci_readpcb(device_t pcib, int b, int s, int f)
231{
232 pcih2cfgregs *p;
233
174/* read config data specific to header type 2 device (PCI to CardBus bridge) */
175
176static void *
177pci_readpcb(device_t pcib, int b, int s, int f)
178{
179 pcih2cfgregs *p;
180
234 p = malloc(sizeof (pcih2cfgregs), M_DEVBUF, M_WAITOK);
181 p = malloc(sizeof (pcih2cfgregs), M_DEVBUF, M_WAITOK | M_ZERO);
235 if (p == NULL)
236 return (NULL);
237
182 if (p == NULL)
183 return (NULL);
184
238 bzero(p, sizeof *p);
239
240 p->secstat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECSTAT_2, 2);
241 p->bridgectl = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_BRIDGECTL_2, 2);
242
243 p->seclat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECLAT_2, 1);
244
245 p->membase0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMBASE0_2, 4);
246 p->memlimit0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMLIMIT0_2, 4);
247 p->membase1 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMBASE1_2, 4);

--- 18 unchanged lines hidden (view full) ---

266 case 0:
267 cfg->subvendor = REG(PCIR_SUBVEND_0, 2);
268 cfg->subdevice = REG(PCIR_SUBDEV_0, 2);
269 cfg->nummaps = PCI_MAXMAPS_0;
270 break;
271 case 1:
272 cfg->subvendor = REG(PCIR_SUBVEND_1, 2);
273 cfg->subdevice = REG(PCIR_SUBDEV_1, 2);
185 p->secstat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECSTAT_2, 2);
186 p->bridgectl = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_BRIDGECTL_2, 2);
187
188 p->seclat = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_SECLAT_2, 1);
189
190 p->membase0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMBASE0_2, 4);
191 p->memlimit0 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMLIMIT0_2, 4);
192 p->membase1 = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_MEMBASE1_2, 4);

--- 18 unchanged lines hidden (view full) ---

211 case 0:
212 cfg->subvendor = REG(PCIR_SUBVEND_0, 2);
213 cfg->subdevice = REG(PCIR_SUBDEV_0, 2);
214 cfg->nummaps = PCI_MAXMAPS_0;
215 break;
216 case 1:
217 cfg->subvendor = REG(PCIR_SUBVEND_1, 2);
218 cfg->subdevice = REG(PCIR_SUBDEV_1, 2);
274 cfg->secondarybus = REG(PCIR_SECBUS_1, 1);
275 cfg->subordinatebus = REG(PCIR_SUBBUS_1, 1);
276 cfg->nummaps = PCI_MAXMAPS_1;
219 cfg->nummaps = PCI_MAXMAPS_1;
277 cfg->hdrspec = pci_readppb(pcib, b, s, f);
278 break;
279 case 2:
280 cfg->subvendor = REG(PCIR_SUBVEND_2, 2);
281 cfg->subdevice = REG(PCIR_SUBDEV_2, 2);
282 cfg->secondarybus = REG(PCIR_SECBUS_2, 1);
283 cfg->subordinatebus = REG(PCIR_SUBBUS_2, 1);
284 cfg->nummaps = PCI_MAXMAPS_2;
285 cfg->hdrspec = pci_readpcb(pcib, b, s, f);

--- 13 unchanged lines hidden (view full) ---

299 struct devlist *devlist_head;
300
301 devlist_head = &pci_devq;
302
303 devlist_entry = NULL;
304
305 if (PCIB_READ_CONFIG(pcib, b, s, f, PCIR_DEVVENDOR, 4) != -1) {
306 devlist_entry = malloc(sizeof(struct pci_devinfo),
220 break;
221 case 2:
222 cfg->subvendor = REG(PCIR_SUBVEND_2, 2);
223 cfg->subdevice = REG(PCIR_SUBDEV_2, 2);
224 cfg->secondarybus = REG(PCIR_SECBUS_2, 1);
225 cfg->subordinatebus = REG(PCIR_SUBBUS_2, 1);
226 cfg->nummaps = PCI_MAXMAPS_2;
227 cfg->hdrspec = pci_readpcb(pcib, b, s, f);

--- 13 unchanged lines hidden (view full) ---

241 struct devlist *devlist_head;
242
243 devlist_head = &pci_devq;
244
245 devlist_entry = NULL;
246
247 if (PCIB_READ_CONFIG(pcib, b, s, f, PCIR_DEVVENDOR, 4) != -1) {
248 devlist_entry = malloc(sizeof(struct pci_devinfo),
307 M_DEVBUF, M_WAITOK);
249 M_DEVBUF, M_WAITOK | M_ZERO);
308 if (devlist_entry == NULL)
309 return (NULL);
250 if (devlist_entry == NULL)
251 return (NULL);
310 bzero(devlist_entry, sizeof *devlist_entry);
311
312 cfg = &devlist_entry->cfg;
313
314 cfg->bus = b;
315 cfg->slot = s;
316 cfg->func = f;
317 cfg->vendor = REG(PCIR_VENDOR, 2);
318 cfg->device = REG(PCIR_DEVICE, 2);
319 cfg->cmdreg = REG(PCIR_COMMAND, 2);
320 cfg->statreg = REG(PCIR_STATUS, 2);
321 cfg->baseclass = REG(PCIR_CLASS, 1);
322 cfg->subclass = REG(PCIR_SUBCLASS, 1);
323 cfg->progif = REG(PCIR_PROGIF, 1);
324 cfg->revid = REG(PCIR_REVID, 1);
325 cfg->hdrtype = REG(PCIR_HEADERTYPE, 1);
326 cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1);
327 cfg->lattimer = REG(PCIR_LATTIMER, 1);
328 cfg->intpin = REG(PCIR_INTPIN, 1);
329 cfg->intline = REG(PCIR_INTLINE, 1);
252
253 cfg = &devlist_entry->cfg;
254
255 cfg->bus = b;
256 cfg->slot = s;
257 cfg->func = f;
258 cfg->vendor = REG(PCIR_VENDOR, 2);
259 cfg->device = REG(PCIR_DEVICE, 2);
260 cfg->cmdreg = REG(PCIR_COMMAND, 2);
261 cfg->statreg = REG(PCIR_STATUS, 2);
262 cfg->baseclass = REG(PCIR_CLASS, 1);
263 cfg->subclass = REG(PCIR_SUBCLASS, 1);
264 cfg->progif = REG(PCIR_PROGIF, 1);
265 cfg->revid = REG(PCIR_REVID, 1);
266 cfg->hdrtype = REG(PCIR_HEADERTYPE, 1);
267 cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1);
268 cfg->lattimer = REG(PCIR_LATTIMER, 1);
269 cfg->intpin = REG(PCIR_INTPIN, 1);
270 cfg->intline = REG(PCIR_INTLINE, 1);
330#ifdef __alpha__
331 alpha_platform_assign_pciintr(cfg);
332#endif
333
271
334#ifdef APIC_IO
335 if (cfg->intpin != 0) {
336 int airq;
337
338 airq = pci_apic_irq(cfg->bus, cfg->slot, cfg->intpin);
339 if (airq >= 0) {
340 /* PCI specific entry found in MP table */
341 if (airq != cfg->intline) {
342 undirect_pci_irq(cfg->intline);
343 cfg->intline = airq;
344 }
345 } else {
346 /*
347 * PCI interrupts might be redirected to the
348 * ISA bus according to some MP tables. Use the
349 * same methods as used by the ISA devices
350 * devices to find the proper IOAPIC int pin.
351 */
352 airq = isa_apic_irq(cfg->intline);
353 if ((airq >= 0) && (airq != cfg->intline)) {
354 /* XXX: undirect_pci_irq() ? */
355 undirect_isa_irq(cfg->intline);
356 cfg->intline = airq;
357 }
358 }
359 }
360#endif /* APIC_IO */
361
362 cfg->mingnt = REG(PCIR_MINGNT, 1);
363 cfg->maxlat = REG(PCIR_MAXLAT, 1);
364
365 cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0;
366 cfg->hdrtype &= ~PCIM_MFDEV;
367
368 pci_fixancient(cfg);
369 pci_hdrtypedata(pcib, b, s, f, cfg);

--- 701 unchanged lines hidden (view full) ---

1071 }
1072 }
1073}
1074
1075static int
1076pci_probe(device_t dev)
1077{
1078 static int once, busno;
272 cfg->mingnt = REG(PCIR_MINGNT, 1);
273 cfg->maxlat = REG(PCIR_MAXLAT, 1);
274
275 cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0;
276 cfg->hdrtype &= ~PCIM_MFDEV;
277
278 pci_fixancient(cfg);
279 pci_hdrtypedata(pcib, b, s, f, cfg);

--- 701 unchanged lines hidden (view full) ---

981 }
982 }
983}
984
985static int
986pci_probe(device_t dev)
987{
988 static int once, busno;
989 caddr_t vendordata, info;
1079
1080 device_set_desc(dev, "PCI bus");
1081
1082 if (bootverbose)
1083 device_printf(dev, "physical bus=%d\n", pcib_get_bus(dev));
1084
1085 /*
1086 * Since there can be multiple independantly numbered PCI
1087 * busses on some large alpha systems, we can't use the unit
1088 * number to decide what bus we are probing. We ask the parent
1089 * pcib what our bus number is.
1090 */
1091 busno = pcib_get_bus(dev);
1092 if (busno < 0)
1093 return ENXIO;
1094 pci_add_children(dev, busno);
1095
1096 if (!once) {
1097 make_dev(&pcicdev, 0, UID_ROOT, GID_WHEEL, 0644, "pci");
990
991 device_set_desc(dev, "PCI bus");
992
993 if (bootverbose)
994 device_printf(dev, "physical bus=%d\n", pcib_get_bus(dev));
995
996 /*
997 * Since there can be multiple independantly numbered PCI
998 * busses on some large alpha systems, we can't use the unit
999 * number to decide what bus we are probing. We ask the parent
1000 * pcib what our bus number is.
1001 */
1002 busno = pcib_get_bus(dev);
1003 if (busno < 0)
1004 return ENXIO;
1005 pci_add_children(dev, busno);
1006
1007 if (!once) {
1008 make_dev(&pcicdev, 0, UID_ROOT, GID_WHEEL, 0644, "pci");
1009 if ((vendordata = preload_search_by_type("pci_vendor_data")) != NULL) {
1010 info = preload_search_info(vendordata, MODINFO_ADDR);
1011 pci_vendordata = *(char **)info;
1012 info = preload_search_info(vendordata, MODINFO_SIZE);
1013 pci_vendordata_size = *(size_t *)info;
1014 /* terminate the database */
1015 pci_vendordata[pci_vendordata_size] = '\n';
1016 }
1098 once++;
1099 }
1100
1101 return 0;
1102}
1103
1104static int
1105pci_print_resources(struct resource_list *rl, const char *name, int type,

--- 46 unchanged lines hidden (view full) ---

1152 retval += printf(" at device %d.%d", pci_get_slot(child),
1153 pci_get_function(child));
1154
1155 retval += bus_print_child_footer(dev, child);
1156
1157 return (retval);
1158}
1159
1017 once++;
1018 }
1019
1020 return 0;
1021}
1022
1023static int
1024pci_print_resources(struct resource_list *rl, const char *name, int type,

--- 46 unchanged lines hidden (view full) ---

1071 retval += printf(" at device %d.%d", pci_get_slot(child),
1072 pci_get_function(child));
1073
1074 retval += bus_print_child_footer(dev, child);
1075
1076 return (retval);
1077}
1078
1079static struct
1080{
1081 int class;
1082 int subclass;
1083 char *desc;
1084} pci_nomatch_tab[] = {
1085 {PCIC_OLD, -1, "old"},
1086 {PCIC_OLD, PCIS_OLD_NONVGA, "non-VGA display device"},
1087 {PCIC_OLD, PCIS_OLD_VGA, "VGA-compatible display device"},
1088 {PCIC_STORAGE, -1, "mass storage"},
1089 {PCIC_STORAGE, PCIS_STORAGE_SCSI, "SCSI"},
1090 {PCIC_STORAGE, PCIS_STORAGE_IDE, "ATA"},
1091 {PCIC_STORAGE, PCIS_STORAGE_FLOPPY, "floppy disk"},
1092 {PCIC_STORAGE, PCIS_STORAGE_IPI, "IPI"},
1093 {PCIC_STORAGE, PCIS_STORAGE_RAID, "RAID"},
1094 {PCIC_NETWORK, -1, "network"},
1095 {PCIC_NETWORK, PCIS_NETWORK_ETHERNET, "ethernet"},
1096 {PCIC_NETWORK, PCIS_NETWORK_TOKENRING, "token ring"},
1097 {PCIC_NETWORK, PCIS_NETWORK_FDDI, "fddi"},
1098 {PCIC_NETWORK, PCIS_NETWORK_ATM, "ATM"},
1099 {PCIC_DISPLAY, -1, "display"},
1100 {PCIC_DISPLAY, PCIS_DISPLAY_VGA, "VGA"},
1101 {PCIC_DISPLAY, PCIS_DISPLAY_XGA, "XGA"},
1102 {PCIC_MULTIMEDIA, -1, "multimedia"},
1103 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_VIDEO, "video"},
1104 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_AUDIO, "audio"},
1105 {PCIC_MEMORY, -1, "memory"},
1106 {PCIC_MEMORY, PCIS_MEMORY_RAM, "RAM"},
1107 {PCIC_MEMORY, PCIS_MEMORY_FLASH, "flash"},
1108 {PCIC_BRIDGE, -1, "bridge"},
1109 {PCIC_BRIDGE, PCIS_BRIDGE_HOST, "HOST-PCI"},
1110 {PCIC_BRIDGE, PCIS_BRIDGE_ISA, "PCI-ISA"},
1111 {PCIC_BRIDGE, PCIS_BRIDGE_EISA, "PCI-EISA"},
1112 {PCIC_BRIDGE, PCIS_BRIDGE_MCA, "PCI-MCA"},
1113 {PCIC_BRIDGE, PCIS_BRIDGE_PCI, "PCI-PCI"},
1114 {PCIC_BRIDGE, PCIS_BRIDGE_PCMCIA, "PCI-PCMCIA"},
1115 {PCIC_BRIDGE, PCIS_BRIDGE_NUBUS, "PCI-NuBus"},
1116 {PCIC_BRIDGE, PCIS_BRIDGE_CARDBUS, "PCI-CardBus"},
1117 {PCIC_BRIDGE, PCIS_BRIDGE_OTHER, "PCI-unknown"},
1118 {PCIC_SIMPLECOMM, -1, "simple comms"},
1119 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_UART, "UART"}, /* could detect 16550 */
1120 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_PAR, "parallel port"},
1121 {PCIC_BASEPERIPH, -1, "base peripheral"},
1122 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PIC, "interrupt controller"},
1123 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_DMA, "DMA controller"},
1124 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_TIMER, "timer"},
1125 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RTC, "realtime clock"},
1126 {PCIC_INPUTDEV, -1, "input device"},
1127 {PCIC_INPUTDEV, PCIS_INPUTDEV_KEYBOARD, "keyboard"},
1128 {PCIC_INPUTDEV, PCIS_INPUTDEV_DIGITIZER,"digitizer"},
1129 {PCIC_INPUTDEV, PCIS_INPUTDEV_MOUSE, "mouse"},
1130 {PCIC_DOCKING, -1, "docking station"},
1131 {PCIC_PROCESSOR, -1, "processor"},
1132 {PCIC_SERIALBUS, -1, "serial bus"},
1133 {PCIC_SERIALBUS, PCIS_SERIALBUS_FW, "FireWire"},
1134 {PCIC_SERIALBUS, PCIS_SERIALBUS_ACCESS, "AccessBus"},
1135 {PCIC_SERIALBUS, PCIS_SERIALBUS_SSA, "SSA"},
1136 {PCIC_SERIALBUS, PCIS_SERIALBUS_USB, "USB"},
1137 {PCIC_SERIALBUS, PCIS_SERIALBUS_FC, "Fibre Channel"},
1138 {PCIC_SERIALBUS, PCIS_SERIALBUS_SMBUS, "SMBus"},
1139 {0, 0, NULL}
1140};
1141
1160static void
1161pci_probe_nomatch(device_t dev, device_t child)
1162{
1142static void
1143pci_probe_nomatch(device_t dev, device_t child)
1144{
1163 struct pci_devinfo *dinfo;
1164 pcicfgregs *cfg;
1165 const char *desc;
1166 int unknown;
1145 int i;
1146 char *cp, *scp, *device;
1147
1148 /*
1149 * Look for a listing for this device in a loaded device database.
1150 */
1151 if ((device = pci_describe_device(child)) != NULL) {
1152 printf("<%s>", device);
1153 free(device, M_DEVBUF);
1154 } else {
1155 /*
1156 * Scan the class/subclass descriptions for a general description.
1157 */
1158 cp = "unknown";
1159 scp = NULL;
1160 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
1161 if (pci_nomatch_tab[i].class == pci_get_class(child)) {
1162 if (pci_nomatch_tab[i].subclass == -1) {
1163 cp = pci_nomatch_tab[i].desc;
1164 } else if (pci_nomatch_tab[i].subclass == pci_get_subclass(child)) {
1165 scp = pci_nomatch_tab[i].desc;
1166 }
1167 }
1168 }
1169 device_printf(dev, "<%s%s%s>",
1170 cp ? : "",
1171 ((cp != NULL) && (scp != NULL)) ? ", " : "",
1172 scp ? : "");
1173 }
1174 printf(" at %d:%d (no driver attached)\n",
1175 pci_get_slot(child),
1176 pci_get_function(child));
1177 return;
1178}
1167
1179
1168 unknown = 0;
1169 dinfo = device_get_ivars(child);
1170 cfg = &dinfo->cfg;
1171 desc = pci_ata_match(child);
1172 if (!desc) desc = pci_usb_match(child);
1173 if (!desc) desc = pci_vga_match(child);
1174 if (!desc) desc = pci_chip_match(child);
1175 if (!desc) {
1176 desc = "unknown card";
1177 unknown++;
1180/*
1181 * Parse the PCI device database, if loaded, and return a pointer to a
1182 * description of the device.
1183 *
1184 * The database is flat text formatted as follows:
1185 *
1186 * Any line not in a valid format is ignored.
1187 * Lines are terminated with newline '\n' characters.
1188 *
1189 * A VENDOR line consists of the 4 digit (hex) vendor code, a TAB, then
1190 * the vendor name.
1191 *
1192 * A DEVICE line is entered immediately below the corresponding VENDOR ID.
1193 * - devices cannot be listed without a corresponding VENDOR line.
1194 * A DEVICE line consists of a TAB, the 4 digit (hex) device code,
1195 * another TAB, then the device name.
1196 */
1197
1198/*
1199 * Assuming (ptr) points to the beginning of a line in the database,
1200 * return the vendor or device and description of the next entry.
1201 * The value of (vendor) or (device) inappropriate for the entry type
1202 * is set to -1. Returns nonzero at the end of the database.
1203 *
1204 * Note that this is slightly unrobust in the face of corrupt data;
1205 * we attempt to safeguard against this by spamming the end of the
1206 * database with a newline when we initialise.
1207 */
1208static int
1209pci_describe_parse_line(char **ptr, int *vendor, int *device, char **desc)
1210{
1211 char *cp = *ptr;
1212
1213 *device = -1;
1214 *vendor = -1;
1215 *desc = NULL;
1216 for (;;) {
1217 if ((cp - pci_vendordata) >= pci_vendordata_size)
1218 return(1);
1219
1220 /* vendor entry? */
1221 if (sscanf(cp, "%x\t%80[^\n]", vendor, *desc) == 2)
1222 break;
1223 /* device entry? */
1224 if (sscanf(cp, "\t%x\t%80[^\n]", device, *desc) == 2)
1225 break;
1226
1227 /* skip to next line */
1228 while (*cp != '\n')
1229 cp++;
1230 cp++;
1178 }
1231 }
1179 device_printf(dev, "<%s>", desc);
1180 if (bootverbose || unknown) {
1181 printf(" (vendor=0x%04x, dev=0x%04x)",
1182 cfg->vendor,
1183 cfg->device);
1232 *ptr = cp;
1233 return(0);
1234}
1235
1236static char *
1237pci_describe_device(device_t dev)
1238{
1239 int vendor, device;
1240 char *desc, *vp, *dp, *line;
1241
1242 desc = vp = dp = NULL;
1243
1244 /*
1245 * If we have no vendor data, we can't do anything.
1246 */
1247 if (pci_vendordata == NULL)
1248 goto out;
1249
1250 /*
1251 * Scan the vendor data looking for this device
1252 */
1253 line = pci_vendordata;
1254 if ((vp = malloc(80, M_DEVBUF, M_NOWAIT)) == NULL)
1255 goto out;
1256 for (;;) {
1257 if (pci_describe_parse_line(&line, &vendor, &device, &vp))
1258 goto out;
1259 if (vendor == pci_get_vendor(dev))
1260 break;
1184 }
1261 }
1185 printf(" at %d.%d",
1186 pci_get_slot(child),
1187 pci_get_function(child));
1188 if (cfg->intpin > 0 && cfg->intline != 255) {
1189 printf(" irq %d", cfg->intline);
1262 if ((dp = malloc(80, M_DEVBUF, M_NOWAIT)) == NULL)
1263 goto out;
1264 for (;;) {
1265 if (pci_describe_parse_line(&line, &vendor, &device, &dp))
1266 goto out;
1267 if (vendor != -1) {
1268 *dp = 0;
1269 break;
1270 }
1271 if (device == pci_get_device(dev))
1272 break;
1190 }
1273 }
1191 printf("\n");
1192
1193 return;
1274 if ((desc = malloc(strlen(vp) + strlen(dp) + 3, M_DEVBUF, M_NOWAIT)) != NULL)
1275 sprintf(desc, "%s%s%s", vp, (dp[0] != 0) ? ", " : "", dp);
1276 out:
1277 if (vp != NULL)
1278 free(vp, M_DEVBUF);
1279 if (dp != NULL)
1280 free(dp, M_DEVBUF);
1281 return(desc);
1194}
1195
1282}
1283
1284
1196static int
1197pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1198{
1199 struct pci_devinfo *dinfo;
1200 pcicfgregs *cfg;
1201
1202 dinfo = device_get_ivars(child);
1203 cfg = &dinfo->cfg;

--- 100 unchanged lines hidden (view full) ---

1304 pcicfgregs *cfg = &dinfo->cfg;
1305
1306 /*
1307 * Perform lazy resource allocation
1308 *
1309 * XXX add support here for SYS_RES_IOPORT and SYS_RES_MEMORY
1310 */
1311 if (device_get_parent(child) == dev) {
1285static int
1286pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1287{
1288 struct pci_devinfo *dinfo;
1289 pcicfgregs *cfg;
1290
1291 dinfo = device_get_ivars(child);
1292 cfg = &dinfo->cfg;

--- 100 unchanged lines hidden (view full) ---

1393 pcicfgregs *cfg = &dinfo->cfg;
1394
1395 /*
1396 * Perform lazy resource allocation
1397 *
1398 * XXX add support here for SYS_RES_IOPORT and SYS_RES_MEMORY
1399 */
1400 if (device_get_parent(child) == dev) {
1312 if ((type == SYS_RES_IRQ) && (cfg->intline == 255)) {
1313#ifdef __i386__
1314 cfg->intline = PCIB_ROUTE_INTERRUPT(
1315 device_get_parent(dev), pci_get_slot(child),
1316 cfg->intpin);
1317#endif /* __i386__ */
1401 /*
1402 * If device doesn't have an interrupt routed, and is deserving of
1403 * an interrupt, try to assign it one.
1404 */
1405 if ((type == SYS_RES_IRQ) && (cfg->intline == 255) && (cfg->intpin != 0)) {
1406 cfg->intline = PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
1407 cfg->intpin);
1318 if (cfg->intline != 255) {
1319 pci_write_config(child, PCIR_INTLINE, cfg->intline, 1);
1320 resource_list_add(rl, SYS_RES_IRQ, 0,
1408 if (cfg->intline != 255) {
1409 pci_write_config(child, PCIR_INTLINE, cfg->intline, 1);
1410 resource_list_add(rl, SYS_RES_IRQ, 0,
1321 cfg->intline, cfg->intline, 1);
1411 cfg->intline, cfg->intline, 1);
1322 }
1323 }
1324 }
1325
1326 return resource_list_alloc(rl, dev, child, type, rid,
1327 start, end, count, flags);
1328}
1329

--- 84 unchanged lines hidden (view full) ---

1414 DEVMETHOD(pci_write_config, pci_write_config_method),
1415
1416 { 0, 0 }
1417};
1418
1419static driver_t pci_driver = {
1420 "pci",
1421 pci_methods,
1412 }
1413 }
1414 }
1415
1416 return resource_list_alloc(rl, dev, child, type, rid,
1417 start, end, count, flags);
1418}
1419

--- 84 unchanged lines hidden (view full) ---

1504 DEVMETHOD(pci_write_config, pci_write_config_method),
1505
1506 { 0, 0 }
1507};
1508
1509static driver_t pci_driver = {
1510 "pci",
1511 pci_methods,
1422 1, /* no softc */
1512 0, /* no softc */
1423};
1424DRIVER_MODULE(pci, pcib, pci_driver, pci_devclass, pci_modevent, 0);
1425DRIVER_MODULE(pci, acpi_pcib, pci_driver, pci_devclass, pci_modevent, 0);
1513};
1514DRIVER_MODULE(pci, pcib, pci_driver, pci_devclass, pci_modevent, 0);
1515DRIVER_MODULE(pci, acpi_pcib, pci_driver, pci_devclass, pci_modevent, 0);