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pci.c (261527) pci.c (261790)
1/*-
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 13 unchanged lines hidden (view full) ---

22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 13 unchanged lines hidden (view full) ---

22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/pci/pci.c 261527 2014-02-05 20:52:12Z jhb $");
30__FBSDID("$FreeBSD: head/sys/dev/pci/pci.c 261790 2014-02-12 04:30:37Z jhb $");
31
32#include "opt_bus.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/malloc.h>
37#include <sys/module.h>
38#include <sys/linker.h>

--- 48 unchanged lines hidden (view full) ---

87static int pci_porten(device_t dev);
88static int pci_memen(device_t dev);
89static void pci_assign_interrupt(device_t bus, device_t dev,
90 int force_route);
91static int pci_add_map(device_t bus, device_t dev, int reg,
92 struct resource_list *rl, int force, int prefetch);
93static int pci_probe(device_t dev);
94static int pci_attach(device_t dev);
31
32#include "opt_bus.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/malloc.h>
37#include <sys/module.h>
38#include <sys/linker.h>

--- 48 unchanged lines hidden (view full) ---

87static int pci_porten(device_t dev);
88static int pci_memen(device_t dev);
89static void pci_assign_interrupt(device_t bus, device_t dev,
90 int force_route);
91static int pci_add_map(device_t bus, device_t dev, int reg,
92 struct resource_list *rl, int force, int prefetch);
93static int pci_probe(device_t dev);
94static int pci_attach(device_t dev);
95#ifdef PCI_RES_BUS
96static int pci_detach(device_t dev);
97#endif
95static void pci_load_vendor_data(void);
96static int pci_describe_parse_line(char **ptr, int *vendor,
97 int *device, char **desc);
98static char *pci_describe_device(device_t dev);
99static int pci_modevent(module_t mod, int what, void *arg);
100static void pci_hdrtypedata(device_t pcib, int b, int s, int f,
101 pcicfgregs *cfg);
102static void pci_read_cap(device_t pcib, pcicfgregs *cfg);

--- 17 unchanged lines hidden (view full) ---

120static void pci_resume_msix(device_t dev);
121static int pci_remap_intr_method(device_t bus, device_t dev,
122 u_int irq);
123
124static device_method_t pci_methods[] = {
125 /* Device interface */
126 DEVMETHOD(device_probe, pci_probe),
127 DEVMETHOD(device_attach, pci_attach),
98static void pci_load_vendor_data(void);
99static int pci_describe_parse_line(char **ptr, int *vendor,
100 int *device, char **desc);
101static char *pci_describe_device(device_t dev);
102static int pci_modevent(module_t mod, int what, void *arg);
103static void pci_hdrtypedata(device_t pcib, int b, int s, int f,
104 pcicfgregs *cfg);
105static void pci_read_cap(device_t pcib, pcicfgregs *cfg);

--- 17 unchanged lines hidden (view full) ---

123static void pci_resume_msix(device_t dev);
124static int pci_remap_intr_method(device_t bus, device_t dev,
125 u_int irq);
126
127static device_method_t pci_methods[] = {
128 /* Device interface */
129 DEVMETHOD(device_probe, pci_probe),
130 DEVMETHOD(device_attach, pci_attach),
131#ifdef PCI_RES_BUS
132 DEVMETHOD(device_detach, pci_detach),
133#else
128 DEVMETHOD(device_detach, bus_generic_detach),
134 DEVMETHOD(device_detach, bus_generic_detach),
135#endif
129 DEVMETHOD(device_shutdown, bus_generic_shutdown),
130 DEVMETHOD(device_suspend, pci_suspend),
131 DEVMETHOD(device_resume, pci_resume),
132
133 /* Bus interface */
134 DEVMETHOD(bus_print_child, pci_print_child),
135 DEVMETHOD(bus_probe_nomatch, pci_probe_nomatch),
136 DEVMETHOD(bus_read_ivar, pci_read_ivar),

--- 195 unchanged lines hidden (view full) ---

332Disable this if you depend on BIOS emulation of USB devices, that is\n\
333you use USB devices (like keyboard or mouse) but do not load USB drivers");
334
335static int pci_clear_bars;
336TUNABLE_INT("hw.pci.clear_bars", &pci_clear_bars);
337SYSCTL_INT(_hw_pci, OID_AUTO, clear_bars, CTLFLAG_RDTUN, &pci_clear_bars, 0,
338 "Ignore firmware-assigned resources for BARs.");
339
136 DEVMETHOD(device_shutdown, bus_generic_shutdown),
137 DEVMETHOD(device_suspend, pci_suspend),
138 DEVMETHOD(device_resume, pci_resume),
139
140 /* Bus interface */
141 DEVMETHOD(bus_print_child, pci_print_child),
142 DEVMETHOD(bus_probe_nomatch, pci_probe_nomatch),
143 DEVMETHOD(bus_read_ivar, pci_read_ivar),

--- 195 unchanged lines hidden (view full) ---

339Disable this if you depend on BIOS emulation of USB devices, that is\n\
340you use USB devices (like keyboard or mouse) but do not load USB drivers");
341
342static int pci_clear_bars;
343TUNABLE_INT("hw.pci.clear_bars", &pci_clear_bars);
344SYSCTL_INT(_hw_pci, OID_AUTO, clear_bars, CTLFLAG_RDTUN, &pci_clear_bars, 0,
345 "Ignore firmware-assigned resources for BARs.");
346
347#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
348static int pci_clear_buses;
349TUNABLE_INT("hw.pci.clear_buses", &pci_clear_buses);
350SYSCTL_INT(_hw_pci, OID_AUTO, clear_buses, CTLFLAG_RDTUN, &pci_clear_buses, 0,
351 "Ignore firmware-assigned bus numbers.");
352#endif
353
340static int
341pci_has_quirk(uint32_t devid, int quirk)
342{
343 const struct pci_quirk *q;
344
345 for (q = &pci_quirks[0]; q->devid; q++) {
346 if (q->devid == devid && q->type == quirk)
347 return (1);

--- 2844 unchanged lines hidden (view full) ---

3192 /* Disable interrupts */
3193 offs = bus_read_1(res, XHCI_CAPLENGTH);
3194 bus_write_4(res, offs + XHCI_USBCMD, 0);
3195 bus_read_4(res, offs + XHCI_USBSTS);
3196 }
3197 bus_release_resource(self, SYS_RES_MEMORY, rid, res);
3198}
3199
354static int
355pci_has_quirk(uint32_t devid, int quirk)
356{
357 const struct pci_quirk *q;
358
359 for (q = &pci_quirks[0]; q->devid; q++) {
360 if (q->devid == devid && q->type == quirk)
361 return (1);

--- 2844 unchanged lines hidden (view full) ---

3206 /* Disable interrupts */
3207 offs = bus_read_1(res, XHCI_CAPLENGTH);
3208 bus_write_4(res, offs + XHCI_USBCMD, 0);
3209 bus_read_4(res, offs + XHCI_USBSTS);
3210 }
3211 bus_release_resource(self, SYS_RES_MEMORY, rid, res);
3212}
3213
3214#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
3215static void
3216pci_reserve_secbus(device_t bus, device_t dev, pcicfgregs *cfg,
3217 struct resource_list *rl)
3218{
3219 struct resource *res;
3220 char *cp;
3221 u_long start, end, count;
3222 int rid, sec_bus, sec_reg, sub_bus, sub_reg, sup_bus;
3223
3224 switch (cfg->hdrtype & PCIM_HDRTYPE) {
3225 case PCIM_HDRTYPE_BRIDGE:
3226 sec_reg = PCIR_SECBUS_1;
3227 sub_reg = PCIR_SUBBUS_1;
3228 break;
3229 case PCIM_HDRTYPE_CARDBUS:
3230 sec_reg = PCIR_SECBUS_2;
3231 sub_reg = PCIR_SUBBUS_2;
3232 break;
3233 default:
3234 return;
3235 }
3236
3237 /*
3238 * If the existing bus range is valid, attempt to reserve it
3239 * from our parent. If this fails for any reason, clear the
3240 * secbus and subbus registers.
3241 *
3242 * XXX: Should we reset sub_bus to sec_bus if it is < sec_bus?
3243 * This would at least preserve the existing sec_bus if it is
3244 * valid.
3245 */
3246 sec_bus = PCI_READ_CONFIG(bus, dev, sec_reg, 1);
3247 sub_bus = PCI_READ_CONFIG(bus, dev, sub_reg, 1);
3248
3249 /* Quirk handling. */
3250 switch (pci_get_devid(dev)) {
3251 case 0x12258086: /* Intel 82454KX/GX (Orion) */
3252 sup_bus = pci_read_config(dev, 0x41, 1);
3253 if (sup_bus != 0xff) {
3254 sec_bus = sup_bus + 1;
3255 sub_bus = sup_bus + 1;
3256 PCI_WRITE_CONFIG(bus, dev, sec_reg, sec_bus, 1);
3257 PCI_WRITE_CONFIG(bus, dev, sub_reg, sub_bus, 1);
3258 }
3259 break;
3260
3261 case 0x00dd10de:
3262 /* Compaq R3000 BIOS sets wrong subordinate bus number. */
3263 if ((cp = getenv("smbios.planar.maker")) == NULL)
3264 break;
3265 if (strncmp(cp, "Compal", 6) != 0) {
3266 freeenv(cp);
3267 break;
3268 }
3269 freeenv(cp);
3270 if ((cp = getenv("smbios.planar.product")) == NULL)
3271 break;
3272 if (strncmp(cp, "08A0", 4) != 0) {
3273 freeenv(cp);
3274 break;
3275 }
3276 freeenv(cp);
3277 if (sub_bus < 0xa) {
3278 sub_bus = 0xa;
3279 PCI_WRITE_CONFIG(bus, dev, sub_reg, sub_bus, 1);
3280 }
3281 break;
3282 }
3283
3284 if (bootverbose)
3285 printf("\tsecbus=%d, subbus=%d\n", sec_bus, sub_bus);
3286 if (sec_bus > 0 && sub_bus >= sec_bus) {
3287 start = sec_bus;
3288 end = sub_bus;
3289 count = end - start + 1;
3290
3291 resource_list_add(rl, PCI_RES_BUS, 0, 0ul, ~0ul, count);
3292
3293 /*
3294 * If requested, clear secondary bus registers in
3295 * bridge devices to force a complete renumbering
3296 * rather than reserving the existing range. However,
3297 * preserve the existing size.
3298 */
3299 if (pci_clear_buses)
3300 goto clear;
3301
3302 rid = 0;
3303 res = resource_list_reserve(rl, bus, dev, PCI_RES_BUS, &rid,
3304 start, end, count, 0);
3305 if (res != NULL)
3306 return;
3307
3308 if (bootverbose)
3309 device_printf(bus,
3310 "pci%d:%d:%d:%d secbus failed to allocate\n",
3311 pci_get_domain(dev), pci_get_bus(dev),
3312 pci_get_slot(dev), pci_get_function(dev));
3313 }
3314
3315clear:
3316 PCI_WRITE_CONFIG(bus, dev, sec_reg, 0, 1);
3317 PCI_WRITE_CONFIG(bus, dev, sub_reg, 0, 1);
3318}
3319
3320static struct resource *
3321pci_alloc_secbus(device_t dev, device_t child, int *rid, u_long start,
3322 u_long end, u_long count, u_int flags)
3323{
3324 struct pci_devinfo *dinfo;
3325 pcicfgregs *cfg;
3326 struct resource_list *rl;
3327 struct resource *res;
3328 int sec_reg, sub_reg;
3329
3330 dinfo = device_get_ivars(child);
3331 cfg = &dinfo->cfg;
3332 rl = &dinfo->resources;
3333 switch (cfg->hdrtype & PCIM_HDRTYPE) {
3334 case PCIM_HDRTYPE_BRIDGE:
3335 sec_reg = PCIR_SECBUS_1;
3336 sub_reg = PCIR_SUBBUS_1;
3337 break;
3338 case PCIM_HDRTYPE_CARDBUS:
3339 sec_reg = PCIR_SECBUS_2;
3340 sub_reg = PCIR_SUBBUS_2;
3341 break;
3342 default:
3343 return (NULL);
3344 }
3345
3346 if (*rid != 0)
3347 return (NULL);
3348
3349 if (resource_list_find(rl, PCI_RES_BUS, *rid) == NULL)
3350 resource_list_add(rl, PCI_RES_BUS, *rid, start, end, count);
3351 if (!resource_list_reserved(rl, PCI_RES_BUS, *rid)) {
3352 res = resource_list_reserve(rl, dev, child, PCI_RES_BUS, rid,
3353 start, end, count, flags & ~RF_ACTIVE);
3354 if (res == NULL) {
3355 resource_list_delete(rl, PCI_RES_BUS, *rid);
3356 device_printf(child, "allocating %lu bus%s failed\n",
3357 count, count == 1 ? "" : "es");
3358 return (NULL);
3359 }
3360 if (bootverbose)
3361 device_printf(child,
3362 "Lazy allocation of %lu bus%s at %lu\n", count,
3363 count == 1 ? "" : "es", rman_get_start(res));
3364 PCI_WRITE_CONFIG(dev, child, sec_reg, rman_get_start(res), 1);
3365 PCI_WRITE_CONFIG(dev, child, sub_reg, rman_get_end(res), 1);
3366 }
3367 return (resource_list_alloc(rl, dev, child, PCI_RES_BUS, rid, start,
3368 end, count, flags));
3369}
3370#endif
3371
3200void
3201pci_add_resources(device_t bus, device_t dev, int force, uint32_t prefetchmask)
3202{
3203 struct pci_devinfo *dinfo;
3204 pcicfgregs *cfg;
3205 struct resource_list *rl;
3206 const struct pci_quirk *q;
3207 uint32_t devid;

--- 56 unchanged lines hidden (view full) ---

3264 xhci_early_takeover(dev);
3265 else if (pci_get_progif(dev) == PCIP_SERIALBUS_USB_EHCI)
3266 ehci_early_takeover(dev);
3267 else if (pci_get_progif(dev) == PCIP_SERIALBUS_USB_OHCI)
3268 ohci_early_takeover(dev);
3269 else if (pci_get_progif(dev) == PCIP_SERIALBUS_USB_UHCI)
3270 uhci_early_takeover(dev);
3271 }
3372void
3373pci_add_resources(device_t bus, device_t dev, int force, uint32_t prefetchmask)
3374{
3375 struct pci_devinfo *dinfo;
3376 pcicfgregs *cfg;
3377 struct resource_list *rl;
3378 const struct pci_quirk *q;
3379 uint32_t devid;

--- 56 unchanged lines hidden (view full) ---

3436 xhci_early_takeover(dev);
3437 else if (pci_get_progif(dev) == PCIP_SERIALBUS_USB_EHCI)
3438 ehci_early_takeover(dev);
3439 else if (pci_get_progif(dev) == PCIP_SERIALBUS_USB_OHCI)
3440 ohci_early_takeover(dev);
3441 else if (pci_get_progif(dev) == PCIP_SERIALBUS_USB_UHCI)
3442 uhci_early_takeover(dev);
3443 }
3444
3445#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
3446 /*
3447 * Reserve resources for secondary bus ranges behind bridge
3448 * devices.
3449 */
3450 pci_reserve_secbus(bus, dev, cfg, rl);
3451#endif
3272}
3273
3274void
3275pci_add_children(device_t dev, int domain, int busno, size_t dinfo_size)
3276{
3277#define REG(n, w) PCIB_READ_CONFIG(pcib, busno, s, f, n, w)
3278 device_t pcib = device_get_parent(dev);
3279 struct pci_devinfo *dinfo;

--- 49 unchanged lines hidden (view full) ---

3329int
3330pci_attach_common(device_t dev)
3331{
3332 struct pci_softc *sc;
3333 int busno, domain;
3334#ifdef PCI_DMA_BOUNDARY
3335 int error, tag_valid;
3336#endif
3452}
3453
3454void
3455pci_add_children(device_t dev, int domain, int busno, size_t dinfo_size)
3456{
3457#define REG(n, w) PCIB_READ_CONFIG(pcib, busno, s, f, n, w)
3458 device_t pcib = device_get_parent(dev);
3459 struct pci_devinfo *dinfo;

--- 49 unchanged lines hidden (view full) ---

3509int
3510pci_attach_common(device_t dev)
3511{
3512 struct pci_softc *sc;
3513 int busno, domain;
3514#ifdef PCI_DMA_BOUNDARY
3515 int error, tag_valid;
3516#endif
3517#ifdef PCI_RES_BUS
3518 int rid;
3519#endif
3337
3338 sc = device_get_softc(dev);
3339 domain = pcib_get_domain(dev);
3340 busno = pcib_get_bus(dev);
3520
3521 sc = device_get_softc(dev);
3522 domain = pcib_get_domain(dev);
3523 busno = pcib_get_bus(dev);
3524#ifdef PCI_RES_BUS
3525 rid = 0;
3526 sc->sc_bus = bus_alloc_resource(dev, PCI_RES_BUS, &rid, busno, busno,
3527 1, 0);
3528 if (sc->sc_bus == NULL) {
3529 device_printf(dev, "failed to allocate bus number\n");
3530 return (ENXIO);
3531 }
3532#endif
3341 if (bootverbose)
3342 device_printf(dev, "domain=%d, physical bus=%d\n",
3343 domain, busno);
3344#ifdef PCI_DMA_BOUNDARY
3345 tag_valid = 0;
3346 if (device_get_devclass(device_get_parent(device_get_parent(dev))) !=
3347 devclass_find("pci")) {
3348 error = bus_dma_tag_create(bus_get_dma_tag(dev), 1,

--- 28 unchanged lines hidden (view full) ---

3377 * the parent pcib what our domain and bus numbers are.
3378 */
3379 domain = pcib_get_domain(dev);
3380 busno = pcib_get_bus(dev);
3381 pci_add_children(dev, domain, busno, sizeof(struct pci_devinfo));
3382 return (bus_generic_attach(dev));
3383}
3384
3533 if (bootverbose)
3534 device_printf(dev, "domain=%d, physical bus=%d\n",
3535 domain, busno);
3536#ifdef PCI_DMA_BOUNDARY
3537 tag_valid = 0;
3538 if (device_get_devclass(device_get_parent(device_get_parent(dev))) !=
3539 devclass_find("pci")) {
3540 error = bus_dma_tag_create(bus_get_dma_tag(dev), 1,

--- 28 unchanged lines hidden (view full) ---

3569 * the parent pcib what our domain and bus numbers are.
3570 */
3571 domain = pcib_get_domain(dev);
3572 busno = pcib_get_bus(dev);
3573 pci_add_children(dev, domain, busno, sizeof(struct pci_devinfo));
3574 return (bus_generic_attach(dev));
3575}
3576
3577#ifdef PCI_RES_BUS
3578static int
3579pci_detach(device_t dev)
3580{
3581 struct pci_softc *sc;
3582 int error;
3583
3584 error = bus_generic_detach(dev);
3585 if (error)
3586 return (error);
3587 sc = device_get_softc(dev);
3588 return (bus_release_resource(dev, PCI_RES_BUS, 0, sc->sc_bus));
3589}
3590#endif
3591
3385static void
3386pci_set_power_children(device_t dev, device_t *devlist, int numdevs,
3387 int state)
3388{
3389 device_t child, pcib;
3390 struct pci_devinfo *dinfo;
3391 int dstate, i;
3392

--- 481 unchanged lines hidden (view full) ---

3874 if (dinfo->cfg.msi.msi_alloc != 0 || dinfo->cfg.msix.msix_alloc != 0) {
3875 pci_printf(&dinfo->cfg, "Device leaked MSI vectors\n");
3876 (void)pci_release_msi(child);
3877 }
3878 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0)
3879 pci_printf(&dinfo->cfg, "Device leaked memory resources\n");
3880 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0)
3881 pci_printf(&dinfo->cfg, "Device leaked I/O resources\n");
3592static void
3593pci_set_power_children(device_t dev, device_t *devlist, int numdevs,
3594 int state)
3595{
3596 device_t child, pcib;
3597 struct pci_devinfo *dinfo;
3598 int dstate, i;
3599

--- 481 unchanged lines hidden (view full) ---

4081 if (dinfo->cfg.msi.msi_alloc != 0 || dinfo->cfg.msix.msix_alloc != 0) {
4082 pci_printf(&dinfo->cfg, "Device leaked MSI vectors\n");
4083 (void)pci_release_msi(child);
4084 }
4085 if (resource_list_release_active(rl, dev, child, SYS_RES_MEMORY) != 0)
4086 pci_printf(&dinfo->cfg, "Device leaked memory resources\n");
4087 if (resource_list_release_active(rl, dev, child, SYS_RES_IOPORT) != 0)
4088 pci_printf(&dinfo->cfg, "Device leaked I/O resources\n");
4089#ifdef PCI_RES_BUS
4090 if (resource_list_release_active(rl, dev, child, PCI_RES_BUS) != 0)
4091 pci_printf(&dinfo->cfg, "Device leaked PCI bus numbers\n");
4092#endif
3882
3883 pci_cfg_save(child, dinfo, 1);
3884}
3885
3886/*
3887 * Parse the PCI device database, if loaded, and return a pointer to a
3888 * description of the device.
3889 *

--- 400 unchanged lines hidden (view full) ---

4290
4291 /*
4292 * Perform lazy resource allocation
4293 */
4294 dinfo = device_get_ivars(child);
4295 rl = &dinfo->resources;
4296 cfg = &dinfo->cfg;
4297 switch (type) {
4093
4094 pci_cfg_save(child, dinfo, 1);
4095}
4096
4097/*
4098 * Parse the PCI device database, if loaded, and return a pointer to a
4099 * description of the device.
4100 *

--- 400 unchanged lines hidden (view full) ---

4501
4502 /*
4503 * Perform lazy resource allocation
4504 */
4505 dinfo = device_get_ivars(child);
4506 rl = &dinfo->resources;
4507 cfg = &dinfo->cfg;
4508 switch (type) {
4509#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
4510 case PCI_RES_BUS:
4511 return (pci_alloc_secbus(dev, child, rid, start, end, count,
4512 flags));
4513#endif
4298 case SYS_RES_IRQ:
4299 /*
4300 * Can't alloc legacy interrupt once MSI messages have
4301 * been allocated.
4302 */
4303 if (*rid == 0 && (cfg->msi.msi_alloc > 0 ||
4304 cfg->msix.msix_alloc > 0))
4305 return (NULL);

--- 536 unchanged lines hidden --- 		4514 case SYS_RES_IRQ:
4515 /*
4516 * Can't alloc legacy interrupt once MSI messages have
4517 * been allocated.
4518 */
4519 if (*rid == 0 && (cfg->msi.msi_alloc > 0 ||
4520 cfg->msix.msix_alloc > 0))
4521 return (NULL);

--- 536 unchanged lines hidden ---