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pccbb.c (70746) pccbb.c (70748)
1/*
2 * Copyright (c) 2000,2001 Jonathan Chen.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
1/*
2 * Copyright (c) 2000,2001 Jonathan Chen.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/pccbb/pccbb.c 70746 2001-01-07 08:08:54Z imp $
28 * $FreeBSD: head/sys/dev/pccbb/pccbb.c 70748 2001-01-07 16:31:09Z imp $
29 */
30
31/*
32 * Driver for PCI to Cardbus Bridge chips
33 *
34 * References:
35 * TI Datasheets:
36 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS

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93 (((u_int8_t*)((SC)->sc_socketreg))[0x800+(REG)])
94#define PCIC_WRITE(SC,REG,val) \
95 (((u_int8_t*)((SC)->sc_socketreg))[0x800+(REG)]) = (val)
96#define PCIC_MASK(SC,REG,MASK) \
97 PCIC_WRITE(SC,REG,PCIC_READ(SC,REG) MASK)
98#define PCIC_MASK2(SC,REG,MASK,MASK2) \
99 PCIC_WRITE(SC,REG,(PCIC_READ(SC,REG) MASK) MASK2)
100
29 */
30
31/*
32 * Driver for PCI to Cardbus Bridge chips
33 *
34 * References:
35 * TI Datasheets:
36 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS

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93 (((u_int8_t*)((SC)->sc_socketreg))[0x800+(REG)])
94#define PCIC_WRITE(SC,REG,val) \
95 (((u_int8_t*)((SC)->sc_socketreg))[0x800+(REG)]) = (val)
96#define PCIC_MASK(SC,REG,MASK) \
97 PCIC_WRITE(SC,REG,PCIC_READ(SC,REG) MASK)
98#define PCIC_MASK2(SC,REG,MASK,MASK2) \
99 PCIC_WRITE(SC,REG,(PCIC_READ(SC,REG) MASK) MASK2)
100
101#if !defined(lint)
102static const char rcsid[] =
103 "$FreeBSD: head/sys/dev/pccbb/pccbb.c 70746 2001-01-07 08:08:54Z imp $";
104#endif
105
106struct pccbb_sclist {
107 struct pccbb_softc *sc;
108 STAILQ_ENTRY(pccbb_sclist) entries;
109};
110
111static STAILQ_HEAD(, pccbb_sclist) softcs;
112static int softcs_init = 0;
113

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237static struct resource* pccbb_pcic_alloc_resource(device_t self,device_t child,
238 int type, int* rid, u_long start,
239 u_long end, u_long count, u_int flags);
240static int pccbb_pcic_release_resource(device_t self, device_t child, int type,
241 int rid, struct resource *res);
242static int pccbb_pcic_set_res_flags(device_t self, device_t child, int type,
243 int rid, u_int32_t flags);
244static int pccbb_pcic_set_memory_offset(device_t self, device_t child, int rid,
101struct pccbb_sclist {
102 struct pccbb_softc *sc;
103 STAILQ_ENTRY(pccbb_sclist) entries;
104};
105
106static STAILQ_HEAD(, pccbb_sclist) softcs;
107static int softcs_init = 0;
108

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232static struct resource* pccbb_pcic_alloc_resource(device_t self,device_t child,
233 int type, int* rid, u_long start,
234 u_long end, u_long count, u_int flags);
235static int pccbb_pcic_release_resource(device_t self, device_t child, int type,
236 int rid, struct resource *res);
237static int pccbb_pcic_set_res_flags(device_t self, device_t child, int type,
238 int rid, u_int32_t flags);
239static int pccbb_pcic_set_memory_offset(device_t self, device_t child, int rid,
245 u_int32_t offset);
240 u_int32_t offset, u_int32_t *deltap);
246static int pccbb_power_enable_socket(device_t self, device_t child);
247static void pccbb_power_disable_socket(device_t self, device_t child);
248static int pccbb_activate_resource(device_t self, device_t child, int type,
249 int rid, struct resource *r);
250static int pccbb_deactivate_resource(device_t self, device_t child, int type,
251 int rid, struct resource *r);
252static struct resource* pccbb_alloc_resource(device_t self, device_t child,
253 int type, int* rid, u_long start,

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1701 return (EINVAL);
1702 sc->mem[rid].kind = flags;
1703 pccbb_pcic_do_mem_map(sc, rid);
1704 return 0;
1705}
1706
1707static int
1708pccbb_pcic_set_memory_offset(device_t self, device_t child, int rid,
241static int pccbb_power_enable_socket(device_t self, device_t child);
242static void pccbb_power_disable_socket(device_t self, device_t child);
243static int pccbb_activate_resource(device_t self, device_t child, int type,
244 int rid, struct resource *r);
245static int pccbb_deactivate_resource(device_t self, device_t child, int type,
246 int rid, struct resource *r);
247static struct resource* pccbb_alloc_resource(device_t self, device_t child,
248 int type, int* rid, u_long start,

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1696 return (EINVAL);
1697 sc->mem[rid].kind = flags;
1698 pccbb_pcic_do_mem_map(sc, rid);
1699 return 0;
1700}
1701
1702static int
1703pccbb_pcic_set_memory_offset(device_t self, device_t child, int rid,
1709 u_int32_t cardaddr)
1704 u_int32_t cardaddr, u_int32_t *deltap)
1710{
1711 struct pccbb_softc *sc = device_get_softc(self);
1712 int win;
1713 struct pccbb_reslist *rle;
1705{
1706 struct pccbb_softc *sc = device_get_softc(self);
1707 int win;
1708 struct pccbb_reslist *rle;
1709 u_int32_t delta;
1714
1715 win = -1;
1716
1717 SLIST_FOREACH(rle, &sc->rl, entries) {
1718 if (SYS_RES_MEMORY == rle->type && rid == rle->rid &&
1719 child == rle->odev) {
1720 win = rle->win;
1721 break;
1722 }
1723 }
1724 if (win == -1) {
1725 panic("pccbb_pcic: setting memory offset of bogus resource");
1726 return 1;
1727 }
1728
1710
1711 win = -1;
1712
1713 SLIST_FOREACH(rle, &sc->rl, entries) {
1714 if (SYS_RES_MEMORY == rle->type && rid == rle->rid &&
1715 child == rle->odev) {
1716 win = rle->win;
1717 break;
1718 }
1719 }
1720 if (win == -1) {
1721 panic("pccbb_pcic: setting memory offset of bogus resource");
1722 return 1;
1723 }
1724
1729 /* Fixup size since cardaddr must align to PCIC_MEM_PAGESIZE */
1730 /* XXX This should be a marco XXX */
1731 sc->mem[win].realsize = (sc->mem[win].size +
1732 (cardaddr & (PCIC_MEM_PAGESIZE - 1))) & ~(PCIC_MEM_PAGESIZE - 1);
1733 cardaddr &= ~(PCIC_MEM_PAGESIZE - 1);
1725 delta = cardaddr % PCIC_MEM_PAGESIZE;
1726 if (deltap)
1727 *deltap = delta;
1728 cardaddr -= delta;
1729 sc->mem[win].realsize = sc->mem[win].size + delta +
1730 PCIC_MEM_PAGESIZE - 1;
1731 sc->mem[win].realsize = sc->mem[win].realsize -
1732 (sc->mem[win].realsize % PCIC_MEM_PAGESIZE);
1734 sc->mem[win].offset = cardaddr - sc->mem[win].addr;
1735 pccbb_pcic_do_mem_map(sc, win);
1736
1737 return 0;
1738}
1739
1740/************************************************************************/
1741/* POWER methods */

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1733 sc->mem[win].offset = cardaddr - sc->mem[win].addr;
1734 pccbb_pcic_do_mem_map(sc, win);
1735
1736 return 0;
1737}
1738
1739/************************************************************************/
1740/* POWER methods */

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