| driver.h (331576) | driver.h (331580) |
|---|---|
| 1/*- 2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 8 unchanged lines hidden (view full) --- 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * | 1/*- 2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 8 unchanged lines hidden (view full) --- 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * |
| 25 * $FreeBSD: stable/11/sys/dev/mlx5/driver.h 331576 2018-03-26 20:25:24Z hselasky $ | 25 * $FreeBSD: stable/11/sys/dev/mlx5/driver.h 331580 2018-03-26 20:33:31Z hselasky $ |
| 26 */ 27 28#ifndef MLX5_DRIVER_H 29#define MLX5_DRIVER_H 30 31#include <linux/kernel.h> 32#include <linux/completion.h> 33#include <linux/pci.h> --- 440 unchanged lines hidden (view full) --- 474 void __iomem *map; 475}; 476 477 478struct mlx5_core_health { 479 struct mlx5_health_buffer __iomem *health; 480 __be32 __iomem *health_counter; 481 struct timer_list timer; | 26 */ 27 28#ifndef MLX5_DRIVER_H 29#define MLX5_DRIVER_H 30 31#include <linux/kernel.h> 32#include <linux/completion.h> 33#include <linux/pci.h> --- 440 unchanged lines hidden (view full) --- 474 void __iomem *map; 475}; 476 477 478struct mlx5_core_health { 479 struct mlx5_health_buffer __iomem *health; 480 __be32 __iomem *health_counter; 481 struct timer_list timer; |
| 482 struct list_head list; | |
| 483 u32 prev; 484 int miss_counter; | 482 u32 prev; 483 int miss_counter; |
| 484 bool sick; 485 struct workqueue_struct *wq; 486 struct work_struct work; |
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| 485}; 486 487#define MLX5_CQ_LINEAR_ARRAY_SIZE 1024 488 489struct mlx5_cq_linear_array_entry { 490 spinlock_t lock; 491 struct mlx5_core_cq * volatile cq; 492}; --- 85 unchanged lines hidden (view full) --- 578 unsigned long pci_dev_data; 579}; 580 581enum mlx5_device_state { 582 MLX5_DEVICE_STATE_UP, 583 MLX5_DEVICE_STATE_INTERNAL_ERROR, 584}; 585 | 487}; 488 489#define MLX5_CQ_LINEAR_ARRAY_SIZE 1024 490 491struct mlx5_cq_linear_array_entry { 492 spinlock_t lock; 493 struct mlx5_core_cq * volatile cq; 494}; --- 85 unchanged lines hidden (view full) --- 580 unsigned long pci_dev_data; 581}; 582 583enum mlx5_device_state { 584 MLX5_DEVICE_STATE_UP, 585 MLX5_DEVICE_STATE_INTERNAL_ERROR, 586}; 587 |
| 588enum mlx5_interface_state { 589 MLX5_INTERFACE_STATE_DOWN = BIT(0), 590 MLX5_INTERFACE_STATE_UP = BIT(1), 591 MLX5_INTERFACE_STATE_SHUTDOWN = BIT(2), 592}; 593 594enum mlx5_pci_status { 595 MLX5_PCI_STATUS_DISABLED, 596 MLX5_PCI_STATUS_ENABLED, 597}; 598 |
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| 586struct mlx5_special_contexts { 587 int resd_lkey; 588}; 589 590struct mlx5_flow_root_namespace; 591struct mlx5_core_dev { 592 struct pci_dev *pdev; | 599struct mlx5_special_contexts { 600 int resd_lkey; 601}; 602 603struct mlx5_flow_root_namespace; 604struct mlx5_core_dev { 605 struct pci_dev *pdev; |
| 606 /* sync pci state */ 607 struct mutex pci_status_mutex; 608 enum mlx5_pci_status pci_status; |
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| 593 char board_id[MLX5_BOARD_ID_LEN]; 594 struct mlx5_cmd cmd; 595 struct mlx5_port_caps port_caps[MLX5_MAX_PORTS]; 596 u32 hca_caps_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)]; 597 u32 hca_caps_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)]; 598 phys_addr_t iseg_base; 599 struct mlx5_init_seg __iomem *iseg; 600 enum mlx5_device_state state; | 609 char board_id[MLX5_BOARD_ID_LEN]; 610 struct mlx5_cmd cmd; 611 struct mlx5_port_caps port_caps[MLX5_MAX_PORTS]; 612 u32 hca_caps_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)]; 613 u32 hca_caps_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)]; 614 phys_addr_t iseg_base; 615 struct mlx5_init_seg __iomem *iseg; 616 enum mlx5_device_state state; |
| 617 /* sync interface state */ 618 struct mutex intf_state_mutex; 619 unsigned long intf_state; |
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| 601 void (*event) (struct mlx5_core_dev *dev, 602 enum mlx5_dev_event event, 603 unsigned long param); 604 struct mlx5_priv priv; 605 struct mlx5_profile *profile; 606 atomic_t num_qps; 607 u32 issi; 608 struct mlx5_special_contexts special_contexts; --- 215 unchanged lines hidden (view full) --- 824 return rtn; 825} 826 827static inline u32 mlx5_base_mkey(const u32 key) 828{ 829 return key & 0xffffff00u; 830} 831 | 620 void (*event) (struct mlx5_core_dev *dev, 621 enum mlx5_dev_event event, 622 unsigned long param); 623 struct mlx5_priv priv; 624 struct mlx5_profile *profile; 625 atomic_t num_qps; 626 u32 issi; 627 struct mlx5_special_contexts special_contexts; --- 215 unchanged lines hidden (view full) --- 843 return rtn; 844} 845 846static inline u32 mlx5_base_mkey(const u32 key) 847{ 848 return key & 0xffffff00u; 849} 850 |
| 832void mlx5_enter_error_state(struct mlx5_core_dev *dev); | |
| 833int mlx5_cmd_init(struct mlx5_core_dev *dev); 834void mlx5_cmd_cleanup(struct mlx5_core_dev *dev); 835void mlx5_cmd_use_events(struct mlx5_core_dev *dev); 836void mlx5_cmd_use_polling(struct mlx5_core_dev *dev); 837int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr); 838int mlx5_cmd_status_to_err_v2(void *ptr); 839int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type, 840 enum mlx5_cap_mode cap_mode); 841int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out, 842 int out_size); 843int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size, 844 void *out, int out_size, mlx5_cmd_cbk_t callback, 845 void *context); 846int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn); 847int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn); 848int mlx5_alloc_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari); 849int mlx5_free_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari); 850int mlx5_alloc_map_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar); 851void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar); | 851int mlx5_cmd_init(struct mlx5_core_dev *dev); 852void mlx5_cmd_cleanup(struct mlx5_core_dev *dev); 853void mlx5_cmd_use_events(struct mlx5_core_dev *dev); 854void mlx5_cmd_use_polling(struct mlx5_core_dev *dev); 855int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr); 856int mlx5_cmd_status_to_err_v2(void *ptr); 857int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type, 858 enum mlx5_cap_mode cap_mode); 859int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out, 860 int out_size); 861int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size, 862 void *out, int out_size, mlx5_cmd_cbk_t callback, 863 void *context); 864int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn); 865int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn); 866int mlx5_alloc_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari); 867int mlx5_free_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari); 868int mlx5_alloc_map_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar); 869void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar); |
| 852void mlx5_health_cleanup(void); 853void __init mlx5_health_init(void); | 870void mlx5_health_cleanup(struct mlx5_core_dev *dev); 871int mlx5_health_init(struct mlx5_core_dev *dev); |
| 854void mlx5_start_health_poll(struct mlx5_core_dev *dev); 855void mlx5_stop_health_poll(struct mlx5_core_dev *dev); 856 857#define mlx5_buf_alloc_node(dev, size, direct, buf, node) \ 858 mlx5_buf_alloc(dev, size, direct, buf) 859int mlx5_buf_alloc(struct mlx5_core_dev *dev, int size, int max_direct, 860 struct mlx5_buf *buf); 861void mlx5_buf_free(struct mlx5_core_dev *dev, struct mlx5_buf *buf); --- 41 unchanged lines hidden (view full) --- 903int mlx5_eq_init(struct mlx5_core_dev *dev); 904void mlx5_eq_cleanup(struct mlx5_core_dev *dev); 905void mlx5_fill_page_array(struct mlx5_buf *buf, __be64 *pas); 906void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn); 907void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type); 908void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type); 909struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn); 910void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u32 vector); | 872void mlx5_start_health_poll(struct mlx5_core_dev *dev); 873void mlx5_stop_health_poll(struct mlx5_core_dev *dev); 874 875#define mlx5_buf_alloc_node(dev, size, direct, buf, node) \ 876 mlx5_buf_alloc(dev, size, direct, buf) 877int mlx5_buf_alloc(struct mlx5_core_dev *dev, int size, int max_direct, 878 struct mlx5_buf *buf); 879void mlx5_buf_free(struct mlx5_core_dev *dev, struct mlx5_buf *buf); --- 41 unchanged lines hidden (view full) --- 921int mlx5_eq_init(struct mlx5_core_dev *dev); 922void mlx5_eq_cleanup(struct mlx5_core_dev *dev); 923void mlx5_fill_page_array(struct mlx5_buf *buf, __be64 *pas); 924void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn); 925void mlx5_rsc_event(struct mlx5_core_dev *dev, u32 rsn, int event_type); 926void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type); 927struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn); 928void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u32 vector); |
| 911void mlx5_trigger_cmd_completions(struct mlx5_core_dev *dev); | |
| 912void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type); 913int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, 914 int nent, u64 mask, const char *name, struct mlx5_uar *uar); 915int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq); 916int mlx5_start_eqs(struct mlx5_core_dev *dev); 917int mlx5_stop_eqs(struct mlx5_core_dev *dev); 918int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn); 919int mlx5_core_attach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn); --- 103 unchanged lines hidden (view full) --- 1023 int limit; 1024 } mr_cache[MAX_MR_CACHE_ENTRIES]; 1025}; 1026 1027enum { 1028 MLX5_PCI_DEV_IS_VF = 1 << 0, 1029}; 1030 | 929void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type); 930int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, 931 int nent, u64 mask, const char *name, struct mlx5_uar *uar); 932int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq); 933int mlx5_start_eqs(struct mlx5_core_dev *dev); 934int mlx5_stop_eqs(struct mlx5_core_dev *dev); 935int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn); 936int mlx5_core_attach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid, u32 qpn); --- 103 unchanged lines hidden (view full) --- 1040 int limit; 1041 } mr_cache[MAX_MR_CACHE_ENTRIES]; 1042}; 1043 1044enum { 1045 MLX5_PCI_DEV_IS_VF = 1 << 0, 1046}; 1047 |
| 1048enum { 1049 MLX5_TRIGGERED_CMD_COMP = (u64)1 << 32, 1050}; 1051 |
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| 1031static inline int mlx5_core_is_pf(struct mlx5_core_dev *dev) 1032{ 1033 return !(dev->priv.pci_dev_data & MLX5_PCI_DEV_IS_VF); 1034} 1035 1036#endif /* MLX5_DRIVER_H */ | 1052static inline int mlx5_core_is_pf(struct mlx5_core_dev *dev) 1053{ 1054 return !(dev->priv.pci_dev_data & MLX5_PCI_DEV_IS_VF); 1055} 1056 1057#endif /* MLX5_DRIVER_H */ |