3c3
< Copyright (c) 2001-2015, Intel Corporation
---
> Copyright (c) 2001-2017, Intel Corporation
5,6c5,6
<
< Redistribution and use in source and binary forms, with or without
---
>
> Redistribution and use in source and binary forms, with or without
8,9c8,9
<
< 1. Redistributions of source code must retain the above copyright notice,
---
>
> 1. Redistributions of source code must retain the above copyright notice,
11,13c11,13
<
< 2. Redistributions in binary form must reproduce the above copyright
< notice, this list of conditions and the following disclaimer in the
---
>
> 2. Redistributions in binary form must reproduce the above copyright
> notice, this list of conditions and the following disclaimer in the
15,17c15,17
<
< 3. Neither the name of the Intel Corporation nor the names of its
< contributors may be used to endorse or promote products derived from
---
>
> 3. Neither the name of the Intel Corporation nor the names of its
> contributors may be used to endorse or promote products derived from
19c19
<
---
>
21,28c21,28
< AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
< IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
< ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
< LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
< CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
< SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
< INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
< CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
---
> AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33c33
< /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_x540.c 295093 2016-01-31 15:14:23Z smh $*/
---
> /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_x540.c 320897 2017-07-11 21:25:07Z erj $*/
102a103
> mac->ops.init_swfw_sync = ixgbe_init_swfw_sync_X540;
124a126,129
> mac->ops.bypass_rw = ixgbe_bypass_rw_generic;
> mac->ops.bypass_valid_rd = ixgbe_bypass_valid_rd_generic;
> mac->ops.bypass_set = ixgbe_bypass_set_generic;
> mac->ops.bypass_rd_eep = ixgbe_bypass_rd_eep_generic;
210a216
> u32 swfw_mask = hw->phy.phy_semaphore_mask;
222a229,234
> status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
> if (status != IXGBE_SUCCESS) {
> ERROR_REPORT2(IXGBE_ERROR_CAUTION,
> "semaphore failed with %d", status);
> return IXGBE_ERR_SWFW_SYNC;
> }
226a239
> hw->mac.ops.release_swfw_sync(hw, swfw_mask);
272,274d284
< hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
< hw->mac.san_addr, 0, IXGBE_RAH_AV);
<
277a288,294
> hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,
> hw->mac.san_addr, 0, IXGBE_RAH_AV);
>
> /* clear VMDq pool/queue selection for this RAR */
> hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,
> IXGBE_CLEAR_VMDQ_ALL);
>
320c337
< u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
---
> u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
322c339
< u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
---
> u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
490d506
< u16 checksum_last_word = IXGBE_EEPROM_CHECKSUM;
500,501c516,519
< /* Include 0x0-0x3F in the checksum */
< for (i = 0; i <= checksum_last_word; i++) {
---
> /* Include 0x0 up to IXGBE_EEPROM_CHECKSUM; do not include the
> * checksum itself
> */
> for (i = 0; i < IXGBE_EEPROM_CHECKSUM; i++) {
506,507c524
< if (i != IXGBE_EEPROM_CHECKSUM)
< checksum += word;
---
> checksum += word;
774c791,792
< if (ixgbe_get_swfw_sync_semaphore(hw))
---
> if (ixgbe_get_swfw_sync_semaphore(hw)) {
> DEBUGOUT("Failed to get NVM access and register semaphore, returning IXGBE_ERR_SWFW_SYNC\n");
775a794
> }
783d801
< msec_delay(5);
794,800d811
< /* Failed to get SW only semaphore */
< if (swmask == IXGBE_GSSR_SW_MNG_SM) {
< ERROR_REPORT1(IXGBE_ERROR_POLLING,
< "Failed to get SW only semaphore");
< return IXGBE_ERR_SWFW_SYNC;
< }
<
806c817,818
< if (ixgbe_get_swfw_sync_semaphore(hw))
---
> if (ixgbe_get_swfw_sync_semaphore(hw)) {
> DEBUGOUT("Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
807a820
> }
823c836,837
< IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM;
---
> IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM |
> IXGBE_GSSR_SW_MNG_SM;
828a843
> DEBUGOUT("Resource not released by other SW, returning IXGBE_ERR_SWFW_SYNC\n");
831a847
> DEBUGOUT("Returning error IXGBE_ERR_SWFW_SYNC\n");
860c876
< msec_delay(5);
---
> msec_delay(2);
946a963,992
> * ixgbe_init_swfw_sync_X540 - Release hardware semaphore
> * @hw: pointer to hardware structure
> *
> * This function reset hardware semaphore bits for a semaphore that may
> * have be left locked due to a catastrophic failure.
> **/
> void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw)
> {
> u32 rmask;
>
> /* First try to grab the semaphore but we don't need to bother
> * looking to see whether we got the lock or not since we do
> * the same thing regardless of whether we got the lock or not.
> * We got the lock - we release it.
> * We timeout trying to get the lock - we force its release.
> */
> ixgbe_get_swfw_sync_semaphore(hw);
> ixgbe_release_swfw_sync_semaphore(hw);
>
> /* Acquire and release all software resources. */
> rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM |
> IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM |
> IXGBE_GSSR_SW_MNG_SM;
>
> rmask |= IXGBE_GSSR_I2C_MASK;
> ixgbe_acquire_swfw_sync_X540(hw, rmask);
> ixgbe_release_swfw_sync_X540(hw, rmask);
> }
>
> /**
962a1009,1011
> if (index > 3)
> return IXGBE_ERR_PARAM;
>
996a1046,1048
> if (index > 3)
> return IXGBE_ERR_PARAM;
>
< Copyright (c) 2001-2015, Intel Corporation
---
> Copyright (c) 2001-2017, Intel Corporation
5,6c5,6
<
< Redistribution and use in source and binary forms, with or without
---
>
> Redistribution and use in source and binary forms, with or without
8,9c8,9
<
< 1. Redistributions of source code must retain the above copyright notice,
---
>
> 1. Redistributions of source code must retain the above copyright notice,
11,13c11,13
<
< 2. Redistributions in binary form must reproduce the above copyright
< notice, this list of conditions and the following disclaimer in the
---
>
> 2. Redistributions in binary form must reproduce the above copyright
> notice, this list of conditions and the following disclaimer in the
15,17c15,17
<
< 3. Neither the name of the Intel Corporation nor the names of its
< contributors may be used to endorse or promote products derived from
---
>
> 3. Neither the name of the Intel Corporation nor the names of its
> contributors may be used to endorse or promote products derived from
19c19
<
---
>
21,28c21,28
< AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
< IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
< ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
< LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
< CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
< SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
< INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
< CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
---
> AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33c33
< /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_x540.c 295093 2016-01-31 15:14:23Z smh $*/
---
> /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_x540.c 320897 2017-07-11 21:25:07Z erj $*/
102a103
> mac->ops.init_swfw_sync = ixgbe_init_swfw_sync_X540;
124a126,129
> mac->ops.bypass_rw = ixgbe_bypass_rw_generic;
> mac->ops.bypass_valid_rd = ixgbe_bypass_valid_rd_generic;
> mac->ops.bypass_set = ixgbe_bypass_set_generic;
> mac->ops.bypass_rd_eep = ixgbe_bypass_rd_eep_generic;
210a216
> u32 swfw_mask = hw->phy.phy_semaphore_mask;
222a229,234
> status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
> if (status != IXGBE_SUCCESS) {
> ERROR_REPORT2(IXGBE_ERROR_CAUTION,
> "semaphore failed with %d", status);
> return IXGBE_ERR_SWFW_SYNC;
> }
226a239
> hw->mac.ops.release_swfw_sync(hw, swfw_mask);
272,274d284
< hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
< hw->mac.san_addr, 0, IXGBE_RAH_AV);
<
277a288,294
> hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,
> hw->mac.san_addr, 0, IXGBE_RAH_AV);
>
> /* clear VMDq pool/queue selection for this RAR */
> hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,
> IXGBE_CLEAR_VMDQ_ALL);
>
320c337
< u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
---
> u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
322c339
< u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
---
> u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
490d506
< u16 checksum_last_word = IXGBE_EEPROM_CHECKSUM;
500,501c516,519
< /* Include 0x0-0x3F in the checksum */
< for (i = 0; i <= checksum_last_word; i++) {
---
> /* Include 0x0 up to IXGBE_EEPROM_CHECKSUM; do not include the
> * checksum itself
> */
> for (i = 0; i < IXGBE_EEPROM_CHECKSUM; i++) {
506,507c524
< if (i != IXGBE_EEPROM_CHECKSUM)
< checksum += word;
---
> checksum += word;
774c791,792
< if (ixgbe_get_swfw_sync_semaphore(hw))
---
> if (ixgbe_get_swfw_sync_semaphore(hw)) {
> DEBUGOUT("Failed to get NVM access and register semaphore, returning IXGBE_ERR_SWFW_SYNC\n");
775a794
> }
783d801
< msec_delay(5);
794,800d811
< /* Failed to get SW only semaphore */
< if (swmask == IXGBE_GSSR_SW_MNG_SM) {
< ERROR_REPORT1(IXGBE_ERROR_POLLING,
< "Failed to get SW only semaphore");
< return IXGBE_ERR_SWFW_SYNC;
< }
<
806c817,818
< if (ixgbe_get_swfw_sync_semaphore(hw))
---
> if (ixgbe_get_swfw_sync_semaphore(hw)) {
> DEBUGOUT("Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
807a820
> }
823c836,837
< IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM;
---
> IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM |
> IXGBE_GSSR_SW_MNG_SM;
828a843
> DEBUGOUT("Resource not released by other SW, returning IXGBE_ERR_SWFW_SYNC\n");
831a847
> DEBUGOUT("Returning error IXGBE_ERR_SWFW_SYNC\n");
860c876
< msec_delay(5);
---
> msec_delay(2);
946a963,992
> * ixgbe_init_swfw_sync_X540 - Release hardware semaphore
> * @hw: pointer to hardware structure
> *
> * This function reset hardware semaphore bits for a semaphore that may
> * have be left locked due to a catastrophic failure.
> **/
> void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw)
> {
> u32 rmask;
>
> /* First try to grab the semaphore but we don't need to bother
> * looking to see whether we got the lock or not since we do
> * the same thing regardless of whether we got the lock or not.
> * We got the lock - we release it.
> * We timeout trying to get the lock - we force its release.
> */
> ixgbe_get_swfw_sync_semaphore(hw);
> ixgbe_release_swfw_sync_semaphore(hw);
>
> /* Acquire and release all software resources. */
> rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM |
> IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM |
> IXGBE_GSSR_SW_MNG_SM;
>
> rmask |= IXGBE_GSSR_I2C_MASK;
> ixgbe_acquire_swfw_sync_X540(hw, rmask);
> ixgbe_release_swfw_sync_X540(hw, rmask);
> }
>
> /**
962a1009,1011
> if (index > 3)
> return IXGBE_ERR_PARAM;
>
996a1046,1048
> if (index > 3)
> return IXGBE_ERR_PARAM;
>