| ixgbe_phy.h (302408) | ixgbe_phy.h (320897) |
|---|---|
| 1/****************************************************************************** 2 | 1/****************************************************************************** 2 |
| 3 Copyright (c) 2001-2015, Intel Corporation | 3 Copyright (c) 2001-2017, Intel Corporation |
| 4 All rights reserved. | 4 All rights reserved. |
| 5 6 Redistribution and use in source and binary forms, with or without | 5 6 Redistribution and use in source and binary forms, with or without |
| 7 modification, are permitted provided that the following conditions are met: | 7 modification, are permitted provided that the following conditions are met: |
| 8 9 1. Redistributions of source code must retain the above copyright notice, | 8 9 1. Redistributions of source code must retain the above copyright notice, |
| 10 this list of conditions and the following disclaimer. | 10 this list of conditions and the following disclaimer. |
| 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the | 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the |
| 14 documentation and/or other materials provided with the distribution. | 14 documentation and/or other materials provided with the distribution. |
| 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from | 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from |
| 18 this software without specific prior written permission. | 18 this software without specific prior written permission. |
| 19 | 19 |
| 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ | 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ |
| 33/*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_phy.h 292674 2015-12-23 22:45:17Z sbruno $*/ | 33/*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_phy.h 320897 2017-07-11 21:25:07Z erj $*/ |
| 34 35#ifndef _IXGBE_PHY_H_ 36#define _IXGBE_PHY_H_ 37 38#include "ixgbe_type.h" 39#define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0 40#define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2 41#define IXGBE_I2C_EEPROM_BANK_LEN 0xFF --- 43 unchanged lines hidden (view full) --- 85#define IXGBE_I2C_EEPROM_STATUS_MASK 0x3 86#define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0 87#define IXGBE_I2C_EEPROM_STATUS_PASS 0x1 88#define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2 89#define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 90 91#define IXGBE_CS4227 0xBE /* CS4227 address */ 92#define IXGBE_CS4227_GLOBAL_ID_LSB 0 | 34 35#ifndef _IXGBE_PHY_H_ 36#define _IXGBE_PHY_H_ 37 38#include "ixgbe_type.h" 39#define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0 40#define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2 41#define IXGBE_I2C_EEPROM_BANK_LEN 0xFF --- 43 unchanged lines hidden (view full) --- 85#define IXGBE_I2C_EEPROM_STATUS_MASK 0x3 86#define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0 87#define IXGBE_I2C_EEPROM_STATUS_PASS 0x1 88#define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2 89#define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 90 91#define IXGBE_CS4227 0xBE /* CS4227 address */ 92#define IXGBE_CS4227_GLOBAL_ID_LSB 0 |
| 93#define IXGBE_CS4227_GLOBAL_ID_MSB 1 |
|
| 93#define IXGBE_CS4227_SCRATCH 2 94#define IXGBE_CS4227_GLOBAL_ID_VALUE 0x03E5 | 94#define IXGBE_CS4227_SCRATCH 2 95#define IXGBE_CS4227_GLOBAL_ID_VALUE 0x03E5 |
| 96#define IXGBE_CS4227_EFUSE_PDF_SKU 0x19F 97#define IXGBE_CS4223_SKU_ID 0x0010 /* Quad port */ 98#define IXGBE_CS4227_SKU_ID 0x0014 /* Dual port */ |
|
| 95#define IXGBE_CS4227_RESET_PENDING 0x1357 96#define IXGBE_CS4227_RESET_COMPLETE 0x5AA5 97#define IXGBE_CS4227_RETRIES 15 98#define IXGBE_CS4227_EFUSE_STATUS 0x0181 99#define IXGBE_CS4227_LINE_SPARE22_MSB 0x12AD /* Reg to program speed */ 100#define IXGBE_CS4227_LINE_SPARE24_LSB 0x12B0 /* Reg to program EDC */ 101#define IXGBE_CS4227_HOST_SPARE22_MSB 0x1AAD /* Reg to program speed */ 102#define IXGBE_CS4227_HOST_SPARE24_LSB 0x1AB0 /* Reg to program EDC */ --- 81 unchanged lines hidden (view full) --- 184 u16 *firmware_version); 185s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, 186 u16 *firmware_version); 187 188s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw); 189s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on); 190s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw); 191s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); | 99#define IXGBE_CS4227_RESET_PENDING 0x1357 100#define IXGBE_CS4227_RESET_COMPLETE 0x5AA5 101#define IXGBE_CS4227_RETRIES 15 102#define IXGBE_CS4227_EFUSE_STATUS 0x0181 103#define IXGBE_CS4227_LINE_SPARE22_MSB 0x12AD /* Reg to program speed */ 104#define IXGBE_CS4227_LINE_SPARE24_LSB 0x12B0 /* Reg to program EDC */ 105#define IXGBE_CS4227_HOST_SPARE22_MSB 0x1AAD /* Reg to program speed */ 106#define IXGBE_CS4227_HOST_SPARE24_LSB 0x1AB0 /* Reg to program EDC */ --- 81 unchanged lines hidden (view full) --- 188 u16 *firmware_version); 189s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, 190 u16 *firmware_version); 191 192s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw); 193s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on); 194s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw); 195s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); |
| 192s32 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw); | 196u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw); |
| 193s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw); 194s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, 195 u16 *list_offset, 196 u16 *data_offset); 197s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw); 198s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 199 u8 dev_addr, u8 *data); 200s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 201 u8 dev_addr, u8 *data); 202s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 203 u8 dev_addr, u8 data); 204s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 205 u8 dev_addr, u8 data); 206s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 207 u8 *eeprom_data); 208s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 209 u8 eeprom_data); 210void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw); | 197s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw); 198s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, 199 u16 *list_offset, 200 u16 *data_offset); 201s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw); 202s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 203 u8 dev_addr, u8 *data); 204s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 205 u8 dev_addr, u8 *data); 206s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 207 u8 dev_addr, u8 data); 208s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 209 u8 dev_addr, u8 data); 210s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 211 u8 *eeprom_data); 212s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 213 u8 eeprom_data); 214void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw); |
| 215s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, 216 u16 *val, bool lock); 217s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, 218 u16 val, bool lock); |
|
| 211#endif /* _IXGBE_PHY_H_ */ | 219#endif /* _IXGBE_PHY_H_ */ |