| 1/****************************************************************************** 2 |
| 3 Copyright (c) 2001-2017, Intel Corporation |
| 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 --- 13 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ |
| 33/*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_osdep.h 320897 2017-07-11 21:25:07Z erj $*/ |
| 34 |
| 35#ifndef _IXGBE_OSDEP_H_ 36#define _IXGBE_OSDEP_H_ |
| 37 38#include <sys/types.h> 39#include <sys/param.h> 40#include <sys/endian.h> 41#include <sys/systm.h> 42#include <sys/mbuf.h> 43#include <sys/protosw.h> 44#include <sys/socket.h> --- 5 unchanged lines hidden (view full) --- 50#include <machine/resource.h> 51#include <vm/vm.h> 52#include <vm/pmap.h> 53#include <machine/clock.h> 54#include <dev/pci/pcivar.h> 55#include <dev/pci/pcireg.h> 56 57#define ASSERT(x) if(!(x)) panic("IXGBE: x") |
| 58#define EWARN(H, W) printf(W) |
| 59 60enum { 61 IXGBE_ERROR_SOFTWARE, 62 IXGBE_ERROR_POLLING, 63 IXGBE_ERROR_INVALID_STATE, 64 IXGBE_ERROR_UNSUPPORTED, 65 IXGBE_ERROR_ARGUMENT, 66 IXGBE_ERROR_CAUTION, --- 63 unchanged lines hidden (view full) --- 130#define UNREFERENCED_2PARAMETER(_p, _q) 131#define UNREFERENCED_3PARAMETER(_p, _q, _r) 132#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 133 134#define IXGBE_NTOHL(_i) ntohl(_i) 135#define IXGBE_NTOHS(_i) ntohs(_i) 136 137/* XXX these need to be revisited */ |
| 138#define IXGBE_CPU_TO_LE16 htole16 |
| 139#define IXGBE_CPU_TO_LE32 htole32 |
| 140#define IXGBE_LE32_TO_CPU le32toh |
| 141#define IXGBE_LE32_TO_CPUS(x) 142#define IXGBE_CPU_TO_BE16 htobe16 143#define IXGBE_CPU_TO_BE32 htobe32 |
| 144#define IXGBE_BE32_TO_CPU be32toh |
| 145 146typedef uint8_t u8; 147typedef int8_t s8; 148typedef uint16_t u16; 149typedef int16_t s16; 150typedef uint32_t u32; 151typedef int32_t s32; 152typedef uint64_t u64; --- 4 unchanged lines hidden (view full) --- 157/* shared code requires this */ 158#define __le16 u16 159#define __le32 u32 160#define __le64 u64 161#define __be16 u16 162#define __be32 u32 163#define __be64 u64 164 |
| 165#define le16_to_cpu |
| 166 167#if __FreeBSD_version < 800000 168#if defined(__i386__) || defined(__amd64__) 169#define mb() __asm volatile("mfence" ::: "memory") 170#define wmb() __asm volatile("sfence" ::: "memory") 171#define rmb() __asm volatile("lfence" ::: "memory") 172#else 173#define mb() --- 33 unchanged lines hidden (view full) --- 207 208struct ixgbe_osdep 209{ 210 bus_space_tag_t mem_bus_space_tag; 211 bus_space_handle_t mem_bus_space_handle; 212}; 213 214/* These routines need struct ixgbe_hw declared */ |
| 215struct ixgbe_hw; |
| 216 217/* These routines are needed by the shared code */ 218extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 219#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 220 221extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 222#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 223 --- 8 unchanged lines hidden (view full) --- 232extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32); 233#define IXGBE_READ_REG_ARRAY(a, reg, offset) \ 234 ixgbe_read_reg_array(a, reg, offset) 235 236extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32); 237#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \ 238 ixgbe_write_reg_array(a, reg, offset, val) 239 |
| 240#endif /* _IXGBE_OSDEP_H_ */ |