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ixgbe_api.c (179055) ixgbe_api.c (181003)
1/******************************************************************************
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
1/******************************************************************************
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_api.c 179055 2008-05-16 18:46:30Z jfv $*/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_api.c 181003 2008-07-30 18:15:18Z jfv $*/
34
35#include "ixgbe_api.h"
36#include "ixgbe_common.h"
37
38extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
39
40/**
41 * ixgbe_init_shared_code - Initialize the shared code

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86 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
87 switch (hw->device_id) {
88 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
89 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
90 case IXGBE_DEV_ID_82598AT:
91 case IXGBE_DEV_ID_82598AT_DUAL_PORT:
92 case IXGBE_DEV_ID_82598EB_CX4:
93 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
34
35#include "ixgbe_api.h"
36#include "ixgbe_common.h"
37
38extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
39
40/**
41 * ixgbe_init_shared_code - Initialize the shared code

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86 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
87 switch (hw->device_id) {
88 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
89 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
90 case IXGBE_DEV_ID_82598AT:
91 case IXGBE_DEV_ID_82598AT_DUAL_PORT:
92 case IXGBE_DEV_ID_82598EB_CX4:
93 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
94 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
95 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
96 case IXGBE_DEV_ID_82598EB_XF_LR:
97 hw->mac.type = ixgbe_mac_82598EB;
98 break;
99 default:
100 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
101 break;
102 }
103 } else {

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569s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
570 u32 enable_addr)
571{
572 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
573 enable_addr), IXGBE_NOT_IMPLEMENTED);
574}
575
576/**
94 case IXGBE_DEV_ID_82598EB_XF_LR:
95 hw->mac.type = ixgbe_mac_82598EB;
96 break;
97 default:
98 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
99 break;
100 }
101 } else {

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567s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
568 u32 enable_addr)
569{
570 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
571 enable_addr), IXGBE_NOT_IMPLEMENTED);
572}
573
574/**
575 * ixgbe_clear_rar - Clear Rx address register
576 * @hw: pointer to hardware structure
577 * @index: Receive address register to write
578 *
579 * Puts an ethernet address into a receive address register.
580 **/
581s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
582{
583 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
584 IXGBE_NOT_IMPLEMENTED);
585}
586
587/**
577 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
578 * @hw: pointer to hardware structure
579 * @rar: receive address register index to associate with VMDq index
580 * @vmdq: VMDq set or pool index
581 **/
582s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
583{
584 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
585 IXGBE_NOT_IMPLEMENTED);
586}
587
588/**
588 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
589 * @hw: pointer to hardware structure
590 * @rar: receive address register index to associate with VMDq index
591 * @vmdq: VMDq set or pool index
592 **/
593s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
594{
595 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
596 IXGBE_NOT_IMPLEMENTED);
597}
598
599/**
600 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
601 * @hw: pointer to hardware structure
602 * @rar: receive address register index to disassociate with VMDq index
603 * @vmdq: VMDq set or pool index
604 **/
605s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
606{
607 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
608 IXGBE_NOT_IMPLEMENTED);
609}
610
611/**
589 * ixgbe_init_rx_addrs - Initializes receive address filters.
590 * @hw: pointer to hardware structure
591 *
592 * Places the MAC address in receive address register 0 and clears the rest
593 * of the receive address registers. Clears the multicast table. Assumes
594 * the receiver is in reset when the routine is called.
595 **/
596s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)

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734 * Performs write operation to Atlas analog register specified.
735 **/
736s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
737{
738 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
739 val), IXGBE_NOT_IMPLEMENTED);
740}
741
612 * ixgbe_init_rx_addrs - Initializes receive address filters.
613 * @hw: pointer to hardware structure
614 *
615 * Places the MAC address in receive address register 0 and clears the rest
616 * of the receive address registers. Clears the multicast table. Assumes
617 * the receiver is in reset when the routine is called.
618 **/
619s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)

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757 * Performs write operation to Atlas analog register specified.
758 **/
759s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
760{
761 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
762 val), IXGBE_NOT_IMPLEMENTED);
763}
764
765/**
766 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
767 * @hw: pointer to hardware structure
768 *
769 * Initializes the Unicast Table Arrays to zero on device load. This
770 * is part of the Rx init addr execution path.
771 **/
772s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
773{
774 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
775 IXGBE_NOT_IMPLEMENTED);
776}