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33/*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_api.c 320897 2017-07-11 21:25:07Z erj $*/ |
34 35#include "ixgbe_api.h" 36#include "ixgbe_common.h" 37 38#define IXGBE_EMPTY_PARAM 39 40static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = { 41 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM) --- 6 unchanged lines hidden (view full) --- 48static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = { 49 IXGBE_MVALS_INIT(_X550) 50}; 51 52static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = { 53 IXGBE_MVALS_INIT(_X550EM_x) 54}; 55 |
56static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = { 57 IXGBE_MVALS_INIT(_X550EM_a) 58}; 59 |
60/** 61 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg 62 * @hw: pointer to hardware structure 63 * @map: pointer to u8 arr for returning map 64 * 65 * Read the rtrup2tc HW register and resolve its content into map 66 **/ 67void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map) --- 34 unchanged lines hidden (view full) --- 102 break; 103 case ixgbe_mac_X540: 104 status = ixgbe_init_ops_X540(hw); 105 break; 106 case ixgbe_mac_X550: 107 status = ixgbe_init_ops_X550(hw); 108 break; 109 case ixgbe_mac_X550EM_x: |
110 status = ixgbe_init_ops_X550EM_x(hw); |
111 break; |
112 case ixgbe_mac_X550EM_a: 113 status = ixgbe_init_ops_X550EM_a(hw); |
114 break; 115 default: 116 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 117 break; 118 } 119 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME; 120 121 return status; --- 48 unchanged lines hidden (view full) --- 170 case IXGBE_DEV_ID_82599_SFP_SF_QP: 171 case IXGBE_DEV_ID_82599_QSFP_SF_QP: 172 case IXGBE_DEV_ID_82599EN_SFP: 173 case IXGBE_DEV_ID_82599_CX4: 174 case IXGBE_DEV_ID_82599_BYPASS: 175 case IXGBE_DEV_ID_82599_T3_LOM: 176 hw->mac.type = ixgbe_mac_82599EB; 177 break; |
178 case IXGBE_DEV_ID_X540T: 179 case IXGBE_DEV_ID_X540T1: 180 case IXGBE_DEV_ID_X540_BYPASS: 181 hw->mac.type = ixgbe_mac_X540; 182 hw->mvals = ixgbe_mvals_X540; 183 break; 184 case IXGBE_DEV_ID_X550T: 185 case IXGBE_DEV_ID_X550T1: 186 hw->mac.type = ixgbe_mac_X550; 187 hw->mvals = ixgbe_mvals_X550; 188 break; 189 case IXGBE_DEV_ID_X550EM_X_KX4: 190 case IXGBE_DEV_ID_X550EM_X_KR: 191 case IXGBE_DEV_ID_X550EM_X_10G_T: 192 case IXGBE_DEV_ID_X550EM_X_1G_T: 193 case IXGBE_DEV_ID_X550EM_X_SFP: |
194 case IXGBE_DEV_ID_X550EM_X_XFI: |
195 hw->mac.type = ixgbe_mac_X550EM_x; 196 hw->mvals = ixgbe_mvals_X550EM_x; 197 break; |
198 case IXGBE_DEV_ID_X550EM_A_KR: 199 case IXGBE_DEV_ID_X550EM_A_KR_L: 200 case IXGBE_DEV_ID_X550EM_A_SFP_N: 201 case IXGBE_DEV_ID_X550EM_A_SGMII: 202 case IXGBE_DEV_ID_X550EM_A_SGMII_L: 203 case IXGBE_DEV_ID_X550EM_A_1G_T: 204 case IXGBE_DEV_ID_X550EM_A_1G_T_L: 205 case IXGBE_DEV_ID_X550EM_A_10G_T: 206 case IXGBE_DEV_ID_X550EM_A_QSFP: 207 case IXGBE_DEV_ID_X550EM_A_QSFP_N: 208 case IXGBE_DEV_ID_X550EM_A_SFP: 209 hw->mac.type = ixgbe_mac_X550EM_a; 210 hw->mvals = ixgbe_mvals_X550EM_a; |
211 break; |
212 default: 213 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 214 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED, 215 "Unsupported device id: %x", 216 hw->device_id); 217 break; 218 } 219 --- 829 unchanged lines hidden (view full) --- 1049 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 1050 IXGBE_NOT_IMPLEMENTED); 1051} 1052 1053/** 1054 * ixgbe_set_vfta - Set VLAN filter table 1055 * @hw: pointer to hardware structure 1056 * @vlan: VLAN id to write to VLAN filter |
1057 * @vind: VMDq output index that maps queue to VLAN id in VLVFB 1058 * @vlan_on: boolean flag to turn on/off VLAN 1059 * @vlvf_bypass: boolean flag indicating updating the default pool is okay |
1060 * 1061 * Turn on/off specified VLAN in the VLAN filter table. 1062 **/ |
1063s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, 1064 bool vlvf_bypass) |
1065{ 1066 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, |
1067 vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED); |
1068} 1069 1070/** 1071 * ixgbe_set_vlvf - Set VLAN Pool Filter 1072 * @hw: pointer to hardware structure 1073 * @vlan: VLAN id to write to VLAN filter |
1074 * @vind: VMDq output index that maps queue to VLAN id in VLVFB 1075 * @vlan_on: boolean flag to turn on/off VLAN in VLVF 1076 * @vfta_delta: pointer to the difference between the current value of VFTA 1077 * and the desired value 1078 * @vfta: the desired value of the VFTA 1079 * @vlvf_bypass: boolean flag indicating updating the default pool is okay |
1080 * 1081 * Turn on/off specified bit in VLVF table. 1082 **/ 1083s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, |
1084 u32 *vfta_delta, u32 vfta, bool vlvf_bypass) |
1085{ 1086 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind, |
1087 vlan_on, vfta_delta, vfta, vlvf_bypass), 1088 IXGBE_NOT_IMPLEMENTED); |
1089} 1090 1091/** 1092 * ixgbe_fc_enable - Enable flow control 1093 * @hw: pointer to hardware structure 1094 * 1095 * Configures the flow control settings based on SW configuration. 1096 **/ --- 17 unchanged lines hidden (view full) --- 1114 1115/** 1116 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW 1117 * @hw: pointer to hardware structure 1118 * @maj: driver major number to be sent to firmware 1119 * @min: driver minor number to be sent to firmware 1120 * @build: driver build number to be sent to firmware 1121 * @ver: driver version number to be sent to firmware |
1122 * @len: length of driver_ver string 1123 * @driver_ver: driver string |
1124 **/ 1125s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, |
1126 u8 ver, u16 len, char *driver_ver) |
1127{ 1128 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min, |
1129 build, ver, len, driver_ver), 1130 IXGBE_NOT_IMPLEMENTED); |
1131} 1132 1133 1134 1135/** 1136 * ixgbe_dmac_config - Configure DMA Coalescing registers. 1137 * @hw: pointer to hardware structure 1138 * --- 178 unchanged lines hidden (view full) --- 1317 */ 1318s32 ixgbe_handle_lasi(struct ixgbe_hw *hw) 1319{ 1320 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw), 1321 IXGBE_NOT_IMPLEMENTED); 1322} 1323 1324/** |
1325 * ixgbe_bypass_rw - Bit bang data into by_pass FW 1326 * @hw: pointer to hardware structure 1327 * @cmd: Command we send to the FW 1328 * @status: The reply from the FW 1329 * 1330 * Bit-bangs the cmd to the by_pass FW status points to what is returned. 1331 **/ 1332s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status) 1333{ 1334 return ixgbe_call_func(hw, hw->mac.ops.bypass_rw, (hw, cmd, status), 1335 IXGBE_NOT_IMPLEMENTED); 1336} 1337 1338/** 1339 * ixgbe_bypass_valid_rd - Verify valid return from bit-bang. 1340 * 1341 * If we send a write we can't be sure it took until we can read back 1342 * that same register. It can be a problem as some of the feilds may 1343 * for valid reasons change inbetween the time wrote the register and 1344 * we read it again to verify. So this function check everything we 1345 * can check and then assumes it worked. 1346 * 1347 * @u32 in_reg - The register cmd for the bit-bang read. 1348 * @u32 out_reg - The register returned from a bit-bang read. 1349 **/ 1350bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg) 1351{ 1352 return ixgbe_call_func(hw, hw->mac.ops.bypass_valid_rd, 1353 (in_reg, out_reg), IXGBE_NOT_IMPLEMENTED); 1354} 1355 1356/** 1357 * ixgbe_bypass_set - Set a bypass field in the FW CTRL Regiter. 1358 * @hw: pointer to hardware structure 1359 * @cmd: The control word we are setting. 1360 * @event: The event we are setting in the FW. This also happens to 1361 * be the mask for the event we are setting (handy) 1362 * @action: The action we set the event to in the FW. This is in a 1363 * bit field that happens to be what we want to put in 1364 * the event spot (also handy) 1365 * 1366 * Writes to the cmd control the bits in actions. 1367 **/ 1368s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action) 1369{ 1370 return ixgbe_call_func(hw, hw->mac.ops.bypass_set, 1371 (hw, cmd, event, action), 1372 IXGBE_NOT_IMPLEMENTED); 1373} 1374 1375/** 1376 * ixgbe_bypass_rd_eep - Read the bypass FW eeprom address 1377 * @hw: pointer to hardware structure 1378 * @addr: The bypass eeprom address to read. 1379 * @value: The 8b of data at the address above. 1380 **/ 1381s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value) 1382{ 1383 return ixgbe_call_func(hw, hw->mac.ops.bypass_rd_eep, 1384 (hw, addr, value), IXGBE_NOT_IMPLEMENTED); 1385} 1386 1387/** |
1388 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 1389 * @hw: pointer to hardware structure 1390 * @reg: analog register to read 1391 * @val: read value 1392 * 1393 * Performs write operation to analog register specified. 1394 **/ 1395s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) --- 58 unchanged lines hidden (view full) --- 1454 u8 dev_addr, u8 *data) 1455{ 1456 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked, 1457 (hw, byte_offset, dev_addr, data), 1458 IXGBE_NOT_IMPLEMENTED); 1459} 1460 1461/** |
1462 * ixgbe_read_link - Perform read operation on link device |
1463 * @hw: pointer to the hardware structure |
1464 * @addr: bus address to read from 1465 * @reg: device register to read from |
1466 * @val: pointer to location to receive read value 1467 * 1468 * Returns an error code on error. 1469 */ |
1470s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val) |
1471{ |
1472 return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr, |
1473 reg, val), IXGBE_NOT_IMPLEMENTED); 1474} 1475 1476/** |
1477 * ixgbe_read_link_unlocked - Perform read operation on link device |
1478 * @hw: pointer to the hardware structure |
1479 * @addr: bus address to read from 1480 * @reg: device register to read from |
1481 * @val: pointer to location to receive read value 1482 * 1483 * Returns an error code on error. 1484 **/ |
1485s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val) |
1486{ |
1487 return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked, 1488 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED); |
1489} 1490 1491/** 1492 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 1493 * @hw: pointer to hardware structure 1494 * @byte_offset: byte offset to write 1495 * @dev_addr: I2C bus address to write to 1496 * @data: value to write --- 22 unchanged lines hidden (view full) --- 1519 u8 dev_addr, u8 data) 1520{ 1521 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked, 1522 (hw, byte_offset, dev_addr, data), 1523 IXGBE_NOT_IMPLEMENTED); 1524} 1525 1526/** |
1527 * ixgbe_write_link - Perform write operation on link device |
1528 * @hw: pointer to the hardware structure |
1529 * @addr: bus address to write to 1530 * @reg: device register to write to |
1531 * @val: value to write 1532 * 1533 * Returns an error code on error. 1534 */ |
1535s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val) |
1536{ |
1537 return ixgbe_call_func(hw, hw->link.ops.write_link, 1538 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED); |
1539} 1540 1541/** |
1542 * ixgbe_write_link_unlocked - Perform write operation on link device |
1543 * @hw: pointer to the hardware structure |
1544 * @addr: bus address to write to 1545 * @reg: device register to write to |
1546 * @val: value to write 1547 * 1548 * Returns an error code on error. 1549 **/ |
1550s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val) |
1551{ |
1552 return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked, |
1553 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED); 1554} 1555 1556/** 1557 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 1558 * @hw: pointer to hardware structure 1559 * @byte_offset: EEPROM byte offset to write 1560 * @eeprom_data: value to write --- 24 unchanged lines hidden (view full) --- 1585} 1586 1587/** 1588 * ixgbe_get_supported_physical_layer - Returns physical layer type 1589 * @hw: pointer to hardware structure 1590 * 1591 * Determines physical layer capabilities of the current configuration. 1592 **/ |
1593u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) |
1594{ 1595 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 1596 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 1597} 1598 1599/** 1600 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics 1601 * @hw: pointer to hardware structure --- 54 unchanged lines hidden (view full) --- 1656 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1657 **/ 1658void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask) 1659{ 1660 if (hw->mac.ops.release_swfw_sync) 1661 hw->mac.ops.release_swfw_sync(hw, mask); 1662} 1663 |
1664/** 1665 * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore 1666 * @hw: pointer to hardware structure 1667 * 1668 * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register. 1669 * Regardless of whether is succeeds or not it then release the semaphore. 1670 * This is function is called to recover from catastrophic failures that 1671 * may have left the semaphore locked. 1672 **/ 1673void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw) 1674{ 1675 if (hw->mac.ops.init_swfw_sync) 1676 hw->mac.ops.init_swfw_sync(hw); 1677} |
1678 |
1679 |
1680void ixgbe_disable_rx(struct ixgbe_hw *hw) 1681{ 1682 if (hw->mac.ops.disable_rx) 1683 hw->mac.ops.disable_rx(hw); 1684} 1685 1686void ixgbe_enable_rx(struct ixgbe_hw *hw) 1687{ --- 16 unchanged lines hidden --- |