3c3
< Copyright (c) 2001-2015, Intel Corporation
---
> Copyright (c) 2001-2017, Intel Corporation
5,6c5,6
<
< Redistribution and use in source and binary forms, with or without
---
>
> Redistribution and use in source and binary forms, with or without
8,9c8,9
<
< 1. Redistributions of source code must retain the above copyright notice,
---
>
> 1. Redistributions of source code must retain the above copyright notice,
11,13c11,13
<
< 2. Redistributions in binary form must reproduce the above copyright
< notice, this list of conditions and the following disclaimer in the
---
>
> 2. Redistributions in binary form must reproduce the above copyright
> notice, this list of conditions and the following disclaimer in the
15,17c15,17
<
< 3. Neither the name of the Intel Corporation nor the names of its
< contributors may be used to endorse or promote products derived from
---
>
> 3. Neither the name of the Intel Corporation nor the names of its
> contributors may be used to endorse or promote products derived from
19c19
<
---
>
21,28c21,28
< AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
< IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
< ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
< LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
< CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
< SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
< INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
< CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
---
> AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33c33
< /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_api.c 299200 2016-05-06 22:54:56Z pfg $*/
---
> /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_api.c 320897 2017-07-11 21:25:07Z erj $*/
55a56,59
> static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
> IXGBE_MVALS_INIT(_X550EM_a)
> };
>
106c110
< status = ixgbe_init_ops_X550EM(hw);
---
> status = ixgbe_init_ops_X550EM_x(hw);
108,112c112,113
< case ixgbe_mac_82599_vf:
< case ixgbe_mac_X540_vf:
< case ixgbe_mac_X550_vf:
< case ixgbe_mac_X550EM_x_vf:
< status = ixgbe_init_ops_vf(hw);
---
> case ixgbe_mac_X550EM_a:
> status = ixgbe_init_ops_X550EM_a(hw);
177,185d177
< case IXGBE_DEV_ID_82599_VF:
< case IXGBE_DEV_ID_82599_VF_HV:
< hw->mac.type = ixgbe_mac_82599_vf;
< break;
< case IXGBE_DEV_ID_X540_VF:
< case IXGBE_DEV_ID_X540_VF_HV:
< hw->mac.type = ixgbe_mac_X540_vf;
< hw->mvals = ixgbe_mvals_X540;
< break;
201a194
> case IXGBE_DEV_ID_X550EM_X_XFI:
205,208c198,210
< case IXGBE_DEV_ID_X550_VF:
< case IXGBE_DEV_ID_X550_VF_HV:
< hw->mac.type = ixgbe_mac_X550_vf;
< hw->mvals = ixgbe_mvals_X550;
---
> case IXGBE_DEV_ID_X550EM_A_KR:
> case IXGBE_DEV_ID_X550EM_A_KR_L:
> case IXGBE_DEV_ID_X550EM_A_SFP_N:
> case IXGBE_DEV_ID_X550EM_A_SGMII:
> case IXGBE_DEV_ID_X550EM_A_SGMII_L:
> case IXGBE_DEV_ID_X550EM_A_1G_T:
> case IXGBE_DEV_ID_X550EM_A_1G_T_L:
> case IXGBE_DEV_ID_X550EM_A_10G_T:
> case IXGBE_DEV_ID_X550EM_A_QSFP:
> case IXGBE_DEV_ID_X550EM_A_QSFP_N:
> case IXGBE_DEV_ID_X550EM_A_SFP:
> hw->mac.type = ixgbe_mac_X550EM_a;
> hw->mvals = ixgbe_mvals_X550EM_a;
210,214d211
< case IXGBE_DEV_ID_X550EM_X_VF:
< case IXGBE_DEV_ID_X550EM_X_VF_HV:
< hw->mac.type = ixgbe_mac_X550EM_x_vf;
< hw->mvals = ixgbe_mvals_X550EM_x;
< break;
1060,1061c1057,1059
< * @vind: VMDq output index that maps queue to VLAN id in VFTA
< * @vlan_on: boolean flag to turn on/off VLAN in VFTA
---
> * @vind: VMDq output index that maps queue to VLAN id in VLVFB
> * @vlan_on: boolean flag to turn on/off VLAN
> * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1065c1063,1064
< s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
---
> s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
> bool vlvf_bypass)
1068c1067
< vlan_on), IXGBE_NOT_IMPLEMENTED);
---
> vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED);
1075,1078c1074,1079
< * @vind: VMDq output index that maps queue to VLAN id in VFVFB
< * @vlan_on: boolean flag to turn on/off VLAN in VFVF
< * @vfta_changed: pointer to boolean flag which indicates whether VFTA
< * should be changed
---
> * @vind: VMDq output index that maps queue to VLAN id in VLVFB
> * @vlan_on: boolean flag to turn on/off VLAN in VLVF
> * @vfta_delta: pointer to the difference between the current value of VFTA
> * and the desired value
> * @vfta: the desired value of the VFTA
> * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1083c1084
< bool *vfta_changed)
---
> u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
1086c1087,1088
< vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
---
> vlan_on, vfta_delta, vfta, vlvf_bypass),
> IXGBE_NOT_IMPLEMENTED);
1119a1122,1123
> * @len: length of driver_ver string
> * @driver_ver: driver string
1122c1126
< u8 ver)
---
> u8 ver, u16 len, char *driver_ver)
1125c1129,1130
< build, ver), IXGBE_NOT_IMPLEMENTED);
---
> build, ver, len, driver_ver),
> IXGBE_NOT_IMPLEMENTED);
1319a1325,1387
> * ixgbe_bypass_rw - Bit bang data into by_pass FW
> * @hw: pointer to hardware structure
> * @cmd: Command we send to the FW
> * @status: The reply from the FW
> *
> * Bit-bangs the cmd to the by_pass FW status points to what is returned.
> **/
> s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_rw, (hw, cmd, status),
> IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
> * ixgbe_bypass_valid_rd - Verify valid return from bit-bang.
> *
> * If we send a write we can't be sure it took until we can read back
> * that same register. It can be a problem as some of the feilds may
> * for valid reasons change inbetween the time wrote the register and
> * we read it again to verify. So this function check everything we
> * can check and then assumes it worked.
> *
> * @u32 in_reg - The register cmd for the bit-bang read.
> * @u32 out_reg - The register returned from a bit-bang read.
> **/
> bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_valid_rd,
> (in_reg, out_reg), IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
> * ixgbe_bypass_set - Set a bypass field in the FW CTRL Regiter.
> * @hw: pointer to hardware structure
> * @cmd: The control word we are setting.
> * @event: The event we are setting in the FW. This also happens to
> * be the mask for the event we are setting (handy)
> * @action: The action we set the event to in the FW. This is in a
> * bit field that happens to be what we want to put in
> * the event spot (also handy)
> *
> * Writes to the cmd control the bits in actions.
> **/
> s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_set,
> (hw, cmd, event, action),
> IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
> * ixgbe_bypass_rd_eep - Read the bypass FW eeprom address
> * @hw: pointer to hardware structure
> * @addr: The bypass eeprom address to read.
> * @value: The 8b of data at the address above.
> **/
> s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_rd_eep,
> (hw, addr, value), IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
1394c1462
< * ixgbe_read_i2c_combined - Perform I2C read combined operation
---
> * ixgbe_read_link - Perform read operation on link device
1396,1397c1464,1465
< * @addr: I2C bus address to read from
< * @reg: I2C device register to read from
---
> * @addr: bus address to read from
> * @reg: device register to read from
1402c1470
< s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
---
> s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1404c1472
< return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
---
> return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1409c1477
< * ixgbe_read_i2c_combined_unlocked - Perform I2C read combined operation
---
> * ixgbe_read_link_unlocked - Perform read operation on link device
1411,1412c1479,1480
< * @addr: I2C bus address to read from
< * @reg: I2C device register to read from
---
> * @addr: bus address to read from
> * @reg: device register to read from
1417,1418c1485
< s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
< u16 *val)
---
> s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1420,1422c1487,1488
< return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined_unlocked,
< (hw, addr, reg, val),
< IXGBE_NOT_IMPLEMENTED);
---
> return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
> (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1461c1527
< * ixgbe_write_i2c_combined - Perform I2C write combined operation
---
> * ixgbe_write_link - Perform write operation on link device
1463,1464c1529,1530
< * @addr: I2C bus address to write to
< * @reg: I2C device register to write to
---
> * @addr: bus address to write to
> * @reg: device register to write to
1469c1535
< s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
---
> s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1471,1472c1537,1538
< return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
< reg, val), IXGBE_NOT_IMPLEMENTED);
---
> return ixgbe_call_func(hw, hw->link.ops.write_link,
> (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1476c1542
< * ixgbe_write_i2c_combined_unlocked - Perform I2C write combined operation
---
> * ixgbe_write_link_unlocked - Perform write operation on link device
1478,1479c1544,1545
< * @addr: I2C bus address to write to
< * @reg: I2C device register to write to
---
> * @addr: bus address to write to
> * @reg: device register to write to
1484,1485c1550
< s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
< u16 val)
---
> s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1487c1552
< return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined_unlocked,
---
> return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1528c1593
< u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
---
> u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1598a1664,1677
> /**
> * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
> * @hw: pointer to hardware structure
> *
> * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
> * Regardless of whether is succeeds or not it then release the semaphore.
> * This is function is called to recover from catastrophic failures that
> * may have left the semaphore locked.
> **/
> void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
> {
> if (hw->mac.ops.init_swfw_sync)
> hw->mac.ops.init_swfw_sync(hw);
> }
1599a1679
>
< Copyright (c) 2001-2015, Intel Corporation
---
> Copyright (c) 2001-2017, Intel Corporation
5,6c5,6
<
< Redistribution and use in source and binary forms, with or without
---
>
> Redistribution and use in source and binary forms, with or without
8,9c8,9
<
< 1. Redistributions of source code must retain the above copyright notice,
---
>
> 1. Redistributions of source code must retain the above copyright notice,
11,13c11,13
<
< 2. Redistributions in binary form must reproduce the above copyright
< notice, this list of conditions and the following disclaimer in the
---
>
> 2. Redistributions in binary form must reproduce the above copyright
> notice, this list of conditions and the following disclaimer in the
15,17c15,17
<
< 3. Neither the name of the Intel Corporation nor the names of its
< contributors may be used to endorse or promote products derived from
---
>
> 3. Neither the name of the Intel Corporation nor the names of its
> contributors may be used to endorse or promote products derived from
19c19
<
---
>
21,28c21,28
< AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
< IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
< ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
< LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
< CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
< SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
< INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
< CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
---
> AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33c33
< /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_api.c 299200 2016-05-06 22:54:56Z pfg $*/
---
> /*$FreeBSD: stable/11/sys/dev/ixgbe/ixgbe_api.c 320897 2017-07-11 21:25:07Z erj $*/
55a56,59
> static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
> IXGBE_MVALS_INIT(_X550EM_a)
> };
>
106c110
< status = ixgbe_init_ops_X550EM(hw);
---
> status = ixgbe_init_ops_X550EM_x(hw);
108,112c112,113
< case ixgbe_mac_82599_vf:
< case ixgbe_mac_X540_vf:
< case ixgbe_mac_X550_vf:
< case ixgbe_mac_X550EM_x_vf:
< status = ixgbe_init_ops_vf(hw);
---
> case ixgbe_mac_X550EM_a:
> status = ixgbe_init_ops_X550EM_a(hw);
177,185d177
< case IXGBE_DEV_ID_82599_VF:
< case IXGBE_DEV_ID_82599_VF_HV:
< hw->mac.type = ixgbe_mac_82599_vf;
< break;
< case IXGBE_DEV_ID_X540_VF:
< case IXGBE_DEV_ID_X540_VF_HV:
< hw->mac.type = ixgbe_mac_X540_vf;
< hw->mvals = ixgbe_mvals_X540;
< break;
201a194
> case IXGBE_DEV_ID_X550EM_X_XFI:
205,208c198,210
< case IXGBE_DEV_ID_X550_VF:
< case IXGBE_DEV_ID_X550_VF_HV:
< hw->mac.type = ixgbe_mac_X550_vf;
< hw->mvals = ixgbe_mvals_X550;
---
> case IXGBE_DEV_ID_X550EM_A_KR:
> case IXGBE_DEV_ID_X550EM_A_KR_L:
> case IXGBE_DEV_ID_X550EM_A_SFP_N:
> case IXGBE_DEV_ID_X550EM_A_SGMII:
> case IXGBE_DEV_ID_X550EM_A_SGMII_L:
> case IXGBE_DEV_ID_X550EM_A_1G_T:
> case IXGBE_DEV_ID_X550EM_A_1G_T_L:
> case IXGBE_DEV_ID_X550EM_A_10G_T:
> case IXGBE_DEV_ID_X550EM_A_QSFP:
> case IXGBE_DEV_ID_X550EM_A_QSFP_N:
> case IXGBE_DEV_ID_X550EM_A_SFP:
> hw->mac.type = ixgbe_mac_X550EM_a;
> hw->mvals = ixgbe_mvals_X550EM_a;
210,214d211
< case IXGBE_DEV_ID_X550EM_X_VF:
< case IXGBE_DEV_ID_X550EM_X_VF_HV:
< hw->mac.type = ixgbe_mac_X550EM_x_vf;
< hw->mvals = ixgbe_mvals_X550EM_x;
< break;
1060,1061c1057,1059
< * @vind: VMDq output index that maps queue to VLAN id in VFTA
< * @vlan_on: boolean flag to turn on/off VLAN in VFTA
---
> * @vind: VMDq output index that maps queue to VLAN id in VLVFB
> * @vlan_on: boolean flag to turn on/off VLAN
> * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1065c1063,1064
< s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
---
> s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
> bool vlvf_bypass)
1068c1067
< vlan_on), IXGBE_NOT_IMPLEMENTED);
---
> vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED);
1075,1078c1074,1079
< * @vind: VMDq output index that maps queue to VLAN id in VFVFB
< * @vlan_on: boolean flag to turn on/off VLAN in VFVF
< * @vfta_changed: pointer to boolean flag which indicates whether VFTA
< * should be changed
---
> * @vind: VMDq output index that maps queue to VLAN id in VLVFB
> * @vlan_on: boolean flag to turn on/off VLAN in VLVF
> * @vfta_delta: pointer to the difference between the current value of VFTA
> * and the desired value
> * @vfta: the desired value of the VFTA
> * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1083c1084
< bool *vfta_changed)
---
> u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
1086c1087,1088
< vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
---
> vlan_on, vfta_delta, vfta, vlvf_bypass),
> IXGBE_NOT_IMPLEMENTED);
1119a1122,1123
> * @len: length of driver_ver string
> * @driver_ver: driver string
1122c1126
< u8 ver)
---
> u8 ver, u16 len, char *driver_ver)
1125c1129,1130
< build, ver), IXGBE_NOT_IMPLEMENTED);
---
> build, ver, len, driver_ver),
> IXGBE_NOT_IMPLEMENTED);
1319a1325,1387
> * ixgbe_bypass_rw - Bit bang data into by_pass FW
> * @hw: pointer to hardware structure
> * @cmd: Command we send to the FW
> * @status: The reply from the FW
> *
> * Bit-bangs the cmd to the by_pass FW status points to what is returned.
> **/
> s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_rw, (hw, cmd, status),
> IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
> * ixgbe_bypass_valid_rd - Verify valid return from bit-bang.
> *
> * If we send a write we can't be sure it took until we can read back
> * that same register. It can be a problem as some of the feilds may
> * for valid reasons change inbetween the time wrote the register and
> * we read it again to verify. So this function check everything we
> * can check and then assumes it worked.
> *
> * @u32 in_reg - The register cmd for the bit-bang read.
> * @u32 out_reg - The register returned from a bit-bang read.
> **/
> bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_valid_rd,
> (in_reg, out_reg), IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
> * ixgbe_bypass_set - Set a bypass field in the FW CTRL Regiter.
> * @hw: pointer to hardware structure
> * @cmd: The control word we are setting.
> * @event: The event we are setting in the FW. This also happens to
> * be the mask for the event we are setting (handy)
> * @action: The action we set the event to in the FW. This is in a
> * bit field that happens to be what we want to put in
> * the event spot (also handy)
> *
> * Writes to the cmd control the bits in actions.
> **/
> s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_set,
> (hw, cmd, event, action),
> IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
> * ixgbe_bypass_rd_eep - Read the bypass FW eeprom address
> * @hw: pointer to hardware structure
> * @addr: The bypass eeprom address to read.
> * @value: The 8b of data at the address above.
> **/
> s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)
> {
> return ixgbe_call_func(hw, hw->mac.ops.bypass_rd_eep,
> (hw, addr, value), IXGBE_NOT_IMPLEMENTED);
> }
>
> /**
1394c1462
< * ixgbe_read_i2c_combined - Perform I2C read combined operation
---
> * ixgbe_read_link - Perform read operation on link device
1396,1397c1464,1465
< * @addr: I2C bus address to read from
< * @reg: I2C device register to read from
---
> * @addr: bus address to read from
> * @reg: device register to read from
1402c1470
< s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
---
> s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1404c1472
< return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
---
> return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1409c1477
< * ixgbe_read_i2c_combined_unlocked - Perform I2C read combined operation
---
> * ixgbe_read_link_unlocked - Perform read operation on link device
1411,1412c1479,1480
< * @addr: I2C bus address to read from
< * @reg: I2C device register to read from
---
> * @addr: bus address to read from
> * @reg: device register to read from
1417,1418c1485
< s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
< u16 *val)
---
> s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1420,1422c1487,1488
< return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined_unlocked,
< (hw, addr, reg, val),
< IXGBE_NOT_IMPLEMENTED);
---
> return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
> (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1461c1527
< * ixgbe_write_i2c_combined - Perform I2C write combined operation
---
> * ixgbe_write_link - Perform write operation on link device
1463,1464c1529,1530
< * @addr: I2C bus address to write to
< * @reg: I2C device register to write to
---
> * @addr: bus address to write to
> * @reg: device register to write to
1469c1535
< s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
---
> s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1471,1472c1537,1538
< return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
< reg, val), IXGBE_NOT_IMPLEMENTED);
---
> return ixgbe_call_func(hw, hw->link.ops.write_link,
> (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1476c1542
< * ixgbe_write_i2c_combined_unlocked - Perform I2C write combined operation
---
> * ixgbe_write_link_unlocked - Perform write operation on link device
1478,1479c1544,1545
< * @addr: I2C bus address to write to
< * @reg: I2C device register to write to
---
> * @addr: bus address to write to
> * @reg: device register to write to
1484,1485c1550
< s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
< u16 val)
---
> s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1487c1552
< return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined_unlocked,
---
> return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1528c1593
< u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
---
> u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1598a1664,1677
> /**
> * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
> * @hw: pointer to hardware structure
> *
> * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
> * Regardless of whether is succeeds or not it then release the semaphore.
> * This is function is called to recover from catastrophic failures that
> * may have left the semaphore locked.
> **/
> void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
> {
> if (hw->mac.ops.init_swfw_sync)
> hw->mac.ops.init_swfw_sync(hw);
> }
1599a1679
>