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if_iwn.c (258034) if_iwn.c (258035)
1/*-
2 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
3 * Copyright (c) 2011 Intel Corporation
4 * Copyright (c) 2007-2009
5 * Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2008
7 * Benjamin Close <benjsc@FreeBSD.org>
8 * Copyright (c) 2008 Sam Leffler, Errno Consulting

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21 */
22
23/*
24 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
25 * adapters.
26 */
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
3 * Copyright (c) 2011 Intel Corporation
4 * Copyright (c) 2007-2009
5 * Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2008
7 * Benjamin Close <benjsc@FreeBSD.org>
8 * Copyright (c) 2008 Sam Leffler, Errno Consulting

--- 12 unchanged lines hidden (view full) ---

21 */
22
23/*
24 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
25 * adapters.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/iwn/if_iwn.c 258034 2013-11-12 05:49:01Z adrian $");
29__FBSDID("$FreeBSD: head/sys/dev/iwn/if_iwn.c 258035 2013-11-12 05:58:23Z adrian $");
30
31#include "opt_wlan.h"
32#include "opt_iwn.h"
33
34#include <sys/param.h>
35#include <sys/sockio.h>
36#include <sys/sysctl.h>
37#include <sys/mbuf.h>

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73#include <net80211/ieee80211_var.h>
74#include <net80211/ieee80211_radiotap.h>
75#include <net80211/ieee80211_regdomain.h>
76#include <net80211/ieee80211_ratectl.h>
77
78#include <dev/iwn/if_iwnreg.h>
79#include <dev/iwn/if_iwnvar.h>
80#include <dev/iwn/if_iwn_devid.h>
30
31#include "opt_wlan.h"
32#include "opt_iwn.h"
33
34#include <sys/param.h>
35#include <sys/sockio.h>
36#include <sys/sysctl.h>
37#include <sys/mbuf.h>

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73#include <net80211/ieee80211_var.h>
74#include <net80211/ieee80211_radiotap.h>
75#include <net80211/ieee80211_regdomain.h>
76#include <net80211/ieee80211_ratectl.h>
77
78#include <dev/iwn/if_iwnreg.h>
79#include <dev/iwn/if_iwnvar.h>
80#include <dev/iwn/if_iwn_devid.h>
81#include <dev/iwn/if_iwn_chip_cfg.h>
81#include <dev/iwn/if_iwn_debug.h>
82
83struct iwn_ident {
84 uint16_t vendor;
85 uint16_t device;
86 const char *name;
87};
88

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94 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
95 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
96 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
97 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
98 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
99 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
100 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
101 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
82#include <dev/iwn/if_iwn_debug.h>
83
84struct iwn_ident {
85 uint16_t vendor;
86 uint16_t device;
87 const char *name;
88};
89

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95 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
96 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
97 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
98 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
99 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
100 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
101 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
102 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
103 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
104 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
105 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
102 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
104 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
106 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
108 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
109 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },

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116 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
117 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
118 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
119 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
120 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
121 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
122 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
123 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
106 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
107 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
108 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
109 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
110 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
111 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
112 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
113 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },

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120 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
121 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
122 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
123 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
124 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
126 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
128 /*
129 * These currently don't function; the firmware crashes during
130 * the startup calibration request.
131 */
132#if 0
133 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
134 /* XXX TODO: figure out which ID this one is? */
135 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
136#endif
124 { 0, 0, NULL }
125};
126
127static int iwn_probe(device_t);
128static int iwn_attach(device_t);
129static int iwn4965_attach(struct iwn_softc *, uint16_t);
130static int iwn5000_attach(struct iwn_softc *, uint16_t);
137 { 0, 0, NULL }
138};
139
140static int iwn_probe(device_t);
141static int iwn_attach(device_t);
142static int iwn4965_attach(struct iwn_softc *, uint16_t);
143static int iwn5000_attach(struct iwn_softc *, uint16_t);
144static int iwn_config_specific(struct iwn_softc *, uint16_t);
131static void iwn_radiotap_attach(struct iwn_softc *);
132static void iwn_sysctlattach(struct iwn_softc *);
133static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
134 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
135 const uint8_t [IEEE80211_ADDR_LEN],
136 const uint8_t [IEEE80211_ADDR_LEN]);
137static void iwn_vap_delete(struct ieee80211vap *);
138static int iwn_detach(device_t);

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289 struct ieee80211_node *, int, uint8_t, uint16_t);
290static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
291 uint8_t, uint16_t);
292static int iwn5000_query_calibration(struct iwn_softc *);
293static int iwn5000_send_calibration(struct iwn_softc *);
294static int iwn5000_send_wimax_coex(struct iwn_softc *);
295static int iwn5000_crystal_calib(struct iwn_softc *);
296static int iwn5000_temp_offset_calib(struct iwn_softc *);
145static void iwn_radiotap_attach(struct iwn_softc *);
146static void iwn_sysctlattach(struct iwn_softc *);
147static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
148 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
149 const uint8_t [IEEE80211_ADDR_LEN],
150 const uint8_t [IEEE80211_ADDR_LEN]);
151static void iwn_vap_delete(struct ieee80211vap *);
152static int iwn_detach(device_t);

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303 struct ieee80211_node *, int, uint8_t, uint16_t);
304static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
305 uint8_t, uint16_t);
306static int iwn5000_query_calibration(struct iwn_softc *);
307static int iwn5000_send_calibration(struct iwn_softc *);
308static int iwn5000_send_wimax_coex(struct iwn_softc *);
309static int iwn5000_crystal_calib(struct iwn_softc *);
310static int iwn5000_temp_offset_calib(struct iwn_softc *);
311static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
297static int iwn4965_post_alive(struct iwn_softc *);
298static int iwn5000_post_alive(struct iwn_softc *);
299static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
300 int);
301static int iwn4965_load_firmware(struct iwn_softc *);
302static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
303 const uint8_t *, int);
304static int iwn5000_load_firmware(struct iwn_softc *);

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447 }
448
449 IWN_LOCK_INIT(sc);
450
451 /* Read hardware revision and attach. */
452 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
453 & IWN_HW_REV_TYPE_MASK;
454 sc->subdevice_id = pci_get_subdevice(dev);
312static int iwn4965_post_alive(struct iwn_softc *);
313static int iwn5000_post_alive(struct iwn_softc *);
314static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
315 int);
316static int iwn4965_load_firmware(struct iwn_softc *);
317static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
318 const uint8_t *, int);
319static int iwn5000_load_firmware(struct iwn_softc *);

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462 }
463
464 IWN_LOCK_INIT(sc);
465
466 /* Read hardware revision and attach. */
467 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
468 & IWN_HW_REV_TYPE_MASK;
469 sc->subdevice_id = pci_get_subdevice(dev);
470
471 /*
472 * 4965 versus 5000 and later have different methods.
473 * Let's set those up first.
474 */
455 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
456 error = iwn4965_attach(sc, pci_get_device(dev));
457 else
458 error = iwn5000_attach(sc, pci_get_device(dev));
459 if (error != 0) {
460 device_printf(dev, "could not attach device, error %d\n",
461 error);
462 goto fail;
463 }
464
475 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
476 error = iwn4965_attach(sc, pci_get_device(dev));
477 else
478 error = iwn5000_attach(sc, pci_get_device(dev));
479 if (error != 0) {
480 device_printf(dev, "could not attach device, error %d\n",
481 error);
482 goto fail;
483 }
484
485 /*
486 * Next, let's setup the various parameters of each NIC.
487 */
488 error = iwn_config_specific(sc, pci_get_device(dev));
489 if (error != 0) {
490 device_printf(dev, "could not attach device, error %d\n",
491 error);
492 goto fail;
493 }
494
465 if ((error = iwn_hw_prepare(sc)) != 0) {
466 device_printf(dev, "hardware not ready, error %d\n", error);
467 goto fail;
468 }
469
470 /* Allocate DMA memory for firmware transfers. */
471 if ((error = iwn_alloc_fwmem(sc)) != 0) {
472 device_printf(dev,

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666 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
667 return 0;
668fail:
669 iwn_detach(dev);
670 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
671 return error;
672}
673
495 if ((error = iwn_hw_prepare(sc)) != 0) {
496 device_printf(dev, "hardware not ready, error %d\n", error);
497 goto fail;
498 }
499
500 /* Allocate DMA memory for firmware transfers. */
501 if ((error = iwn_alloc_fwmem(sc)) != 0) {
502 device_printf(dev,

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696 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
697 return 0;
698fail:
699 iwn_detach(dev);
700 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
701 return error;
702}
703
704/*
705 * Define specific configuration based on device id and subdevice id
706 * pid : PCI device id
707 */
674static int
708static int
709iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
710{
711
712 switch (pid) {
713/* 4965 series */
714 case IWN_DID_4965_1:
715 case IWN_DID_4965_2:
716 case IWN_DID_4965_3:
717 case IWN_DID_4965_4:
718 sc->base_params = &iwn4965_base_params;
719 sc->limits = &iwn4965_sensitivity_limits;
720 sc->fwname = "iwn4965fw";
721 /* Override chains masks, ROM is known to be broken. */
722 sc->txchainmask = IWN_ANT_AB;
723 sc->rxchainmask = IWN_ANT_ABC;
724 /* Enable normal btcoex */
725 sc->sc_flags |= IWN_FLAG_BTCOEX;
726 break;
727/* 1000 Series */
728 case IWN_DID_1000_1:
729 case IWN_DID_1000_2:
730 switch(sc->subdevice_id) {
731 case IWN_SDID_1000_1:
732 case IWN_SDID_1000_2:
733 case IWN_SDID_1000_3:
734 case IWN_SDID_1000_4:
735 case IWN_SDID_1000_5:
736 case IWN_SDID_1000_6:
737 case IWN_SDID_1000_7:
738 case IWN_SDID_1000_8:
739 case IWN_SDID_1000_9:
740 case IWN_SDID_1000_10:
741 case IWN_SDID_1000_11:
742 case IWN_SDID_1000_12:
743 sc->limits = &iwn1000_sensitivity_limits;
744 sc->base_params = &iwn1000_base_params;
745 sc->fwname = "iwn1000fw";
746 break;
747 default:
748 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
749 "0x%04x rev %d not supported (subdevice)\n", pid,
750 sc->subdevice_id,sc->hw_type);
751 return ENOTSUP;
752 }
753 break;
754/* 6x00 Series */
755 case IWN_DID_6x00_2:
756 case IWN_DID_6x00_4:
757 case IWN_DID_6x00_1:
758 case IWN_DID_6x00_3:
759 sc->fwname = "iwn6000fw";
760 sc->limits = &iwn6000_sensitivity_limits;
761 switch(sc->subdevice_id) {
762 case IWN_SDID_6x00_1:
763 case IWN_SDID_6x00_2:
764 case IWN_SDID_6x00_8:
765 //iwl6000_3agn_cfg
766 sc->base_params = &iwn_6000_base_params;
767 break;
768 case IWN_SDID_6x00_3:
769 case IWN_SDID_6x00_6:
770 case IWN_SDID_6x00_9:
771 ////iwl6000i_2agn
772 case IWN_SDID_6x00_4:
773 case IWN_SDID_6x00_7:
774 case IWN_SDID_6x00_10:
775 //iwl6000i_2abg_cfg
776 case IWN_SDID_6x00_5:
777 //iwl6000i_2bg_cfg
778 sc->base_params = &iwn_6000i_base_params;
779 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
780 sc->txchainmask = IWN_ANT_BC;
781 sc->rxchainmask = IWN_ANT_BC;
782 break;
783 default:
784 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
785 "0x%04x rev %d not supported (subdevice)\n", pid,
786 sc->subdevice_id,sc->hw_type);
787 return ENOTSUP;
788 }
789 break;
790/* 6x05 Series */
791 case IWN_DID_6x05_1:
792 case IWN_DID_6x05_2:
793 switch(sc->subdevice_id) {
794 case IWN_SDID_6x05_1:
795 case IWN_SDID_6x05_4:
796 case IWN_SDID_6x05_6:
797 //iwl6005_2agn_cfg
798 case IWN_SDID_6x05_2:
799 case IWN_SDID_6x05_5:
800 case IWN_SDID_6x05_7:
801 //iwl6005_2abg_cfg
802 case IWN_SDID_6x05_3:
803 //iwl6005_2bg_cfg
804 case IWN_SDID_6x05_8:
805 case IWN_SDID_6x05_9:
806 //iwl6005_2agn_sff_cfg
807 case IWN_SDID_6x05_10:
808 //iwl6005_2agn_d_cfg
809 case IWN_SDID_6x05_11:
810 //iwl6005_2agn_mow1_cfg
811 case IWN_SDID_6x05_12:
812 //iwl6005_2agn_mow2_cfg
813 sc->fwname = "iwn6000g2afw";
814 sc->limits = &iwn6000_sensitivity_limits;
815 sc->base_params = &iwn_6000g2_base_params;
816 break;
817 default:
818 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
819 "0x%04x rev %d not supported (subdevice)\n", pid,
820 sc->subdevice_id,sc->hw_type);
821 return ENOTSUP;
822 }
823 break;
824/* 6x35 Series */
825 case IWN_DID_6035_1:
826 case IWN_DID_6035_2:
827 switch(sc->subdevice_id) {
828 case IWN_SDID_6035_1:
829 case IWN_SDID_6035_2:
830 case IWN_SDID_6035_3:
831 case IWN_SDID_6035_4:
832 sc->fwname = "iwn6000g2bfw";
833 sc->limits = &iwn6000_sensitivity_limits;
834 sc->base_params = &iwn_6000g2b_base_params;
835 break;
836 default:
837 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
838 "0x%04x rev %d not supported (subdevice)\n", pid,
839 sc->subdevice_id,sc->hw_type);
840 return ENOTSUP;
841 }
842 break;
843/* 6x50 WiFi/WiMax Series */
844 case IWN_DID_6050_1:
845 case IWN_DID_6050_2:
846 switch(sc->subdevice_id) {
847 case IWN_SDID_6050_1:
848 case IWN_SDID_6050_3:
849 case IWN_SDID_6050_5:
850 //iwl6050_2agn_cfg
851 case IWN_SDID_6050_2:
852 case IWN_SDID_6050_4:
853 case IWN_SDID_6050_6:
854 //iwl6050_2abg_cfg
855 sc->fwname = "iwn6050fw";
856 sc->txchainmask = IWN_ANT_AB;
857 sc->rxchainmask = IWN_ANT_AB;
858 sc->limits = &iwn6000_sensitivity_limits;
859 sc->base_params = &iwn_6050_base_params;
860 break;
861 default:
862 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
863 "0x%04x rev %d not supported (subdevice)\n", pid,
864 sc->subdevice_id,sc->hw_type);
865 return ENOTSUP;
866 }
867 break;
868/* 6150 WiFi/WiMax Series */
869 case IWN_DID_6150_1:
870 case IWN_DID_6150_2:
871 switch(sc->subdevice_id) {
872 case IWN_SDID_6150_1:
873 case IWN_SDID_6150_3:
874 case IWN_SDID_6150_5:
875 // iwl6150_bgn_cfg
876 case IWN_SDID_6150_2:
877 case IWN_SDID_6150_4:
878 case IWN_SDID_6150_6:
879 //iwl6150_bg_cfg
880 sc->fwname = "iwn6050fw";
881 sc->limits = &iwn6000_sensitivity_limits;
882 sc->base_params = &iwn_6150_base_params;
883 break;
884 default:
885 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
886 "0x%04x rev %d not supported (subdevice)\n", pid,
887 sc->subdevice_id,sc->hw_type);
888 return ENOTSUP;
889 }
890 break;
891/* 6030 Series and 1030 Series */
892 case IWN_DID_x030_1:
893 case IWN_DID_x030_2:
894 case IWN_DID_x030_3:
895 case IWN_DID_x030_4:
896 switch(sc->subdevice_id) {
897 case IWN_SDID_x030_1:
898 case IWN_SDID_x030_3:
899 case IWN_SDID_x030_5:
900 // iwl1030_bgn_cfg
901 case IWN_SDID_x030_2:
902 case IWN_SDID_x030_4:
903 case IWN_SDID_x030_6:
904 //iwl1030_bg_cfg
905 case IWN_SDID_x030_7:
906 case IWN_SDID_x030_10:
907 case IWN_SDID_x030_14:
908 //iwl6030_2agn_cfg
909 case IWN_SDID_x030_8:
910 case IWN_SDID_x030_11:
911 case IWN_SDID_x030_15:
912 // iwl6030_2bgn_cfg
913 case IWN_SDID_x030_9:
914 case IWN_SDID_x030_12:
915 case IWN_SDID_x030_16:
916 // iwl6030_2abg_cfg
917 case IWN_SDID_x030_13:
918 //iwl6030_2bg_cfg
919 sc->fwname = "iwn6000g2bfw";
920 sc->limits = &iwn6000_sensitivity_limits;
921 sc->base_params = &iwn_6000g2b_base_params;
922 break;
923 default:
924 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
925 "0x%04x rev %d not supported (subdevice)\n", pid,
926 sc->subdevice_id,sc->hw_type);
927 return ENOTSUP;
928 }
929 break;
930/* 130 Series WiFi */
931/* XXX: This series will need adjustment for rate.
932 * see rx_with_siso_diversity in linux kernel
933 */
934 case IWN_DID_130_1:
935 case IWN_DID_130_2:
936 switch(sc->subdevice_id) {
937 case IWN_SDID_130_1:
938 case IWN_SDID_130_3:
939 case IWN_SDID_130_5:
940 //iwl130_bgn_cfg
941 case IWN_SDID_130_2:
942 case IWN_SDID_130_4:
943 case IWN_SDID_130_6:
944 //iwl130_bg_cfg
945 sc->fwname = "iwn6000g2bfw";
946 sc->limits = &iwn6000_sensitivity_limits;
947 sc->base_params = &iwn_6000g2b_base_params;
948 break;
949 default:
950 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
951 "0x%04x rev %d not supported (subdevice)\n", pid,
952 sc->subdevice_id,sc->hw_type);
953 return ENOTSUP;
954 }
955 break;
956/* 100 Series WiFi */
957 case IWN_DID_100_1:
958 case IWN_DID_100_2:
959 switch(sc->subdevice_id) {
960 case IWN_SDID_100_1:
961 case IWN_SDID_100_2:
962 case IWN_SDID_100_3:
963 case IWN_SDID_100_4:
964 case IWN_SDID_100_5:
965 case IWN_SDID_100_6:
966 sc->limits = &iwn1000_sensitivity_limits;
967 sc->base_params = &iwn1000_base_params;
968 sc->fwname = "iwn100fw";
969 break;
970 default:
971 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
972 "0x%04x rev %d not supported (subdevice)\n", pid,
973 sc->subdevice_id,sc->hw_type);
974 return ENOTSUP;
975 }
976 break;
977
978/* 2x00 Series */
979 case IWN_DID_2x00_1:
980 case IWN_DID_2x00_2:
981 switch(sc->subdevice_id) {
982 case IWN_SDID_2x00_1:
983 case IWN_SDID_2x00_2:
984 case IWN_SDID_2x00_3:
985 //iwl2000_2bgn_cfg
986 case IWN_SDID_2x00_4:
987 //iwl2000_2bgn_d_cfg
988 sc->limits = &iwn2030_sensitivity_limits;
989 sc->base_params = &iwn2000_base_params;
990 sc->fwname = "iwn2000fw";
991 break;
992 default:
993 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
994 "0x%04x rev %d not supported (subdevice) \n",
995 pid, sc->subdevice_id, sc->hw_type);
996 return ENOTSUP;
997 }
998 break;
999/* 2x30 Series */
1000 case IWN_DID_2x30_1:
1001 case IWN_DID_2x30_2:
1002 switch(sc->subdevice_id) {
1003 case IWN_SDID_2x30_1:
1004 case IWN_SDID_2x30_3:
1005 case IWN_SDID_2x30_5:
1006 //iwl100_bgn_cfg
1007 case IWN_SDID_2x30_2:
1008 case IWN_SDID_2x30_4:
1009 case IWN_SDID_2x30_6:
1010 //iwl100_bg_cfg
1011 sc->limits = &iwn2030_sensitivity_limits;
1012 sc->base_params = &iwn2030_base_params;
1013 sc->fwname = "iwn2030fw";
1014 break;
1015 default:
1016 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1017 "0x%04x rev %d not supported (subdevice)\n", pid,
1018 sc->subdevice_id,sc->hw_type);
1019 return ENOTSUP;
1020 }
1021 break;
1022/* 5x00 Series */
1023 case IWN_DID_5x00_1:
1024 case IWN_DID_5x00_2:
1025 case IWN_DID_5x00_3:
1026 case IWN_DID_5x00_4:
1027 sc->limits = &iwn5000_sensitivity_limits;
1028 sc->base_params = &iwn5000_base_params;
1029 sc->fwname = "iwn5000fw";
1030 switch(sc->subdevice_id) {
1031 case IWN_SDID_5x00_1:
1032 case IWN_SDID_5x00_2:
1033 case IWN_SDID_5x00_3:
1034 case IWN_SDID_5x00_4:
1035 case IWN_SDID_5x00_9:
1036 case IWN_SDID_5x00_10:
1037 case IWN_SDID_5x00_11:
1038 case IWN_SDID_5x00_12:
1039 case IWN_SDID_5x00_17:
1040 case IWN_SDID_5x00_18:
1041 case IWN_SDID_5x00_19:
1042 case IWN_SDID_5x00_20:
1043 //iwl5100_agn_cfg
1044 sc->txchainmask = IWN_ANT_B;
1045 sc->rxchainmask = IWN_ANT_AB;
1046 break;
1047 case IWN_SDID_5x00_5:
1048 case IWN_SDID_5x00_6:
1049 case IWN_SDID_5x00_13:
1050 case IWN_SDID_5x00_14:
1051 case IWN_SDID_5x00_21:
1052 case IWN_SDID_5x00_22:
1053 //iwl5100_bgn_cfg
1054 sc->txchainmask = IWN_ANT_B;
1055 sc->rxchainmask = IWN_ANT_AB;
1056 break;
1057 case IWN_SDID_5x00_7:
1058 case IWN_SDID_5x00_8:
1059 case IWN_SDID_5x00_15:
1060 case IWN_SDID_5x00_16:
1061 case IWN_SDID_5x00_23:
1062 case IWN_SDID_5x00_24:
1063 //iwl5100_abg_cfg
1064 sc->txchainmask = IWN_ANT_B;
1065 sc->rxchainmask = IWN_ANT_AB;
1066 break;
1067 case IWN_SDID_5x00_25:
1068 case IWN_SDID_5x00_26:
1069 case IWN_SDID_5x00_27:
1070 case IWN_SDID_5x00_28:
1071 case IWN_SDID_5x00_29:
1072 case IWN_SDID_5x00_30:
1073 case IWN_SDID_5x00_31:
1074 case IWN_SDID_5x00_32:
1075 case IWN_SDID_5x00_33:
1076 case IWN_SDID_5x00_34:
1077 case IWN_SDID_5x00_35:
1078 case IWN_SDID_5x00_36:
1079 //iwl5300_agn_cfg
1080 sc->txchainmask = IWN_ANT_ABC;
1081 sc->rxchainmask = IWN_ANT_ABC;
1082 break;
1083 default:
1084 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1085 "0x%04x rev %d not supported (subdevice)\n", pid,
1086 sc->subdevice_id,sc->hw_type);
1087 return ENOTSUP;
1088 }
1089 break;
1090/* 5x50 Series */
1091 case IWN_DID_5x50_1:
1092 case IWN_DID_5x50_2:
1093 case IWN_DID_5x50_3:
1094 case IWN_DID_5x50_4:
1095 sc->limits = &iwn5000_sensitivity_limits;
1096 sc->base_params = &iwn5000_base_params;
1097 sc->fwname = "iwn5000fw";
1098 switch(sc->subdevice_id) {
1099 case IWN_SDID_5x50_1:
1100 case IWN_SDID_5x50_2:
1101 case IWN_SDID_5x50_3:
1102 //iwl5350_agn_cfg
1103 sc->limits = &iwn5000_sensitivity_limits;
1104 sc->base_params = &iwn5000_base_params;
1105 sc->fwname = "iwn5000fw";
1106 break;
1107 case IWN_SDID_5x50_4:
1108 case IWN_SDID_5x50_5:
1109 case IWN_SDID_5x50_8:
1110 case IWN_SDID_5x50_9:
1111 case IWN_SDID_5x50_10:
1112 case IWN_SDID_5x50_11:
1113 //iwl5150_agn_cfg
1114 case IWN_SDID_5x50_6:
1115 case IWN_SDID_5x50_7:
1116 case IWN_SDID_5x50_12:
1117 case IWN_SDID_5x50_13:
1118 //iwl5150_abg_cfg
1119 sc->limits = &iwn5000_sensitivity_limits;
1120 sc->fwname = "iwn5150fw";
1121 sc->base_params = &iwn_5x50_base_params;
1122 break;
1123 default:
1124 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1125 "0x%04x rev %d not supported (subdevice)\n", pid,
1126 sc->subdevice_id,sc->hw_type);
1127 return ENOTSUP;
1128 }
1129 break;
1130 default:
1131 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1132 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1133 sc->hw_type);
1134 return ENOTSUP;
1135 }
1136 return 0;
1137}
1138
1139static int
675iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
676{
677 struct iwn_ops *ops = &sc->ops;
678
679 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
680 ops->load_firmware = iwn4965_load_firmware;
681 ops->read_eeprom = iwn4965_read_eeprom;
682 ops->post_alive = iwn4965_post_alive;

--- 60 unchanged lines hidden (view full) ---

743 sc->schedsz = IWN5000_SCHEDSZ;
744 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
745 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
746 sc->fwsz = IWN5000_FWSZ;
747 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
748 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
749 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
750
1140iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1141{
1142 struct iwn_ops *ops = &sc->ops;
1143
1144 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1145 ops->load_firmware = iwn4965_load_firmware;
1146 ops->read_eeprom = iwn4965_read_eeprom;
1147 ops->post_alive = iwn4965_post_alive;

--- 60 unchanged lines hidden (view full) ---

1208 sc->schedsz = IWN5000_SCHEDSZ;
1209 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1210 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1211 sc->fwsz = IWN5000_FWSZ;
1212 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1213 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1214 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1215
751 switch (sc->hw_type) {
752 case IWN_HW_REV_TYPE_5100:
753 sc->limits = &iwn5000_sensitivity_limits;
754 sc->fwname = "iwn5000fw";
755 /* Override chains masks, ROM is known to be broken. */
756 sc->txchainmask = IWN_ANT_B;
757 sc->rxchainmask = IWN_ANT_AB;
758 /* Enable normal btcoex */
759 sc->sc_flags |= IWN_FLAG_BTCOEX;
760 break;
761 case IWN_HW_REV_TYPE_5150:
762 sc->limits = &iwn5150_sensitivity_limits;
763 sc->fwname = "iwn5150fw";
764 /* Enable normal btcoex */
765 sc->sc_flags |= IWN_FLAG_BTCOEX;
766 break;
767 case IWN_HW_REV_TYPE_5300:
768 case IWN_HW_REV_TYPE_5350:
769 sc->limits = &iwn5000_sensitivity_limits;
770 sc->fwname = "iwn5000fw";
771 /* Enable normal btcoex */
772 sc->sc_flags |= IWN_FLAG_BTCOEX;
773 break;
774 case IWN_HW_REV_TYPE_1000:
775 sc->limits = &iwn1000_sensitivity_limits;
776 sc->fwname = "iwn1000fw";
777 /* Enable normal btcoex */
778 sc->sc_flags |= IWN_FLAG_BTCOEX;
779 break;
780 case IWN_HW_REV_TYPE_6000:
781 sc->limits = &iwn6000_sensitivity_limits;
782 sc->fwname = "iwn6000fw";
783 /*
784 * Disable btcoex for 6200.
785 * XXX TODO: disable for 6205; no btcoex as well
786 * (6230/6235 - enable bluetooth)
787 */
788 if (pid != 0x422c) {
789 /* Enable normal btcoex */
790 sc->sc_flags |= IWN_FLAG_BTCOEX;
791 }
792 if (pid == 0x422c || pid == 0x4239) {
793 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
794 /* Override chains masks, ROM is known to be broken. */
795 sc->txchainmask = IWN_ANT_BC;
796 sc->rxchainmask = IWN_ANT_BC;
797 }
798 break;
799 case IWN_HW_REV_TYPE_6050:
800 sc->limits = &iwn6000_sensitivity_limits;
801 sc->fwname = "iwn6050fw";
802 /* Override chains masks, ROM is known to be broken. */
803 sc->txchainmask = IWN_ANT_AB;
804 sc->rxchainmask = IWN_ANT_AB;
805 /* Enable normal btcoex */
806 sc->sc_flags |= IWN_FLAG_BTCOEX;
807 break;
808 case IWN_HW_REV_TYPE_6005:
809 sc->limits = &iwn6000_sensitivity_limits;
810 if (pid != 0x0082 && pid != 0x0085) {
811 sc->fwname = "iwn6000g2bfw";
812 sc->sc_flags |= IWN_FLAG_ADV_BTCOEX;
813 } else {
814 sc->fwname = "iwn6000g2afw";
815 /*
816 * 6250 - disable bluetooth coexistence.
817 */
818 }
819 break;
820 default:
821 device_printf(sc->sc_dev, "adapter type %d not supported\n",
822 sc->hw_type);
823 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
824 return ENOTSUP;
825 }
826 if (sc->sc_flags & IWN_FLAG_BTCOEX)
827 device_printf(sc->sc_dev,
828 "enable basic bluetooth coexistence\n");
829 else if (sc->sc_flags & IWN_FLAG_ADV_BTCOEX)
830 device_printf(sc->sc_dev,
831 "enable advanced bluetooth coexistence\n");
832 else
833 device_printf(sc->sc_dev,
834 "disable bluetooth coexistence\n");
835 return 0;
836}
837
838/*
839 * Attach the interface to 802.11 radiotap.
840 */
841static void
842iwn_radiotap_attach(struct iwn_softc *sc)

--- 306 unchanged lines hidden (view full) ---

1149 if ((error = iwn_nic_lock(sc)) != 0)
1150 return error;
1151 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1152 DELAY(5);
1153 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1154 iwn_nic_unlock(sc);
1155
1156 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1216 return 0;
1217}
1218
1219/*
1220 * Attach the interface to 802.11 radiotap.
1221 */
1222static void
1223iwn_radiotap_attach(struct iwn_softc *sc)

--- 306 unchanged lines hidden (view full) ---

1530 if ((error = iwn_nic_lock(sc)) != 0)
1531 return error;
1532 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1533 DELAY(5);
1534 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1535 iwn_nic_unlock(sc);
1536
1537 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1157 if (sc->hw_type != IWN_HW_REV_TYPE_1000) {
1538 if (sc->base_params->shadow_ram_support) {
1158 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1159 IWN_RESET_LINK_PWR_MGMT_DIS);
1160 }
1161 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1162 /* Clear ECC status. */
1163 IWN_SETBITS(sc, IWN_OTP_GP,
1164 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1165
1166 /*
1167 * Find the block before last block (contains the EEPROM image)
1168 * for HW without OTP shadow RAM.
1169 */
1539 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1540 IWN_RESET_LINK_PWR_MGMT_DIS);
1541 }
1542 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1543 /* Clear ECC status. */
1544 IWN_SETBITS(sc, IWN_OTP_GP,
1545 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1546
1547 /*
1548 * Find the block before last block (contains the EEPROM image)
1549 * for HW without OTP shadow RAM.
1550 */
1170 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
1551 if (! sc->base_params->shadow_ram_support) {
1171 /* Switch to absolute addressing mode. */
1172 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1173 base = prev = 0;
1552 /* Switch to absolute addressing mode. */
1553 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1554 base = prev = 0;
1174 for (count = 0; count < IWN1000_OTP_NBLOCKS; count++) {
1555 for (count = 0; count < sc->base_params->max_ll_items;
1556 count++) {
1175 error = iwn_read_prom_data(sc, base, &next, 2);
1176 if (error != 0)
1177 return error;
1178 if (next == 0) /* End of linked-list. */
1179 break;
1180 prev = base;
1181 base = le16toh(next);
1182 }
1557 error = iwn_read_prom_data(sc, base, &next, 2);
1558 if (error != 0)
1559 return error;
1560 if (next == 0) /* End of linked-list. */
1561 break;
1562 prev = base;
1563 base = le16toh(next);
1564 }
1183 if (count == 0 || count == IWN1000_OTP_NBLOCKS)
1565 if (count == 0 || count == sc->base_params->max_ll_items)
1184 return EIO;
1185 /* Skip "next" word. */
1186 sc->prom_base = prev + 1;
1187 }
1188
1189 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1190
1191 return 0;

--- 633 unchanged lines hidden (view full) ---

1825 /* Read regulatory domain (4 ASCII characters). */
1826 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1827 base = le16toh(val);
1828 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
1829 sc->eeprom_domain, 4);
1830
1831 /* Read the list of authorized channels (20MHz ones only). */
1832 for (i = 0; i < IWN_NBANDS - 1; i++) {
1566 return EIO;
1567 /* Skip "next" word. */
1568 sc->prom_base = prev + 1;
1569 }
1570
1571 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1572
1573 return 0;

--- 633 unchanged lines hidden (view full) ---

2207 /* Read regulatory domain (4 ASCII characters). */
2208 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2209 base = le16toh(val);
2210 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2211 sc->eeprom_domain, 4);
2212
2213 /* Read the list of authorized channels (20MHz ones only). */
2214 for (i = 0; i < IWN_NBANDS - 1; i++) {
1833 if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
1834 addr = base + iwn6000_regulatory_bands[i];
1835 else
1836 addr = base + iwn5000_regulatory_bands[i];
2215 addr = base + sc->base_params->regulatory_bands[i];
1837 iwn_read_eeprom_channels(sc, i, addr);
1838 }
1839
1840 /* Read enhanced TX power information for 6000 Series. */
2216 iwn_read_eeprom_channels(sc, i, addr);
2217 }
2218
2219 /* Read enhanced TX power information for 6000 Series. */
1841 if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
2220 if (sc->base_params->enhanced_TX_power)
1842 iwn_read_eeprom_enhinfo(sc);
1843
1844 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
1845 base = le16toh(val);
1846 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
1847 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
1848 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
1849 hdr.version, hdr.pa_type, le16toh(hdr.volt));
1850 sc->calib_ver = hdr.version;
1851
2221 iwn_read_eeprom_enhinfo(sc);
2222
2223 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2224 base = le16toh(val);
2225 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2226 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2227 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2228 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2229 sc->calib_ver = hdr.version;
2230
2231 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2232 sc->eeprom_voltage = le16toh(hdr.volt);
2233 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2234 sc->eeprom_temp_high=le16toh(val);
2235 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2236 sc->eeprom_temp = le16toh(val);
2237 }
2238
1852 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
1853 /* Compute temperature offset. */
1854 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
1855 sc->eeprom_temp = le16toh(val);
1856 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
1857 volt = le16toh(val);
1858 sc->temp_off = sc->eeprom_temp - (volt / -5);
1859 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",

--- 833 unchanged lines hidden (view full) ---

2693 __func__);
2694 return;
2695 }
2696 len = (le32toh(desc->len) & 0x3fff) - 4;
2697 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2698
2699 switch (calib->code) {
2700 case IWN5000_PHY_CALIB_DC:
2239 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2240 /* Compute temperature offset. */
2241 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2242 sc->eeprom_temp = le16toh(val);
2243 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2244 volt = le16toh(val);
2245 sc->temp_off = sc->eeprom_temp - (volt / -5);
2246 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",

--- 833 unchanged lines hidden (view full) ---

3080 __func__);
3081 return;
3082 }
3083 len = (le32toh(desc->len) & 0x3fff) - 4;
3084 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3085
3086 switch (calib->code) {
3087 case IWN5000_PHY_CALIB_DC:
2701 if ((sc->sc_flags & IWN_FLAG_INTERNAL_PA) == 0 &&
2702 (sc->hw_type == IWN_HW_REV_TYPE_5150 ||
2703 sc->hw_type >= IWN_HW_REV_TYPE_6000) &&
2704 sc->hw_type != IWN_HW_REV_TYPE_6050)
3088 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
2705 idx = 0;
2706 break;
2707 case IWN5000_PHY_CALIB_LO:
3089 idx = 0;
3090 break;
3091 case IWN5000_PHY_CALIB_LO:
2708 idx = 1;
3092 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3093 idx = 1;
2709 break;
2710 case IWN5000_PHY_CALIB_TX_IQ:
3094 break;
3095 case IWN5000_PHY_CALIB_TX_IQ:
2711 idx = 2;
3096 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3097 idx = 2;
2712 break;
2713 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3098 break;
3099 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
2714 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
2715 sc->hw_type != IWN_HW_REV_TYPE_5150)
3100 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
2716 idx = 3;
2717 break;
2718 case IWN5000_PHY_CALIB_BASE_BAND:
3101 idx = 3;
3102 break;
3103 case IWN5000_PHY_CALIB_BASE_BAND:
2719 idx = 4;
3104 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3105 idx = 4;
2720 break;
2721 }
2722 if (idx == -1) /* Ignore other results. */
2723 return;
2724
2725 /* Save calibration result. */
2726 if (sc->calibcmd[idx].buf != NULL)
2727 free(sc->calibcmd[idx].buf, M_DEVBUF);
2728 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
2729 if (sc->calibcmd[idx].buf == NULL) {
2730 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2731 "not enough memory for calibration result %d\n",
2732 calib->code);
2733 return;
2734 }
2735 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3106 break;
3107 }
3108 if (idx == -1) /* Ignore other results. */
3109 return;
3110
3111 /* Save calibration result. */
3112 if (sc->calibcmd[idx].buf != NULL)
3113 free(sc->calibcmd[idx].buf, M_DEVBUF);
3114 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3115 if (sc->calibcmd[idx].buf == NULL) {
3116 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3117 "not enough memory for calibration result %d\n",
3118 calib->code);
3119 return;
3120 }
3121 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2736 "saving calibration result code=%d len=%d\n", calib->code, len);
3122 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
2737 sc->calibcmd[idx].len = len;
2738 memcpy(sc->calibcmd[idx].buf, calib, len);
2739}
2740
2741/*
2742 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
2743 * The latter is sent by the firmware after each received beacon.
2744 */

--- 197 unchanged lines hidden (view full) ---

2942
2943/*
2944 * Process a "command done" firmware notification. This is where we wakeup
2945 * processes waiting for a synchronous command completion.
2946 */
2947static void
2948iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
2949{
3123 sc->calibcmd[idx].len = len;
3124 memcpy(sc->calibcmd[idx].buf, calib, len);
3125}
3126
3127/*
3128 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3129 * The latter is sent by the firmware after each received beacon.
3130 */

--- 197 unchanged lines hidden (view full) ---

3328
3329/*
3330 * Process a "command done" firmware notification. This is where we wakeup
3331 * processes waiting for a synchronous command completion.
3332 */
3333static void
3334iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3335{
2950 struct iwn_tx_ring *ring = &sc->txq[4];
3336 struct iwn_tx_ring *ring;
2951 struct iwn_tx_data *data;
3337 struct iwn_tx_data *data;
3338 int cmd_queue_num;
2952
3339
2953 if ((desc->qid & 0xf) != 4)
3340 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3341 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3342 else
3343 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3344
3345 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
2954 return; /* Not a command ack. */
2955
3346 return; /* Not a command ack. */
3347
3348 ring = &sc->txq[cmd_queue_num];
2956 data = &ring->data[desc->idx];
2957
2958 /* If the command was mapped in an mbuf, free it. */
2959 if (data->m != NULL) {
2960 bus_dmamap_sync(ring->data_dmat, data->map,
2961 BUS_DMASYNC_POSTWRITE);
2962 bus_dmamap_unload(ring->data_dmat, data->map);
2963 m_freem(data->m);

--- 893 unchanged lines hidden (view full) ---

3857 m_freem(m);
3858 return error;
3859 }
3860 }
3861
3862 data->m = m;
3863 data->ni = ni;
3864
3349 data = &ring->data[desc->idx];
3350
3351 /* If the command was mapped in an mbuf, free it. */
3352 if (data->m != NULL) {
3353 bus_dmamap_sync(ring->data_dmat, data->map,
3354 BUS_DMASYNC_POSTWRITE);
3355 bus_dmamap_unload(ring->data_dmat, data->map);
3356 m_freem(data->m);

--- 893 unchanged lines hidden (view full) ---

4250 m_freem(m);
4251 return error;
4252 }
4253 }
4254
4255 data->m = m;
4256 data->ni = ni;
4257
3865 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
3866 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4258 DPRINTF(sc, IWN_DEBUG_XMIT,
4259 "%s: qid %d idx %d len %d nsegs %d rate %04x plcp 0x%08x\n",
4260 __func__,
4261 ring->qid,
4262 ring->cur,
4263 m->m_pkthdr.len,
4264 nsegs,
4265 rate,
4266 tx->rate);
3867
3868 /* Fill TX descriptor. */
3869 desc->nsegs = 1;
3870 if (m->m_len != 0)
3871 desc->nsegs += nsegs;
3872 /* First DMA segment is used by the TX command. */
3873 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3874 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |

--- 381 unchanged lines hidden (view full) ---

4256}
4257
4258/*
4259 * Send a command to the firmware.
4260 */
4261static int
4262iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
4263{
4267
4268 /* Fill TX descriptor. */
4269 desc->nsegs = 1;
4270 if (m->m_len != 0)
4271 desc->nsegs += nsegs;
4272 /* First DMA segment is used by the TX command. */
4273 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4274 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |

--- 381 unchanged lines hidden (view full) ---

4656}
4657
4658/*
4659 * Send a command to the firmware.
4660 */
4661static int
4662iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
4663{
4264 struct iwn_tx_ring *ring = &sc->txq[4];
4664 struct iwn_tx_ring *ring;
4265 struct iwn_tx_desc *desc;
4266 struct iwn_tx_data *data;
4267 struct iwn_tx_cmd *cmd;
4268 struct mbuf *m;
4269 bus_addr_t paddr;
4270 int totlen, error;
4665 struct iwn_tx_desc *desc;
4666 struct iwn_tx_data *data;
4667 struct iwn_tx_cmd *cmd;
4668 struct mbuf *m;
4669 bus_addr_t paddr;
4670 int totlen, error;
4671 int cmd_queue_num;
4271
4272 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4273
4274 if (async == 0)
4275 IWN_LOCK_ASSERT(sc);
4276
4672
4673 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4674
4675 if (async == 0)
4676 IWN_LOCK_ASSERT(sc);
4677
4678 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
4679 cmd_queue_num = IWN_PAN_CMD_QUEUE;
4680 else
4681 cmd_queue_num = IWN_CMD_QUEUE_NUM;
4682
4683 ring = &sc->txq[cmd_queue_num];
4277 desc = &ring->desc[ring->cur];
4278 data = &ring->data[ring->cur];
4279 totlen = 4 + size;
4280
4281 if (size > sizeof cmd->data) {
4282 /* Command is too large to fit in a descriptor. */
4283 if (totlen > MCLBYTES)
4284 return EINVAL;

--- 92 unchanged lines hidden (view full) ---

4377
4378 /* Use the first valid TX antenna. */
4379 txant = IWN_LSB(sc->txchainmask);
4380
4381 memset(&linkq, 0, sizeof linkq);
4382 linkq.id = wn->id;
4383 linkq.antmsk_1stream = txant;
4384 linkq.antmsk_2stream = IWN_ANT_AB;
4684 desc = &ring->desc[ring->cur];
4685 data = &ring->data[ring->cur];
4686 totlen = 4 + size;
4687
4688 if (size > sizeof cmd->data) {
4689 /* Command is too large to fit in a descriptor. */
4690 if (totlen > MCLBYTES)
4691 return EINVAL;

--- 92 unchanged lines hidden (view full) ---

4784
4785 /* Use the first valid TX antenna. */
4786 txant = IWN_LSB(sc->txchainmask);
4787
4788 memset(&linkq, 0, sizeof linkq);
4789 linkq.id = wn->id;
4790 linkq.antmsk_1stream = txant;
4791 linkq.antmsk_2stream = IWN_ANT_AB;
4385 linkq.ampdu_max = 64;
4792 linkq.ampdu_max = 32; /* XXX negotiated? */
4386 linkq.ampdu_threshold = 3;
4387 linkq.ampdu_limit = htole16(4000); /* 4ms */
4388
4389 /*
4390 * Are we using 11n rates? Ensure the channel is
4391 * 11n _and_ we have some 11n rates, or don't
4392 * try.
4393 */
4394 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
4395 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4396 is_11n = 1;
4397 } else {
4398 rs = &ni->ni_rates;
4399 is_11n = 0;
4400 }
4401
4402 /* Start at highest available bit-rate. */
4793 linkq.ampdu_threshold = 3;
4794 linkq.ampdu_limit = htole16(4000); /* 4ms */
4795
4796 /*
4797 * Are we using 11n rates? Ensure the channel is
4798 * 11n _and_ we have some 11n rates, or don't
4799 * try.
4800 */
4801 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
4802 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4803 is_11n = 1;
4804 } else {
4805 rs = &ni->ni_rates;
4806 is_11n = 0;
4807 }
4808
4809 /* Start at highest available bit-rate. */
4810 /*
4811 * XXX this is all very dirty!
4812 */
4403 if (is_11n)
4404 txrate = ni->ni_htrates.rs_nrates - 1;
4405 else
4406 txrate = rs->rs_nrates - 1;
4407 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
4408 uint32_t plcp;
4409
4410 if (is_11n)
4411 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
4412 else
4413 rate = RV(rs->rs_rates[txrate]);
4414
4813 if (is_11n)
4814 txrate = ni->ni_htrates.rs_nrates - 1;
4815 else
4816 txrate = rs->rs_nrates - 1;
4817 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
4818 uint32_t plcp;
4819
4820 if (is_11n)
4821 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
4822 else
4823 rate = RV(rs->rs_rates[txrate]);
4824
4825 DPRINTF(sc, IWN_DEBUG_XMIT,
4826 "%s: i=%d, txrate=%d, rate=0x%02x\n",
4827 __func__,
4828 i,
4829 txrate,
4830 rate);
4831
4415 /* Do rate -> PLCP config mapping */
4416 plcp = iwn_rate_to_plcp(sc, ni, rate);
4417 linkq.retry[i] = plcp;
4418
4419 /*
4420 * The mimo field is an index into the table which
4421 * indicates the first index where it and subsequent entries
4422 * will not be using MIMO.

--- 984 unchanged lines hidden (view full) ---

5407iwn_send_advanced_btcoex(struct iwn_softc *sc)
5408{
5409 static const uint32_t btcoex_3wire[12] = {
5410 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
5411 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
5412 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
5413 };
5414 struct iwn6000_btcoex_config btconfig;
4832 /* Do rate -> PLCP config mapping */
4833 plcp = iwn_rate_to_plcp(sc, ni, rate);
4834 linkq.retry[i] = plcp;
4835
4836 /*
4837 * The mimo field is an index into the table which
4838 * indicates the first index where it and subsequent entries
4839 * will not be using MIMO.

--- 984 unchanged lines hidden (view full) ---

5824iwn_send_advanced_btcoex(struct iwn_softc *sc)
5825{
5826 static const uint32_t btcoex_3wire[12] = {
5827 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
5828 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
5829 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
5830 };
5831 struct iwn6000_btcoex_config btconfig;
5832 struct iwn2000_btcoex_config btconfig2k;
5415 struct iwn_btcoex_priotable btprio;
5416 struct iwn_btcoex_prot btprot;
5417 int error, i;
5833 struct iwn_btcoex_priotable btprio;
5834 struct iwn_btcoex_prot btprot;
5835 int error, i;
5836 uint8_t flags;
5418
5419 memset(&btconfig, 0, sizeof btconfig);
5837
5838 memset(&btconfig, 0, sizeof btconfig);
5420 btconfig.flags = 145;
5421 btconfig.max_kill = 5;
5422 btconfig.bt3_t7_timer = 1;
5423 btconfig.kill_ack = htole32(0xffff0000);
5424 btconfig.kill_cts = htole32(0xffff0000);
5425 btconfig.sample_time = 2;
5426 btconfig.bt3_t2_timer = 0xc;
5427 for (i = 0; i < 12; i++)
5428 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
5429 btconfig.valid = htole16(0xff);
5430 btconfig.prio_boost = 0xf0;
5431 DPRINTF(sc, IWN_DEBUG_RESET,
5432 "%s: configuring advanced bluetooth coexistence\n", __func__);
5433 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig, sizeof(btconfig), 1);
5839 memset(&btconfig2k, 0, sizeof btconfig2k);
5840
5841 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
5842 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
5843
5844 if (sc->base_params->bt_sco_disable)
5845 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
5846 else
5847 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
5848
5849 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
5850
5851 /* Default flags result is 145 as old value */
5852
5853 /*
5854 * Flags value has to be review. Values must change if we
5855 * which to disable it
5856 */
5857 if (sc->base_params->bt_session_2) {
5858 btconfig2k.flags = flags;
5859 btconfig2k.max_kill = 5;
5860 btconfig2k.bt3_t7_timer = 1;
5861 btconfig2k.kill_ack = htole32(0xffff0000);
5862 btconfig2k.kill_cts = htole32(0xffff0000);
5863 btconfig2k.sample_time = 2;
5864 btconfig2k.bt3_t2_timer = 0xc;
5865
5866 for (i = 0; i < 12; i++)
5867 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
5868 btconfig2k.valid = htole16(0xff);
5869 btconfig2k.prio_boost = htole32(0xf0);
5870 DPRINTF(sc, IWN_DEBUG_RESET,
5871 "%s: configuring advanced bluetooth coexistence"
5872 " session 2, flags : 0x%x\n",
5873 __func__,
5874 flags);
5875 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
5876 sizeof(btconfig2k), 1);
5877 } else {
5878 btconfig.flags = flags;
5879 btconfig.max_kill = 5;
5880 btconfig.bt3_t7_timer = 1;
5881 btconfig.kill_ack = htole32(0xffff0000);
5882 btconfig.kill_cts = htole32(0xffff0000);
5883 btconfig.sample_time = 2;
5884 btconfig.bt3_t2_timer = 0xc;
5885
5886 for (i = 0; i < 12; i++)
5887 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
5888 btconfig.valid = htole16(0xff);
5889 btconfig.prio_boost = 0xf0;
5890 DPRINTF(sc, IWN_DEBUG_RESET,
5891 "%s: configuring advanced bluetooth coexistence,"
5892 " flags : 0x%x\n",
5893 __func__,
5894 flags);
5895 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
5896 sizeof(btconfig), 1);
5897 }
5898
5899
5434 if (error != 0)
5435 return error;
5436
5437 memset(&btprio, 0, sizeof btprio);
5438 btprio.calib_init1 = 0x6;
5439 btprio.calib_init2 = 0x7;
5440 btprio.calib_periodic_low1 = 0x2;
5441 btprio.calib_periodic_low2 = 0x3;

--- 38 unchanged lines hidden (view full) ---

5480 struct ifnet *ifp = sc->sc_ifp;
5481 struct ieee80211com *ic = ifp->if_l2com;
5482 uint32_t txmask;
5483 uint16_t rxchain;
5484 int error;
5485
5486 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5487
5900 if (error != 0)
5901 return error;
5902
5903 memset(&btprio, 0, sizeof btprio);
5904 btprio.calib_init1 = 0x6;
5905 btprio.calib_init2 = 0x7;
5906 btprio.calib_periodic_low1 = 0x2;
5907 btprio.calib_periodic_low2 = 0x3;

--- 38 unchanged lines hidden (view full) ---

5946 struct ifnet *ifp = sc->sc_ifp;
5947 struct ieee80211com *ic = ifp->if_l2com;
5948 uint32_t txmask;
5949 uint16_t rxchain;
5950 int error;
5951
5952 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5953
5488 if (sc->hw_type == IWN_HW_REV_TYPE_6005) {
5489 /* Set radio temperature sensor offset. */
5954 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
5955 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
5956 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
5957 " exclusive each together. Review NIC config file. Conf"
5958 " : 0x%08x Flags : 0x%08x \n", __func__,
5959 sc->base_params->calib_need,
5960 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
5961 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
5962 return (EINVAL);
5963 }
5964
5965 /* Compute temperature calib if needed. Will be send by send calib */
5966 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
5490 error = iwn5000_temp_offset_calib(sc);
5491 if (error != 0) {
5492 device_printf(sc->sc_dev,
5493 "%s: could not set temperature offset\n", __func__);
5967 error = iwn5000_temp_offset_calib(sc);
5968 if (error != 0) {
5969 device_printf(sc->sc_dev,
5970 "%s: could not set temperature offset\n", __func__);
5494 return error;
5971 return (error);
5495 }
5972 }
5973 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
5974 error = iwn5000_temp_offset_calibv2(sc);
5975 if (error != 0) {
5976 device_printf(sc->sc_dev,
5977 "%s: could not compute temperature offset v2\n",
5978 __func__);
5979 return (error);
5980 }
5496 }
5497
5498 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
5499 /* Configure runtime DC calibration. */
5500 error = iwn5000_runtime_calib(sc);
5501 if (error != 0) {
5502 device_printf(sc->sc_dev,
5503 "%s: could not configure runtime calibration\n",

--- 14 unchanged lines hidden (view full) ---

5518 "%s: could not configure valid TX chains, "
5519 "error %d\n", __func__, error);
5520 return error;
5521 }
5522 }
5523
5524 /* Configure bluetooth coexistence. */
5525 error = 0;
5981 }
5982
5983 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
5984 /* Configure runtime DC calibration. */
5985 error = iwn5000_runtime_calib(sc);
5986 if (error != 0) {
5987 device_printf(sc->sc_dev,
5988 "%s: could not configure runtime calibration\n",

--- 14 unchanged lines hidden (view full) ---

6003 "%s: could not configure valid TX chains, "
6004 "error %d\n", __func__, error);
6005 return error;
6006 }
6007 }
6008
6009 /* Configure bluetooth coexistence. */
6010 error = 0;
5526 if (sc->sc_flags & IWN_FLAG_ADV_BTCOEX)
6011
6012 /* Configure bluetooth coexistence if needed. */
6013 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
5527 error = iwn_send_advanced_btcoex(sc);
6014 error = iwn_send_advanced_btcoex(sc);
5528 else if (sc->sc_flags & IWN_FLAG_BTCOEX)
6015 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
5529 error = iwn_send_btcoex(sc);
6016 error = iwn_send_btcoex(sc);
6017
5530 if (error != 0) {
5531 device_printf(sc->sc_dev,
5532 "%s: could not configure bluetooth coexistence, error %d\n",
5533 __func__, error);
5534 return error;
5535 }
5536
5537 /* Set mode, channel, RX filter and enable RX. */

--- 792 unchanged lines hidden (view full) ---

6330 * Send calibration results to the runtime firmware. These results were
6331 * obtained on first boot from the initialization firmware.
6332 */
6333static int
6334iwn5000_send_calibration(struct iwn_softc *sc)
6335{
6336 int idx, error;
6337
6018 if (error != 0) {
6019 device_printf(sc->sc_dev,
6020 "%s: could not configure bluetooth coexistence, error %d\n",
6021 __func__, error);
6022 return error;
6023 }
6024
6025 /* Set mode, channel, RX filter and enable RX. */

--- 792 unchanged lines hidden (view full) ---

6818 * Send calibration results to the runtime firmware. These results were
6819 * obtained on first boot from the initialization firmware.
6820 */
6821static int
6822iwn5000_send_calibration(struct iwn_softc *sc)
6823{
6824 int idx, error;
6825
6338 for (idx = 0; idx < 5; idx++) {
6339 if (sc->calibcmd[idx].buf == NULL)
6340 continue; /* No results available. */
6826 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
6827 if (!(sc->base_params->calib_need & (1<<idx))) {
6828 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6829 "No need of calib %d\n",
6830 idx);
6831 continue; /* no need for this calib */
6832 }
6833 if (sc->calibcmd[idx].buf == NULL) {
6834 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6835 "Need calib idx : %d but no available data\n",
6836 idx);
6837 continue;
6838 }
6839
6341 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6342 "send calibration result idx=%d len=%d\n", idx,
6343 sc->calibcmd[idx].len);
6344 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
6345 sc->calibcmd[idx].len, 0);
6346 if (error != 0) {
6347 device_printf(sc->sc_dev,
6348 "%s: could not send calibration result, error %d\n",

--- 60 unchanged lines hidden (view full) ---

6409 cmd.offset = htole16(sc->eeprom_temp);
6410 else
6411 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
6412 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
6413 le16toh(cmd.offset));
6414 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6415}
6416
6840 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6841 "send calibration result idx=%d len=%d\n", idx,
6842 sc->calibcmd[idx].len);
6843 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
6844 sc->calibcmd[idx].len, 0);
6845 if (error != 0) {
6846 device_printf(sc->sc_dev,
6847 "%s: could not send calibration result, error %d\n",

--- 60 unchanged lines hidden (view full) ---

6908 cmd.offset = htole16(sc->eeprom_temp);
6909 else
6910 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
6911 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
6912 le16toh(cmd.offset));
6913 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6914}
6915
6916static int
6917iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
6918{
6919 struct iwn5000_phy_calib_temp_offsetv2 cmd;
6920
6921 memset(&cmd, 0, sizeof cmd);
6922 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
6923 cmd.ngroups = 1;
6924 cmd.isvalid = 1;
6925 if (sc->eeprom_temp != 0) {
6926 cmd.offset_low = htole16(sc->eeprom_temp);
6927 cmd.offset_high = htole16(sc->eeprom_temp_high);
6928 } else {
6929 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
6930 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
6931 }
6932 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
6933
6934 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6935 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
6936 le16toh(cmd.offset_low),
6937 le16toh(cmd.offset_high),
6938 le16toh(cmd.burnt_voltage_ref));
6939
6940 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6941}
6942
6417/*
6418 * This function is called after the runtime firmware notifies us of its
6419 * readiness (called in a process context).
6420 */
6421static int
6422iwn4965_post_alive(struct iwn_softc *sc)
6423{
6424 int error, qid;

--- 69 unchanged lines hidden (view full) ---

6494 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
6495
6496 /* Set physical address of TX scheduler rings (1KB aligned). */
6497 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
6498
6499 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
6500
6501 /* Enable chain mode for all queues, except command queue. */
6943/*
6944 * This function is called after the runtime firmware notifies us of its
6945 * readiness (called in a process context).
6946 */
6947static int
6948iwn4965_post_alive(struct iwn_softc *sc)
6949{
6950 int error, qid;

--- 69 unchanged lines hidden (view full) ---

7020 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7021
7022 /* Set physical address of TX scheduler rings (1KB aligned). */
7023 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7024
7025 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7026
7027 /* Enable chain mode for all queues, except command queue. */
6502 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7028 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7029 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7030 else
7031 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
6503 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
6504
6505 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
6506 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
6507 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
6508
6509 iwn_mem_write(sc, sc->sched_base +
6510 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);

--- 4 unchanged lines hidden (view full) ---

6515 }
6516
6517 /* Enable interrupts for all our 20 queues. */
6518 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
6519 /* Identify TX FIFO rings (0-7). */
6520 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
6521
6522 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7032 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7033
7034 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7035 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7036 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7037
7038 iwn_mem_write(sc, sc->sched_base +
7039 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);

--- 4 unchanged lines hidden (view full) ---

7044 }
7045
7046 /* Enable interrupts for all our 20 queues. */
7047 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7048 /* Identify TX FIFO rings (0-7). */
7049 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7050
7051 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
6523 for (qid = 0; qid < 7; qid++) {
6524 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
6525 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6526 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7052 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7053 /* Mark TX rings as active. */
7054 for (qid = 0; qid < 11; qid++) {
7055 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7056 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7057 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7058 }
7059 } else {
7060 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7061 for (qid = 0; qid < 7; qid++) {
7062 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7063 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7064 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7065 }
6527 }
6528 iwn_nic_unlock(sc);
6529
6530 /* Configure WiMAX coexistence for combo adapters. */
6531 error = iwn5000_send_wimax_coex(sc);
6532 if (error != 0) {
6533 device_printf(sc->sc_dev,
6534 "%s: could not configure WiMAX coexistence, error %d\n",

--- 496 unchanged lines hidden (view full) ---

7031 /* Retrieve PCIe Active State Power Management (ASPM). */
7032 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
7033 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
7034 if (reg & 0x02) /* L1 Entry enabled. */
7035 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
7036 else
7037 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
7038
7066 }
7067 iwn_nic_unlock(sc);
7068
7069 /* Configure WiMAX coexistence for combo adapters. */
7070 error = iwn5000_send_wimax_coex(sc);
7071 if (error != 0) {
7072 device_printf(sc->sc_dev,
7073 "%s: could not configure WiMAX coexistence, error %d\n",

--- 496 unchanged lines hidden (view full) ---

7570 /* Retrieve PCIe Active State Power Management (ASPM). */
7571 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
7572 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
7573 if (reg & 0x02) /* L1 Entry enabled. */
7574 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
7575 else
7576 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
7577
7039 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
7040 sc->hw_type <= IWN_HW_REV_TYPE_1000)
7041 IWN_SETBITS(sc, IWN_ANA_PLL, IWN_ANA_PLL_INIT);
7578 if (sc->base_params->pll_cfg_val)
7579 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
7042
7043 /* Wait for clock stabilization before accessing prph. */
7044 if ((error = iwn_clock_wait(sc)) != 0)
7045 return error;
7046
7047 if ((error = iwn_nic_lock(sc)) != 0)
7048 return error;
7049 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {

--- 95 unchanged lines hidden (view full) ---

7145 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
7146 }
7147 iwn_nic_unlock(sc);
7148
7149 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
7150 /* Use internal power amplifier only. */
7151 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
7152 }
7580
7581 /* Wait for clock stabilization before accessing prph. */
7582 if ((error = iwn_clock_wait(sc)) != 0)
7583 return error;
7584
7585 if ((error = iwn_nic_lock(sc)) != 0)
7586 return error;
7587 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {

--- 95 unchanged lines hidden (view full) ---

7683 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
7684 }
7685 iwn_nic_unlock(sc);
7686
7687 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
7688 /* Use internal power amplifier only. */
7689 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
7690 }
7153 if ((sc->hw_type == IWN_HW_REV_TYPE_6050 ||
7154 sc->hw_type == IWN_HW_REV_TYPE_6005) && sc->calib_ver >= 6) {
7691 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
7155 /* Indicate that ROM calibration version is >=6. */
7156 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
7157 }
7692 /* Indicate that ROM calibration version is >=6. */
7693 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
7694 }
7158 if (sc->hw_type == IWN_HW_REV_TYPE_6005)
7159 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_6050_1X2);
7695 if (sc->base_params->additional_gp_drv_bit)
7696 IWN_SETBITS(sc, IWN_GP_DRIVER,
7697 sc->base_params->additional_gp_drv_bit);
7160 return 0;
7161}
7162
7163/*
7164 * Take NIC ownership over Intel Active Management Technology (AMT).
7165 */
7166static int
7167iwn_hw_prepare(struct iwn_softc *sc)

--- 118 unchanged lines hidden (view full) ---

7286 /* Enable interrupts. */
7287 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
7288
7289 /* _Really_ make sure "radio off" bit is cleared! */
7290 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
7291 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
7292
7293 /* Enable shadow registers. */
7698 return 0;
7699}
7700
7701/*
7702 * Take NIC ownership over Intel Active Management Technology (AMT).
7703 */
7704static int
7705iwn_hw_prepare(struct iwn_softc *sc)

--- 118 unchanged lines hidden (view full) ---

7824 /* Enable interrupts. */
7825 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
7826
7827 /* _Really_ make sure "radio off" bit is cleared! */
7828 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
7829 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
7830
7831 /* Enable shadow registers. */
7294 if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
7832 if (sc->base_params->shadow_reg_enable)
7295 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
7296
7297 if ((error = ops->load_firmware(sc)) != 0) {
7298 device_printf(sc->sc_dev,
7299 "%s: could not load firmware, error %d\n", __func__,
7300 error);
7301 return error;
7302 }

--- 400 unchanged lines hidden --- 		7833 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
7834
7835 if ((error = ops->load_firmware(sc)) != 0) {
7836 device_printf(sc->sc_dev,
7837 "%s: could not load firmware, error %d\n", __func__,
7838 error);
7839 return error;
7840 }

--- 400 unchanged lines hidden ---