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ispvar.h (70825) ispvar.h (71079)
1/* $FreeBSD: head/sys/dev/isp/ispvar.h 70825 2001-01-09 02:49:02Z mjacob $ */
1/* $FreeBSD: head/sys/dev/isp/ispvar.h 71079 2001-01-15 18:40:37Z mjacob $ */
2/*
3 * Soft Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions

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261 * The first time the loop is seen up, loopid will match the index
262 * (except for fabric nodes which are above mapped above FC_SNS_ID
263 * and are completely virtual), but subsequent LIPs can cause things
264 * to move around.
265 */
266 struct lportdb {
267 u_int
268 loopid : 8,
2/*
3 * Soft Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions

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261 * The first time the loop is seen up, loopid will match the index
262 * (except for fabric nodes which are above mapped above FC_SNS_ID
263 * and are completely virtual), but subsequent LIPs can cause things
264 * to move around.
265 */
266 struct lportdb {
267 u_int
268 loopid : 8,
269 : 4,
269 : 2,
270 was_fabric_dev : 1,
271 fabric_dev : 1,
270 loggedin : 1,
271 roles : 2,
272 valid : 1;
273 u_int32_t portid;
274 u_int64_t node_wwn;
275 u_int64_t port_wwn;
276 } portdb[MAX_FC_TARG], tport[FL_PORT_ID];
277

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324 void * isp_param; /* type specific */
325 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */
326 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */
327 u_int16_t isp_maxcmds; /* max possible I/O cmds */
328 u_int8_t isp_type; /* HBA Chip Type */
329 u_int8_t isp_revision; /* HBA Chip H/W Revision */
330 u_int32_t isp_maxluns; /* maximum luns supported */
331
272 loggedin : 1,
273 roles : 2,
274 valid : 1;
275 u_int32_t portid;
276 u_int64_t node_wwn;
277 u_int64_t port_wwn;
278 } portdb[MAX_FC_TARG], tport[FL_PORT_ID];
279

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326 void * isp_param; /* type specific */
327 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */
328 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */
329 u_int16_t isp_maxcmds; /* max possible I/O cmds */
330 u_int8_t isp_type; /* HBA Chip Type */
331 u_int8_t isp_revision; /* HBA Chip H/W Revision */
332 u_int32_t isp_maxluns; /* maximum luns supported */
333
332 u_int32_t
333 isp_touched : 1, /* board ever seen? */
334 u_int32_t isp_clock : 8, /* input clock */
335 : 6,
336 isp_role : 2,
334 : 1,
337 : 1,
338 isp_touched : 1, /* board ever seen? */
335 isp_bustype : 1, /* SBus or PCI */
336 isp_loaded_fw : 1, /* loaded firmware */
339 isp_bustype : 1, /* SBus or PCI */
340 isp_loaded_fw : 1, /* loaded firmware */
337 isp_dblev : 12, /* debug log mask */
338 isp_clock : 8, /* input clock */
339 isp_confopts : 8; /* config options */
341 isp_dblev : 12; /* debug log mask */
342
343 u_int32_t isp_confopts; /* config options */
344
340 /*
341 * Instrumentation
342 */
343 u_int64_t isp_intcnt; /* total int count */
344 u_int64_t isp_intbogus; /* spurious int count */
345
346 /*
347 * Volatile state

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354 isp_sendmarker : 2, /* send a marker entry */
355 isp_update : 2, /* update parameters */
356 isp_nactive : 16; /* how many commands active */
357 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */
358 volatile u_int16_t isp_reqidx; /* index of next request */
359 volatile u_int16_t isp_residx; /* index of next result */
360 volatile u_int16_t isp_lasthdls; /* last handle seed */
361 volatile u_int16_t isp_mboxtmp[MAX_MAILBOX];
345 /*
346 * Instrumentation
347 */
348 u_int64_t isp_intcnt; /* total int count */
349 u_int64_t isp_intbogus; /* spurious int count */
350
351 /*
352 * Volatile state

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359 isp_sendmarker : 2, /* send a marker entry */
360 isp_update : 2, /* update parameters */
361 isp_nactive : 16; /* how many commands active */
362 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */
363 volatile u_int16_t isp_reqidx; /* index of next request */
364 volatile u_int16_t isp_residx; /* index of next result */
365 volatile u_int16_t isp_lasthdls; /* last handle seed */
366 volatile u_int16_t isp_mboxtmp[MAX_MAILBOX];
367 volatile u_int16_t isp_lastmbxcmd; /* last mbox command sent */
362
363 /*
364 * Active commands are stored here, indexed by handle functions.
365 */
366 XS_T **isp_xflist;
367
368 /*
369 * request/result queue pointers and dma handles for them.

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385#define ISP_INITSTATE 2
386#define ISP_RUNSTATE 3
387
388/*
389 * ISP Configuration Options
390 */
391#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
392#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
368
369 /*
370 * Active commands are stored here, indexed by handle functions.
371 */
372 XS_T **isp_xflist;
373
374 /*
375 * request/result queue pointers and dma handles for them.

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391#define ISP_INITSTATE 2
392#define ISP_RUNSTATE 3
393
394/*
395 * ISP Configuration Options
396 */
397#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
398#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
393#define ISP_CFG_NOINIT 0x20 /* just set defaults- don't init */
394#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
395#define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */
396#define ISP_CFG_PORT_PREF 0x0C /* Mask for Port Prefs (2200 only) */
397#define ISP_CFG_LPORT 0x00 /* prefer {N/F}L-Port connection */
398#define ISP_CFG_NPORT 0x04 /* prefer {N/F}-Port connection */
399#define ISP_CFG_NPORT_ONLY 0x08 /* insist on {N/F}-Port connection */
400#define ISP_CFG_LPORT_ONLY 0x0C /* insist on {N/F}L-Port connection */
401
402/*
399#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
400#define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */
401#define ISP_CFG_PORT_PREF 0x0C /* Mask for Port Prefs (2200 only) */
402#define ISP_CFG_LPORT 0x00 /* prefer {N/F}L-Port connection */
403#define ISP_CFG_NPORT 0x04 /* prefer {N/F}-Port connection */
404#define ISP_CFG_NPORT_ONLY 0x08 /* insist on {N/F}-Port connection */
405#define ISP_CFG_LPORT_ONLY 0x0C /* insist on {N/F}L-Port connection */
406
407/*
408 * Prior to calling isp_reset for the first time, the outer layer
409 * should set isp_role to one of NONE, INITIATOR, TARGET, BOTH.
410 *
411 * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded,
412 * NVRAM read, and defaults set, but any further initialization (e.g.
413 * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done.
414 *
415 * If INITIATOR MODE isn't set, attempts to run commands will be stopped
416 * at isp_start and completed with the moral equivalent of SELECTION TIMEOUT.
417 *
418 * If TARGET MODE is set, it doesn't mean that the rest of target mode support
419 * needs to be enabled, or will even work. What happens with the 2X00 cards
420 * here is that if you have enabled it with TARGET MODE as part of the ICB
421 * options, but you haven't given the f/w any ram resources for ATIOs or
422 * Immediate Notifies, the f/w just handles what it can and you never see
423 * anything. Basically, it sends a single byte of data (the first byte,
424 * which you can set as part of the INITIALIZE CONTROL BLOCK command) for
425 * INQUIRY, and sends back QUEUE FULL status for any other command.
426 *
427 */
428#define ISP_ROLE_NONE 0x0
429#define ISP_ROLE_INITIATOR 0x1
430#define ISP_ROLE_TARGET 0x2
431#define ISP_ROLE_BOTH (ISP_ROLE_TARGET|ISP_ROLE_INITIATOR)
432#define ISP_ROLE_EITHER ISP_ROLE_BOTH
433#ifndef ISP_DEFAULT_ROLES
434#define ISP_DEFAULT_ROLES ISP_ROLE_INITIATOR
435#endif
436
437
438/*
403 * Firmware related defines
404 */
439 * Firmware related defines
440 */
405#define ISP_CODE_ORG 0x1000 /* default f/w code start */
441#define ISP_CODE_ORG 0x1000 /* default f/w code start */
406#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
442#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
407#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
443#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
408
409/*
410 * Bus (implementation) types
411 */
412#define ISP_BT_PCI 0 /* PCI Implementations */
413#define ISP_BT_SBUS 1 /* SBus Implementations */
414
415/*

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444
445/*
446 * Bus (implementation) types
447 */
448#define ISP_BT_PCI 0 /* PCI Implementations */
449#define ISP_BT_SBUS 1 /* SBus Implementations */
450
451/*

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