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ispmbox.h (160080) ispmbox.h (163899)
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 160080 2006-07-03 08:24:09Z mjacob $ */
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 163899 2006-11-02 03:21:32Z mjacob $ */
2/*-
3 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997-2006 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions

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39#define MBOX_DUMP_RAM 0x0003
40#define MBOX_WRITE_RAM_WORD 0x0004
41#define MBOX_READ_RAM_WORD 0x0005
42#define MBOX_MAILBOX_REG_TEST 0x0006
43#define MBOX_VERIFY_CHECKSUM 0x0007
44#define MBOX_ABOUT_FIRMWARE 0x0008
45 /* 9 */
46 /* a */
2/*-
3 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997-2006 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions

--- 29 unchanged lines hidden (view full) ---

39#define MBOX_DUMP_RAM 0x0003
40#define MBOX_WRITE_RAM_WORD 0x0004
41#define MBOX_READ_RAM_WORD 0x0005
42#define MBOX_MAILBOX_REG_TEST 0x0006
43#define MBOX_VERIFY_CHECKSUM 0x0007
44#define MBOX_ABOUT_FIRMWARE 0x0008
45 /* 9 */
46 /* a */
47 /* b */
47#define MBOX_LOAD_RISC_RAM 0x000b
48 /* c */
49#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d
50#define MBOX_CHECK_FIRMWARE 0x000e
51#define MBOX_READ_RAM_WORD_EXTENDED 0x000f
52#define MBOX_INIT_REQ_QUEUE 0x0010
53#define MBOX_INIT_RES_QUEUE 0x0011
54#define MBOX_EXECUTE_IOCB 0x0012
55#define MBOX_WAKE_UP 0x0013

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118#define ENABLE_MANDATORY_DISC 0x0002
119#define MBOX_GET_TARGET_STATUS 0x0056
120
121/* These are for the ISP2X00 FC cards */
122#define MBOX_GET_LOOP_ID 0x0020
123#define MBOX_GET_FIRMWARE_OPTIONS 0x0028
124#define MBOX_SET_FIRMWARE_OPTIONS 0x0038
125#define MBOX_GET_RESOURCE_COUNT 0x0042
48 /* c */
49#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d
50#define MBOX_CHECK_FIRMWARE 0x000e
51#define MBOX_READ_RAM_WORD_EXTENDED 0x000f
52#define MBOX_INIT_REQ_QUEUE 0x0010
53#define MBOX_INIT_RES_QUEUE 0x0011
54#define MBOX_EXECUTE_IOCB 0x0012
55#define MBOX_WAKE_UP 0x0013

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118#define ENABLE_MANDATORY_DISC 0x0002
119#define MBOX_GET_TARGET_STATUS 0x0056
120
121/* These are for the ISP2X00 FC cards */
122#define MBOX_GET_LOOP_ID 0x0020
123#define MBOX_GET_FIRMWARE_OPTIONS 0x0028
124#define MBOX_SET_FIRMWARE_OPTIONS 0x0038
125#define MBOX_GET_RESOURCE_COUNT 0x0042
126#define MBOX_REQUEST_OFFLINE_MODE 0x0043
126#define MBOX_ENHANCED_GET_PDB 0x0047
127#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
128#define MBOX_INIT_FIRMWARE 0x0060
129#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
130#define MBOX_INIT_LIP 0x0062
131#define MBOX_GET_FC_AL_POSITION_MAP 0x0063
132#define MBOX_GET_PORT_DB 0x0064
133#define MBOX_CLEAR_ACA 0x0065

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143#define MBOX_SEND_CHANGE_REQUEST 0x0070
144#define MBOX_FABRIC_LOGOUT 0x0071
145#define MBOX_INIT_LIP_LOGIN 0x0072
146#define MBOX_LUN_RESET 0x007E
147
148#define MBOX_DRIVER_HEARTBEAT 0x005B
149#define MBOX_FW_HEARTBEAT 0x005C
150
127#define MBOX_ENHANCED_GET_PDB 0x0047
128#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
129#define MBOX_INIT_FIRMWARE 0x0060
130#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
131#define MBOX_INIT_LIP 0x0062
132#define MBOX_GET_FC_AL_POSITION_MAP 0x0063
133#define MBOX_GET_PORT_DB 0x0064
134#define MBOX_CLEAR_ACA 0x0065

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144#define MBOX_SEND_CHANGE_REQUEST 0x0070
145#define MBOX_FABRIC_LOGOUT 0x0071
146#define MBOX_INIT_LIP_LOGIN 0x0072
147#define MBOX_LUN_RESET 0x007E
148
149#define MBOX_DRIVER_HEARTBEAT 0x005B
150#define MBOX_FW_HEARTBEAT 0x005C
151
151#define MBOX_GET_SET_DATA_RATE 0x005D /* 23XX only */
152#define MBGSD_GET_RATE 0
153#define MBGSD_SET_RATE 1
152#define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */
153#define MBGSD_GET_RATE 0
154#define MBGSD_SET_RATE 1
155#define MBGSD_SET_RATE_NOW 2 /* 24XX only */
154#define MBGSD_ONEGB 0
155#define MBGSD_TWOGB 1
156#define MBGSD_AUTO 2
156#define MBGSD_ONEGB 0
157#define MBGSD_TWOGB 1
158#define MBGSD_AUTO 2
159#define MBGSD_FOURGB 3 /* 24XX only */
157
158
159#define ISP2100_SET_PCI_PARAM 0x00ff
160
161#define MBOX_BUSY 0x04
162
163/*
164 * Mailbox Command Complete Status Codes
165 */
166#define MBOX_COMMAND_COMPLETE 0x4000
167#define MBOX_INVALID_COMMAND 0x4001
168#define MBOX_HOST_INTERFACE_ERROR 0x4002
169#define MBOX_TEST_FAILED 0x4003
170#define MBOX_COMMAND_ERROR 0x4005
171#define MBOX_COMMAND_PARAM_ERROR 0x4006
172#define MBOX_PORT_ID_USED 0x4007
173#define MBOX_LOOP_ID_USED 0x4008
174#define MBOX_ALL_IDS_USED 0x4009
175#define MBOX_NOT_LOGGED_IN 0x400A
160
161
162#define ISP2100_SET_PCI_PARAM 0x00ff
163
164#define MBOX_BUSY 0x04
165
166/*
167 * Mailbox Command Complete Status Codes
168 */
169#define MBOX_COMMAND_COMPLETE 0x4000
170#define MBOX_INVALID_COMMAND 0x4001
171#define MBOX_HOST_INTERFACE_ERROR 0x4002
172#define MBOX_TEST_FAILED 0x4003
173#define MBOX_COMMAND_ERROR 0x4005
174#define MBOX_COMMAND_PARAM_ERROR 0x4006
175#define MBOX_PORT_ID_USED 0x4007
176#define MBOX_LOOP_ID_USED 0x4008
177#define MBOX_ALL_IDS_USED 0x4009
178#define MBOX_NOT_LOGGED_IN 0x400A
179/* pseudo mailbox completion codes */
180#define MBOX_REGS_BUSY 0x6000 /* registers in use */
181#define MBOX_TIMEOUT 0x6001 /* command timed out */
182
176#define MBLOGALL 0x000f
177#define MBLOGNONE 0x0000
178#define MBLOGMASK(x) ((x) & 0xf)
179
180/*
181 * Asynchronous event status codes
182 */
183#define ASYNC_BUS_RESET 0x8001

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194#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
195#define ASYNC_LIP_OCCURRED 0x8010
196#define ASYNC_LOOP_UP 0x8011
197#define ASYNC_LOOP_DOWN 0x8012
198#define ASYNC_LOOP_RESET 0x8013
199#define ASYNC_PDB_CHANGED 0x8014
200#define ASYNC_CHANGE_NOTIFY 0x8015
201#define ASYNC_LIP_F8 0x8016
183#define MBLOGALL 0x000f
184#define MBLOGNONE 0x0000
185#define MBLOGMASK(x) ((x) & 0xf)
186
187/*
188 * Asynchronous event status codes
189 */
190#define ASYNC_BUS_RESET 0x8001

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201#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
202#define ASYNC_LIP_OCCURRED 0x8010
203#define ASYNC_LOOP_UP 0x8011
204#define ASYNC_LOOP_DOWN 0x8012
205#define ASYNC_LOOP_RESET 0x8013
206#define ASYNC_PDB_CHANGED 0x8014
207#define ASYNC_CHANGE_NOTIFY 0x8015
208#define ASYNC_LIP_F8 0x8016
209#define ASYNC_LIP_ERROR 0x8017
210#define ASYNC_SECURITY_UPDATE 0x801B
202#define ASYNC_CMD_CMPLT 0x8020
203#define ASYNC_CTIO_DONE 0x8021
204#define ASYNC_IP_XMIT_DONE 0x8022
205#define ASYNC_IP_RECV_DONE 0x8023
206#define ASYNC_IP_BROADCAST 0x8024
207#define ASYNC_IP_RCVQ_LOW 0x8025
208#define ASYNC_IP_RCVQ_EMPTY 0x8026
209#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027

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216#define ASYNC_CONNMODE 0x8036
217#define ISP_CONN_LOOP 1
218#define ISP_CONN_PTP 2
219#define ISP_CONN_BADLIP 3
220#define ISP_CONN_FATAL 4
221#define ISP_CONN_LOOPBACK 5
222#define ASYNC_RIO_RESP 0x8040
223#define ASYNC_RIO_COMP 0x8042
211#define ASYNC_CMD_CMPLT 0x8020
212#define ASYNC_CTIO_DONE 0x8021
213#define ASYNC_IP_XMIT_DONE 0x8022
214#define ASYNC_IP_RECV_DONE 0x8023
215#define ASYNC_IP_BROADCAST 0x8024
216#define ASYNC_IP_RCVQ_LOW 0x8025
217#define ASYNC_IP_RCVQ_EMPTY 0x8026
218#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027

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225#define ASYNC_CONNMODE 0x8036
226#define ISP_CONN_LOOP 1
227#define ISP_CONN_PTP 2
228#define ISP_CONN_BADLIP 3
229#define ISP_CONN_FATAL 4
230#define ISP_CONN_LOOPBACK 5
231#define ASYNC_RIO_RESP 0x8040
232#define ASYNC_RIO_COMP 0x8042
233#define ASYNC_RCV_ERR 0x8048
234
224/*
225 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
226 * mailbox command to enable this.
227 */
228#define ASYNC_QFULL_SENT 0x8049
229
230/*
235/*
236 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
237 * mailbox command to enable this.
238 */
239#define ASYNC_QFULL_SENT 0x8049
240
241/*
231 * Mailbox Usages
242 * 24XX only
232 */
243 */
244#define ASYNC_RJT_SENT 0x8049
233
245
234#define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \
235 ISP_WRITE(isp, isp->isp_rqstinrp, value)
246/*
247 * All IOCB Queue entries are this size
248 */
249#define QENTRY_LEN 64
236
250
237#define READ_REQUEST_QUEUE_OUT_POINTER(isp) \
238 ISP_READ(isp, isp->isp_rqstoutrp)
239
240#define READ_RESPONSE_QUEUE_IN_POINTER(isp) \
241 ISP_READ(isp, isp->isp_respinrp)
242
243#define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \
244 ISP_WRITE(isp, isp->isp_respoutrp, value)
245
246/*
247 * Command Structure Definitions
248 */
249
250typedef struct {
251 uint32_t ds_base;
252 uint32_t ds_count;
253} ispds_t;

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283 uint8_t rqs_flags;
284} isphdr_t;
285
286/* RQS Flag definitions */
287#define RQSFLAG_CONTINUATION 0x01
288#define RQSFLAG_FULL 0x02
289#define RQSFLAG_BADHEADER 0x04
290#define RQSFLAG_BADPACKET 0x08
251/*
252 * Command Structure Definitions
253 */
254
255typedef struct {
256 uint32_t ds_base;
257 uint32_t ds_count;
258} ispds_t;

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288 uint8_t rqs_flags;
289} isphdr_t;
290
291/* RQS Flag definitions */
292#define RQSFLAG_CONTINUATION 0x01
293#define RQSFLAG_FULL 0x02
294#define RQSFLAG_BADHEADER 0x04
295#define RQSFLAG_BADPACKET 0x08
296#define RQSFLAG_MASK 0x0f
291
292/* RQS entry_type definitions */
293#define RQSTYPE_REQUEST 0x01
294#define RQSTYPE_DATASEG 0x02
295#define RQSTYPE_RESPONSE 0x03
296#define RQSTYPE_MARKER 0x04
297#define RQSTYPE_CMDONLY 0x05
298#define RQSTYPE_ATIO 0x06 /* Target Mode */
299#define RQSTYPE_CTIO 0x07 /* Target Mode */
300#define RQSTYPE_SCAM 0x08
301#define RQSTYPE_A64 0x09
302#define RQSTYPE_A64_CONT 0x0a
303#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
304#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
305#define RQSTYPE_NOTIFY 0x0d /* Target Mode */
306#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
307#define RQSTYPE_CTIO1 0x0f /* Target Mode */
308#define RQSTYPE_STATUS_CONT 0x10
309#define RQSTYPE_T2RQS 0x11
297
298/* RQS entry_type definitions */
299#define RQSTYPE_REQUEST 0x01
300#define RQSTYPE_DATASEG 0x02
301#define RQSTYPE_RESPONSE 0x03
302#define RQSTYPE_MARKER 0x04
303#define RQSTYPE_CMDONLY 0x05
304#define RQSTYPE_ATIO 0x06 /* Target Mode */
305#define RQSTYPE_CTIO 0x07 /* Target Mode */
306#define RQSTYPE_SCAM 0x08
307#define RQSTYPE_A64 0x09
308#define RQSTYPE_A64_CONT 0x0a
309#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
310#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
311#define RQSTYPE_NOTIFY 0x0d /* Target Mode */
312#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
313#define RQSTYPE_CTIO1 0x0f /* Target Mode */
314#define RQSTYPE_STATUS_CONT 0x10
315#define RQSTYPE_T2RQS 0x11
316#define RQSTYPE_CTIO7 0x12
310#define RQSTYPE_IP_XMIT 0x13
317#define RQSTYPE_IP_XMIT 0x13
318#define RQSTYPE_TSK_MGMT 0x14
311#define RQSTYPE_T4RQS 0x15
312#define RQSTYPE_ATIO2 0x16 /* Target Mode */
313#define RQSTYPE_CTIO2 0x17 /* Target Mode */
319#define RQSTYPE_T4RQS 0x15
320#define RQSTYPE_ATIO2 0x16 /* Target Mode */
321#define RQSTYPE_CTIO2 0x17 /* Target Mode */
314#define RQSTYPE_CSET0 0x18
322#define RQSTYPE_T7RQS 0x18
315#define RQSTYPE_T3RQS 0x19
316#define RQSTYPE_IP_XMIT_64 0x1b
317#define RQSTYPE_CTIO4 0x1e /* Target Mode */
318#define RQSTYPE_CTIO3 0x1f /* Target Mode */
319#define RQSTYPE_RIO1 0x21
320#define RQSTYPE_RIO2 0x22
321#define RQSTYPE_IP_RECV 0x23
322#define RQSTYPE_IP_RECV_CONT 0x24
323#define RQSTYPE_T3RQS 0x19
324#define RQSTYPE_IP_XMIT_64 0x1b
325#define RQSTYPE_CTIO4 0x1e /* Target Mode */
326#define RQSTYPE_CTIO3 0x1f /* Target Mode */
327#define RQSTYPE_RIO1 0x21
328#define RQSTYPE_RIO2 0x22
329#define RQSTYPE_IP_RECV 0x23
330#define RQSTYPE_IP_RECV_CONT 0x24
331#define RQSTYPE_CT_PASSTHRU 0x29
332#define RQSTYPE_ABORT_IO 0x33
333#define RQSTYPE_T6RQS 0x48
334#define RQSTYPE_LOGIN 0x52
335#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */
336#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */
323
324
325#define ISP_RQDSEG 4
326typedef struct {
327 isphdr_t req_header;
328 uint32_t req_handle;
329 uint8_t req_lun_trn;
330 uint8_t req_target;
331 uint16_t req_cdblen;
337
338
339#define ISP_RQDSEG 4
340typedef struct {
341 isphdr_t req_header;
342 uint32_t req_handle;
343 uint8_t req_lun_trn;
344 uint8_t req_target;
345 uint16_t req_cdblen;
332#define req_modifier req_cdblen /* marker packet */
333 uint16_t req_flags;
334 uint16_t req_reserved;
335 uint16_t req_time;
336 uint16_t req_seg_count;
337 uint8_t req_cdb[12];
338 ispds_t req_dataseg[ISP_RQDSEG];
339} ispreq_t;
346 uint16_t req_flags;
347 uint16_t req_reserved;
348 uint16_t req_time;
349 uint16_t req_seg_count;
350 uint8_t req_cdb[12];
351 ispds_t req_dataseg[ISP_RQDSEG];
352} ispreq_t;
340
341#define ispreq64_t ispreqt3_t /* same as.... */
342#define ISP_RQDSEG_A64 2
343
353#define ISP_RQDSEG_A64 2
354
344/*
345 * A request packet can also be a marker packet.
346 */
355typedef struct {
356 isphdr_t mrk_header;
357 uint32_t mrk_handle;
358 uint8_t mrk_reserved0;
359 uint8_t mrk_target;
360 uint16_t mrk_modifier;
361 uint16_t mrk_flags;
362 uint16_t mrk_lun;
363 uint8_t mrk_reserved1[48];
364} isp_marker_t;
365
366typedef struct {
367 isphdr_t mrk_header;
368 uint32_t mrk_handle;
369 uint16_t mrk_nphdl;
370 uint8_t mrk_modifier;
371 uint8_t mrk_reserved0;
372 uint8_t mrk_reserved1;
373 uint8_t mrk_vphdl;
374 uint16_t mrk_reserved2;
375 uint8_t mrk_lun[8];
376 uint8_t mrk_reserved3[40];
377} isp_marker_24xx_t;
378
379
347#define SYNC_DEVICE 0
348#define SYNC_TARGET 1
349#define SYNC_ALL 2
350#define SYNC_LIP 3
351
352#define ISP_RQDSEG_T2 3
353typedef struct {
354 isphdr_t req_header;
355 uint32_t req_handle;
356 uint8_t req_lun_trn;
357 uint8_t req_target;
358 uint16_t req_scclun;
359 uint16_t req_flags;
380#define SYNC_DEVICE 0
381#define SYNC_TARGET 1
382#define SYNC_ALL 2
383#define SYNC_LIP 3
384
385#define ISP_RQDSEG_T2 3
386typedef struct {
387 isphdr_t req_header;
388 uint32_t req_handle;
389 uint8_t req_lun_trn;
390 uint8_t req_target;
391 uint16_t req_scclun;
392 uint16_t req_flags;
360 uint16_t _res2;
393 uint16_t req_reserved;
361 uint16_t req_time;
362 uint16_t req_seg_count;
363 uint8_t req_cdb[16];
364 uint32_t req_totalcnt;
365 ispds_t req_dataseg[ISP_RQDSEG_T2];
366} ispreqt2_t;
367
368typedef struct {
369 isphdr_t req_header;
370 uint32_t req_handle;
371 uint16_t req_target;
372 uint16_t req_scclun;
373 uint16_t req_flags;
394 uint16_t req_time;
395 uint16_t req_seg_count;
396 uint8_t req_cdb[16];
397 uint32_t req_totalcnt;
398 ispds_t req_dataseg[ISP_RQDSEG_T2];
399} ispreqt2_t;
400
401typedef struct {
402 isphdr_t req_header;
403 uint32_t req_handle;
404 uint16_t req_target;
405 uint16_t req_scclun;
406 uint16_t req_flags;
374 uint16_t _res2;
407 uint16_t req_reserved;
375 uint16_t req_time;
376 uint16_t req_seg_count;
377 uint8_t req_cdb[16];
378 uint32_t req_totalcnt;
379 ispds_t req_dataseg[ISP_RQDSEG_T2];
380} ispreqt2e_t;
381
382#define ISP_RQDSEG_T3 2
383typedef struct {
384 isphdr_t req_header;
385 uint32_t req_handle;
386 uint8_t req_lun_trn;
387 uint8_t req_target;
388 uint16_t req_scclun;
389 uint16_t req_flags;
408 uint16_t req_time;
409 uint16_t req_seg_count;
410 uint8_t req_cdb[16];
411 uint32_t req_totalcnt;
412 ispds_t req_dataseg[ISP_RQDSEG_T2];
413} ispreqt2e_t;
414
415#define ISP_RQDSEG_T3 2
416typedef struct {
417 isphdr_t req_header;
418 uint32_t req_handle;
419 uint8_t req_lun_trn;
420 uint8_t req_target;
421 uint16_t req_scclun;
422 uint16_t req_flags;
390 uint16_t _res2;
423 uint16_t req_reserved;
391 uint16_t req_time;
392 uint16_t req_seg_count;
393 uint8_t req_cdb[16];
394 uint32_t req_totalcnt;
395 ispds64_t req_dataseg[ISP_RQDSEG_T3];
396} ispreqt3_t;
424 uint16_t req_time;
425 uint16_t req_seg_count;
426 uint8_t req_cdb[16];
427 uint32_t req_totalcnt;
428 ispds64_t req_dataseg[ISP_RQDSEG_T3];
429} ispreqt3_t;
430#define ispreq64_t ispreqt3_t /* same as.... */
397
398typedef struct {
399 isphdr_t req_header;
400 uint32_t req_handle;
401 uint16_t req_target;
402 uint16_t req_scclun;
403 uint16_t req_flags;
431
432typedef struct {
433 isphdr_t req_header;
434 uint32_t req_handle;
435 uint16_t req_target;
436 uint16_t req_scclun;
437 uint16_t req_flags;
404 uint16_t _res2;
438 uint16_t req_reserved;
405 uint16_t req_time;
406 uint16_t req_seg_count;
407 uint8_t req_cdb[16];
408 uint32_t req_totalcnt;
409 ispds64_t req_dataseg[ISP_RQDSEG_T3];
410} ispreqt3e_t;
411
412/* req_flag values */

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432
433typedef struct {
434 isphdr_t req_header;
435 uint32_t req_handle;
436 uint8_t req_lun_trn;
437 uint8_t req_target;
438 uint16_t req_cdblen;
439 uint16_t req_flags;
439 uint16_t req_time;
440 uint16_t req_seg_count;
441 uint8_t req_cdb[16];
442 uint32_t req_totalcnt;
443 ispds64_t req_dataseg[ISP_RQDSEG_T3];
444} ispreqt3e_t;
445
446/* req_flag values */

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466
467typedef struct {
468 isphdr_t req_header;
469 uint32_t req_handle;
470 uint8_t req_lun_trn;
471 uint8_t req_target;
472 uint16_t req_cdblen;
473 uint16_t req_flags;
440 uint16_t _res1;
474 uint16_t req_reserved;
441 uint16_t req_time;
442 uint16_t req_seg_count;
443 uint8_t req_cdb[44];
444} ispextreq_t;
445
475 uint16_t req_time;
476 uint16_t req_seg_count;
477 uint8_t req_cdb[44];
478} ispextreq_t;
479
480/* 24XX only */
481typedef struct {
482 uint16_t fcd_length;
483 uint16_t fcd_a1500;
484 uint16_t fcd_a3116;
485 uint16_t fcd_a4732;
486 uint16_t fcd_a6348;
487} fcp_cmnd_ds_t;
488
489typedef struct {
490 isphdr_t req_header;
491 uint32_t req_handle;
492 uint16_t req_nphdl;
493 uint16_t req_time;
494 uint16_t req_seg_count;
495 uint16_t req_fc_rsp_dsd_length;
496 uint8_t req_lun[8];
497 uint16_t req_flags;
498 uint16_t req_fc_cmnd_dsd_length;
499 uint16_t req_fc_cmnd_dsd_a1500;
500 uint16_t req_fc_cmnd_dsd_a3116;
501 uint16_t req_fc_cmnd_dsd_a4732;
502 uint16_t req_fc_cmnd_dsd_a6348;
503 uint16_t req_fc_rsp_dsd_a1500;
504 uint16_t req_fc_rsp_dsd_a3116;
505 uint16_t req_fc_rsp_dsd_a4732;
506 uint16_t req_fc_rsp_dsd_a6348;
507 uint32_t req_totalcnt;
508 uint16_t req_tidlo;
509 uint8_t req_tidhi;
510 uint8_t req_vpidx;
511 ispds64_t req_dataseg;
512} ispreqt6_t;
513
514typedef struct {
515 isphdr_t req_header;
516 uint32_t req_handle;
517 uint16_t req_nphdl;
518 uint16_t req_time;
519 uint16_t req_seg_count;
520 uint16_t req_reserved;
521 uint8_t req_lun[8];
522 uint8_t req_alen_datadir;
523 uint8_t req_task_management;
524 uint8_t req_task_attribute;
525 uint8_t req_crn;
526 uint8_t req_cdb[16];
527 uint32_t req_dl;
528 uint16_t req_tidlo;
529 uint8_t req_tidhi;
530 uint8_t req_vpidx;
531 ispds64_t req_dataseg;
532} ispreqt7_t;
533
534/* I/O Abort Structure */
535typedef struct {
536 isphdr_t abrt_header;
537 uint32_t abrt_handle;
538 uint16_t abrt_nphdl;
539 uint16_t abrt_options;
540 uint32_t abrt_cmd_handle;
541 uint8_t abrt_reserved[32];
542 uint16_t abrt_tidlo;
543 uint8_t abrt_tidhi;
544 uint8_t abrt_vpidx;
545 uint8_t abrt_reserved1[12];
546} isp24xx_abrt_t;
547#define ISP24XX_ABRT_NO_ABTS 0x01 /* don't actually send an ABTS */
548#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */
549
446#define ISP_CDSEG 7
447typedef struct {
448 isphdr_t req_header;
550#define ISP_CDSEG 7
551typedef struct {
552 isphdr_t req_header;
449 uint32_t _res1;
553 uint32_t req_reserved;
450 ispds_t req_dataseg[ISP_CDSEG];
451} ispcontreq_t;
452
453#define ISP_CDSEG64 5
454typedef struct {
455 isphdr_t req_header;
456 ispds64_t req_dataseg[ISP_CDSEG64];
457} ispcontreq64_t;

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466 uint16_t req_time;
467#define req_response_len req_time /* FC only */
468 uint16_t req_sense_len;
469 uint32_t req_resid;
470 uint8_t req_response[8]; /* FC only */
471 uint8_t req_sense_data[32];
472} ispstatusreq_t;
473
554 ispds_t req_dataseg[ISP_CDSEG];
555} ispcontreq_t;
556
557#define ISP_CDSEG64 5
558typedef struct {
559 isphdr_t req_header;
560 ispds64_t req_dataseg[ISP_CDSEG64];
561} ispcontreq64_t;

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570 uint16_t req_time;
571#define req_response_len req_time /* FC only */
572 uint16_t req_sense_len;
573 uint32_t req_resid;
574 uint8_t req_response[8]; /* FC only */
575 uint8_t req_sense_data[32];
576} ispstatusreq_t;
577
578/*
579 * Status Continuation
580 */
474typedef struct {
475 isphdr_t req_header;
476 uint8_t req_sense_data[60];
477} ispstatus_cont_t;
478
581typedef struct {
582 isphdr_t req_header;
583 uint8_t req_sense_data[60];
584} ispstatus_cont_t;
585
586/*
587 * 24XX Type 0 status
588 */
589typedef struct {
590 isphdr_t req_header;
591 uint32_t req_handle;
592 uint16_t req_completion_status;
593 uint16_t req_oxid;
594 uint32_t req_resid;
595 uint16_t req_reserved0;
596 uint16_t req_state_flags;
597 uint16_t req_reserved1;
598 uint16_t req_scsi_status;
599 uint32_t req_fcp_residual;
600 uint32_t req_sense_len;
601 uint32_t req_response_len;
602 uint8_t req_rsp_sense[28];
603} isp24xx_statusreq_t;
604
479/*
480 * For Qlogic 2X00, the high order byte of SCSI status has
481 * additional meaning.
482 */
483#define RQCS_RU 0x800 /* Residual Under */
484#define RQCS_RO 0x400 /* Residual Over */
485#define RQCS_RESID (RQCS_RU|RQCS_RO)
486#define RQCS_SV 0x200 /* Sense Length Valid */
487#define RQCS_RV 0x100 /* FCP Response Length Valid */
488
605/*
606 * For Qlogic 2X00, the high order byte of SCSI status has
607 * additional meaning.
608 */
609#define RQCS_RU 0x800 /* Residual Under */
610#define RQCS_RO 0x400 /* Residual Over */
611#define RQCS_RESID (RQCS_RU|RQCS_RO)
612#define RQCS_SV 0x200 /* Sense Length Valid */
613#define RQCS_RV 0x100 /* FCP Response Length Valid */
614
615/*
616 * CT Passthru IOCB
617 */
618typedef struct {
619 isphdr_t ctp_header;
620 uint32_t ctp_handle;
621 uint16_t ctp_status;
622 uint16_t ctp_nphdl; /* n-port handle */
623 uint16_t ctp_cmd_cnt; /* Command DSD count */
624 uint16_t ctp_vpidx; /* low 8 bits */
625 uint16_t ctp_time;
626 uint16_t ctp_reserved0;
627 uint16_t ctp_rsp_cnt; /* Response DSD count */
628 uint16_t ctp_reserved1[5];
629 uint32_t ctp_rsp_bcnt; /* Response byte count */
630 uint32_t ctp_cmd_bcnt; /* Command byte count */
631 ispds64_t ctp_dataseg[2];
632} isp_ct_pt_t;
633
489/*
490 * Completion Status Codes.
491 */
492#define RQCS_COMPLETE 0x0000
493#define RQCS_DMA_ERROR 0x0002
494#define RQCS_RESET_OCCURRED 0x0004
495#define RQCS_ABORTED 0x0005
496#define RQCS_TIMEOUT 0x0006

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525#define RQCS_LVD_BUSERR 0x0021
526
527/* 2X00 Only Completion Codes */
528#define RQCS_PORT_UNAVAILABLE 0x0028
529#define RQCS_PORT_LOGGED_OUT 0x0029
530#define RQCS_PORT_CHANGED 0x002A
531#define RQCS_PORT_BUSY 0x002B
532
634/*
635 * Completion Status Codes.
636 */
637#define RQCS_COMPLETE 0x0000
638#define RQCS_DMA_ERROR 0x0002
639#define RQCS_RESET_OCCURRED 0x0004
640#define RQCS_ABORTED 0x0005
641#define RQCS_TIMEOUT 0x0006

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670#define RQCS_LVD_BUSERR 0x0021
671
672/* 2X00 Only Completion Codes */
673#define RQCS_PORT_UNAVAILABLE 0x0028
674#define RQCS_PORT_LOGGED_OUT 0x0029
675#define RQCS_PORT_CHANGED 0x002A
676#define RQCS_PORT_BUSY 0x002B
677
678/* 24XX Only Completion Codes */
679#define RQCS_24XX_DRE 0x0011 /* data reassembly error */
680#define RQCS_24XX_TABORT 0x0013 /* aborted by target */
681#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */
682#define RQCS_24XX_TMO 0x0030 /* task management overrun */
683
684
533/*
534 * 1X00 specific State Flags
535 */
536#define RQSF_GOT_BUS 0x0100
537#define RQSF_GOT_TARGET 0x0200
538#define RQSF_SENT_CDB 0x0400
539#define RQSF_XFRD_DATA 0x0800
540#define RQSF_GOT_STATUS 0x1000

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582 * Miscellaneous
583 */
584#ifndef ISP_EXEC_THROTTLE
585#define ISP_EXEC_THROTTLE 16
586#endif
587
588/*
589 * About Firmware returns an 'attribute' word in mailbox 6.
685/*
686 * 1X00 specific State Flags
687 */
688#define RQSF_GOT_BUS 0x0100
689#define RQSF_GOT_TARGET 0x0200
690#define RQSF_SENT_CDB 0x0400
691#define RQSF_XFRD_DATA 0x0800
692#define RQSF_GOT_STATUS 0x1000

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734 * Miscellaneous
735 */
736#ifndef ISP_EXEC_THROTTLE
737#define ISP_EXEC_THROTTLE 16
738#endif
739
740/*
741 * About Firmware returns an 'attribute' word in mailbox 6.
742 * These attributes are for 2200 and 2300.
590 */
591#define ISP_FW_ATTR_TMODE 0x01
592#define ISP_FW_ATTR_SCCLUN 0x02
593#define ISP_FW_ATTR_FABRIC 0x04
594#define ISP_FW_ATTR_CLASS2 0x08
595#define ISP_FW_ATTR_FCTAPE 0x10
596#define ISP_FW_ATTR_IP 0x20
597#define ISP_FW_ATTR_VI 0x40
598#define ISP_FW_ATTR_VI_SOLARIS 0x80
599#define ISP_FW_ATTR_2KLOGINS 0x100 /* XXX: just a guess */
600
743 */
744#define ISP_FW_ATTR_TMODE 0x01
745#define ISP_FW_ATTR_SCCLUN 0x02
746#define ISP_FW_ATTR_FABRIC 0x04
747#define ISP_FW_ATTR_CLASS2 0x08
748#define ISP_FW_ATTR_FCTAPE 0x10
749#define ISP_FW_ATTR_IP 0x20
750#define ISP_FW_ATTR_VI 0x40
751#define ISP_FW_ATTR_VI_SOLARIS 0x80
752#define ISP_FW_ATTR_2KLOGINS 0x100 /* XXX: just a guess */
753
601#define IS_2KLOGIN(isp) \
602 (IS_FC(isp) && (FCPARAM(isp)->isp_fwattr & ISP_FW_ATTR_2KLOGINS))
754/* and these are for the 2400 */
755#define ISP2400_FW_ATTR_CLASS2 (1 << 0)
756#define ISP2400_FW_ATTR_IP (1 << 1)
757#define ISP2400_FW_ATTR_MULTIID (1 << 2)
758#define ISP2400_FW_ATTR_SB2 (1 << 3)
759#define ISP2400_FW_ATTR_T10CRC (1 << 4)
760#define ISP2400_FW_ATTR_VI (1 << 5)
761#define ISP2400_FW_ATTR_EXPFW (1 << 13)
603
604/*
605 * Reduced Interrupt Operation Response Queue Entreis
606 */
607
608typedef struct {
609 isphdr_t req_header;
610 uint32_t req_handles[15];
611} isp_rio1_t;
612
613typedef struct {
614 isphdr_t req_header;
615 uint16_t req_handles[30];
616} isp_rio2_t;
617
618/*
762
763/*
764 * Reduced Interrupt Operation Response Queue Entreis
765 */
766
767typedef struct {
768 isphdr_t req_header;
769 uint32_t req_handles[15];
770} isp_rio1_t;
771
772typedef struct {
773 isphdr_t req_header;
774 uint16_t req_handles[30];
775} isp_rio2_t;
776
777/*
619 * FC (ISP2100) specific data structures
778 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
620 */
621
622/*
623 * Initialization Control Block
624 *
625 * Version One (prime) format.
626 */
779 */
780
781/*
782 * Initialization Control Block
783 *
784 * Version One (prime) format.
785 */
627typedef struct isp_icb {
786typedef struct {
628 uint8_t icb_version;
787 uint8_t icb_version;
629 uint8_t _reserved0;
788 uint8_t icb_reserved0;
630 uint16_t icb_fwoptions;
631 uint16_t icb_maxfrmlen;
632 uint16_t icb_maxalloc;
633 uint16_t icb_execthrottle;
634 uint8_t icb_retry_count;
635 uint8_t icb_retry_delay;
636 uint8_t icb_portname[8];
637 uint16_t icb_hardaddr;

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643 uint16_t icb_rqstqlen;
644 uint16_t icb_rsltqlen;
645 uint16_t icb_rqstaddr[4];
646 uint16_t icb_respaddr[4];
647 uint16_t icb_lunenables;
648 uint8_t icb_ccnt;
649 uint8_t icb_icnt;
650 uint16_t icb_lunetimeout;
789 uint16_t icb_fwoptions;
790 uint16_t icb_maxfrmlen;
791 uint16_t icb_maxalloc;
792 uint16_t icb_execthrottle;
793 uint8_t icb_retry_count;
794 uint8_t icb_retry_delay;
795 uint8_t icb_portname[8];
796 uint16_t icb_hardaddr;

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802 uint16_t icb_rqstqlen;
803 uint16_t icb_rsltqlen;
804 uint16_t icb_rqstaddr[4];
805 uint16_t icb_respaddr[4];
806 uint16_t icb_lunenables;
807 uint8_t icb_ccnt;
808 uint8_t icb_icnt;
809 uint16_t icb_lunetimeout;
651 uint16_t _reserved1;
810 uint16_t icb_reserved1;
652 uint16_t icb_xfwoptions;
653 uint8_t icb_racctimer;
654 uint8_t icb_idelaytimer;
655 uint16_t icb_zfwoptions;
811 uint16_t icb_xfwoptions;
812 uint8_t icb_racctimer;
813 uint8_t icb_idelaytimer;
814 uint16_t icb_zfwoptions;
656 uint16_t _reserved2[13];
815 uint16_t icb_reserved2[13];
657} isp_icb_t;
816} isp_icb_t;
817
658#define ICB_VERSION1 1
659
818#define ICB_VERSION1 1
819
660#define ICBOPT_HARD_ADDRESS 0x0001
661#define ICBOPT_FAIRNESS 0x0002
662#define ICBOPT_FULL_DUPLEX 0x0004
663#define ICBOPT_FAST_POST 0x0008
664#define ICBOPT_TGT_ENABLE 0x0010
665#define ICBOPT_INI_DISABLE 0x0020
666#define ICBOPT_INI_ADISC 0x0040
667#define ICBOPT_INI_TGTTYPE 0x0080
668#define ICBOPT_PDBCHANGE_AE 0x0100
669#define ICBOPT_NOLIP 0x0200
670#define ICBOPT_SRCHDOWN 0x0400
671#define ICBOPT_PREVLOOP 0x0800
672#define ICBOPT_STOP_ON_QFULL 0x1000
673#define ICBOPT_FULL_LOGIN 0x2000
674#define ICBOPT_BOTH_WWNS 0x4000
675#define ICBOPT_EXTENDED 0x8000
820#define ICBOPT_EXTENDED 0x8000
821#define ICBOPT_BOTH_WWNS 0x4000
822#define ICBOPT_FULL_LOGIN 0x2000
823#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */
824#define ICBOPT_PREVLOOP 0x0800
825#define ICBOPT_SRCHDOWN 0x0400
826#define ICBOPT_NOLIP 0x0200
827#define ICBOPT_PDBCHANGE_AE 0x0100
828#define ICBOPT_INI_TGTTYPE 0x0080
829#define ICBOPT_INI_ADISC 0x0040
830#define ICBOPT_INI_DISABLE 0x0020
831#define ICBOPT_TGT_ENABLE 0x0010
832#define ICBOPT_FAST_POST 0x0008
833#define ICBOPT_FULL_DUPLEX 0x0004
834#define ICBOPT_FAIRNESS 0x0002
835#define ICBOPT_HARD_ADDRESS 0x0001
676
836
837#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */
838#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */
839#define ICBXOPT_FCTAPE_CONFIRM 0x2000
840#define ICBXOPT_FCTAPE 0x1000
677#define ICBXOPT_CLASS2_ACK0 0x0200
678#define ICBXOPT_CLASS2 0x0100
841#define ICBXOPT_CLASS2_ACK0 0x0200
842#define ICBXOPT_CLASS2 0x0100
679#define ICBXOPT_LOOP_ONLY (0 << 4)
680#define ICBXOPT_PTP_ONLY (1 << 4)
681#define ICBXOPT_LOOP_2_PTP (2 << 4)
682#define ICBXOPT_PTP_2_LOOP (3 << 4)
683
843#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */
844#define ICBXOPT_TOPO_MASK 0x0070
845#define ICBXOPT_LOOP_ONLY 0x0000
846#define ICBXOPT_PTP_ONLY 0x0010
847#define ICBXOPT_LOOP_2_PTP 0x0020
848#define ICBXOPT_PTP_2_LOOP 0x0030
684/*
685 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
849/*
850 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
686 * RIO is not defined for the 23XX cards
851 * RIO is not defined for the 23XX cards (just 2200)
687 */
688#define ICBXOPT_RIO_OFF 0
689#define ICBXOPT_RIO_16BIT 1
690#define ICBXOPT_RIO_32BIT 2
691#define ICBXOPT_RIO_16BIT_IOCB 3
692#define ICBXOPT_RIO_32BIT_IOCB 4
693#define ICBXOPT_ZIO 5
694#define ICBXOPT_TIMER_MASK 0x7
695
852 */
853#define ICBXOPT_RIO_OFF 0
854#define ICBXOPT_RIO_16BIT 1
855#define ICBXOPT_RIO_32BIT 2
856#define ICBXOPT_RIO_16BIT_IOCB 3
857#define ICBXOPT_RIO_32BIT_IOCB 4
858#define ICBXOPT_ZIO 5
859#define ICBXOPT_TIMER_MASK 0x7
860
696#define ICBZOPT_ENA_RDXFR_RDY 0x01
697#define ICBZOPT_ENA_OOF (1 << 6) /* out of order frame handling */
698#define ICBZOPT_50_OHM 0x0200
699/* These 3 only apply to the 2300 */
700#define ICBZOPT_RATE_ONEGB (MBGSD_ONEGB << 14)
701#define ICBZOPT_RATE_TWOGB (MBGSD_TWOGB << 14)
702#define ICBZOPT_RATE_AUTO (MBGSD_AUTO << 14)
861#define ICBZOPT_RATE_MASK 0xC000
862#define ICBZOPT_RATE_ONEGB 0x0000
863#define ICBZOPT_RATE_AUTO 0x8000
864#define ICBZOPT_RATE_TWOGB 0x4000
865#define ICBZOPT_50_OHM 0x2000
866#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */
867#define ICBZOPT_RSPSZ_MASK 0x0030
868#define ICBZOPT_RSPSZ_24 0x0000
869#define ICBZOPT_RSPSZ_12 0x0010
870#define ICBZOPT_RSPSZ_24A 0x0020
871#define ICBZOPT_RSPSZ_32 0x0030
872#define ICBZOPT_SOFTID 0x0002
873#define ICBZOPT_ENA_RDXFR_RDY 0x0001
703
874
875/* 2400 F/W options */
876#define ICB2400_OPT1_BOTH_WWNS 0x00004000
877#define ICB2400_OPT1_FULL_LOGIN 0x00002000
878#define ICB2400_OPT1_PREVLOOP 0x00000800
879#define ICB2400_OPT1_SRCHDOWN 0x00000400
880#define ICB2400_OPT1_NOLIP 0x00000200
881#define ICB2400_OPT1_INI_DISABLE 0x00000020
882#define ICB2400_OPT1_TGT_ENABLE 0x00000010
883#define ICB2400_OPT1_FULL_DUPLEX 0x00000004
884#define ICB2400_OPT1_FAIRNESS 0x00000002
885#define ICB2400_OPT1_HARD_ADDRESS 0x00000001
704
886
887#define ICB2400_OPT2_FCTAPE 0x00001000
888#define ICB2400_OPT2_CLASS2_ACK0 0x00000200
889#define ICB2400_OPT2_CLASS2 0x00000100
890#define ICB2400_OPT2_NO_PLAY 0x00000080
891#define ICB2400_OPT2_TOPO_MASK 0x00000070
892#define ICB2400_OPT2_LOOP_ONLY 0x00000000
893#define ICB2400_OPT2_PTP_ONLY 0x00000010
894#define ICB2400_OPT2_LOOP_2_PTP 0x00000020
895#define ICB2400_OPT2_PTP_2_LOOP 0x00000030
896#define ICB2400_OPT2_TIMER_MASK 0x00000007
897#define ICB2400_OPT2_ZIO 0x00000005
898#define ICB2400_OPT2_ZIO1 0x00000006
899
900#define ICB2400_OPT3_75_OHM 0x00010000
901#define ICB2400_OPT3_RATE_MASK 0x0000E000
902#define ICB2400_OPT3_RATE_ONEGB 0x00000000
903#define ICB2400_OPT3_RATE_TWOGB 0x00002000
904#define ICB2400_OPT3_RATE_AUTO 0x00004000
905#define ICB2400_OPT3_RATE_FOURGB 0x00006000
906#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200
907#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080
908#define ICB2400_OPT3_ENA_OOF 0x00000040
909/* note that a response size flag of zero is reserved! */
910#define ICB2400_OPT3_RSPSZ_MASK 0x00000030
911#define ICB2400_OPT3_RSPSZ_12 0x00000010
912#define ICB2400_OPT3_RSPSZ_24 0x00000020
913#define ICB2400_OPT3_RSPSZ_32 0x00000030
914#define ICB2400_OPT3_SOFTID 0x00000002
915
705#define ICB_MIN_FRMLEN 256
706#define ICB_MAX_FRMLEN 2112
707#define ICB_DFLT_FRMLEN 1024
708#define ICB_DFLT_ALLOC 256
709#define ICB_DFLT_THROTTLE 16
710#define ICB_DFLT_RDELAY 5
711#define ICB_DFLT_RCOUNT 3
712
713#define ICB_LOGIN_TOV 30
714#define ICB_LUN_ENABLE_TOV 180
715
716
916#define ICB_MIN_FRMLEN 256
917#define ICB_MAX_FRMLEN 2112
918#define ICB_DFLT_FRMLEN 1024
919#define ICB_DFLT_ALLOC 256
920#define ICB_DFLT_THROTTLE 16
921#define ICB_DFLT_RDELAY 5
922#define ICB_DFLT_RCOUNT 3
923
924#define ICB_LOGIN_TOV 30
925#define ICB_LUN_ENABLE_TOV 180
926
927
928/*
929 * And somebody at QLogic had a great idea that you could just change
930 * the structure *and* keep the version number the same as the other cards.
931 */
932typedef struct {
933 uint16_t icb_version;
934 uint16_t icb_reserved0;
935 uint16_t icb_maxfrmlen;
936 uint16_t icb_execthrottle;
937 uint16_t icb_xchgcnt;
938 uint16_t icb_hardaddr;
939 uint8_t icb_portname[8];
940 uint8_t icb_nodename[8];
941 uint16_t icb_rspnsin;
942 uint16_t icb_rqstout;
943 uint16_t icb_retry_count;
944 uint16_t icb_priout;
945 uint16_t icb_rsltqlen;
946 uint16_t icb_rqstqlen;
947 uint16_t icb_ldn_nols;
948 uint16_t icb_prqstqlen;
949 uint16_t icb_rqstaddr[4];
950 uint16_t icb_respaddr[4];
951 uint16_t icb_priaddr[4];
952 uint16_t icb_reserved1[4];
953 uint16_t icb_atio_in;
954 uint16_t icb_atioqlen;
955 uint16_t icb_atioqaddr[4];
956 uint16_t icb_idelaytimer;
957 uint16_t icb_logintime;
958 uint32_t icb_fwoptions1;
959 uint32_t icb_fwoptions2;
960 uint32_t icb_fwoptions3;
961 uint16_t icb_reserved2[12];
962} isp_icb_2400_t;
717
718#define RQRSP_ADDR0015 0
719#define RQRSP_ADDR1631 1
720#define RQRSP_ADDR3247 2
721#define RQRSP_ADDR4863 3
722
723
724#define ICB_NNM0 7

--- 21 unchanged lines hidden (view full) ---

746 ((uint64_t) array[ICB_NNM2] << 16) | \
747 ((uint64_t) array[ICB_NNM3] << 24) | \
748 ((uint64_t) array[ICB_NNM4] << 32) | \
749 ((uint64_t) array[ICB_NNM5] << 40) | \
750 ((uint64_t) array[ICB_NNM6] << 48) | \
751 ((uint64_t) array[ICB_NNM7] << 56)
752
753/*
963
964#define RQRSP_ADDR0015 0
965#define RQRSP_ADDR1631 1
966#define RQRSP_ADDR3247 2
967#define RQRSP_ADDR4863 3
968
969
970#define ICB_NNM0 7

--- 21 unchanged lines hidden (view full) ---

992 ((uint64_t) array[ICB_NNM2] << 16) | \
993 ((uint64_t) array[ICB_NNM3] << 24) | \
994 ((uint64_t) array[ICB_NNM4] << 32) | \
995 ((uint64_t) array[ICB_NNM5] << 40) | \
996 ((uint64_t) array[ICB_NNM6] << 48) | \
997 ((uint64_t) array[ICB_NNM7] << 56)
998
999/*
754 * FC-AL Position Map
755 *
756 * This is an at most 128 byte map that returns either
757 * the LILP or Firmware generated list of ports.
758 *
759 * We deviate a bit from the returned qlogic format to
760 * use an extra bit to say whether this was a LILP or
761 * f/w generated map.
762 */
763typedef struct {
764 uint8_t fwmap : 1,
765 count : 7;
766 uint8_t map[127];
767} fcpos_map_t;
768
769/*
770 * Port Data Base Element
771 */
772
773typedef struct {
774 uint16_t pdb_options;
775 uint8_t pdb_mstate;
776 uint8_t pdb_sstate;
1000 * Port Data Base Element
1001 */
1002
1003typedef struct {
1004 uint16_t pdb_options;
1005 uint8_t pdb_mstate;
1006 uint8_t pdb_sstate;
777#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
778 uint8_t pdb_hardaddr_bits[4];
779 uint8_t pdb_portid_bits[4];
780 uint8_t pdb_nodename[8];
781 uint8_t pdb_portname[8];
782 uint16_t pdb_execthrottle;
783 uint16_t pdb_exec_count;
784 uint8_t pdb_retry_count;
785 uint8_t pdb_retry_delay;

--- 19 unchanged lines hidden (view full) ---

805 uint16_t pdb_nxt_seqid;
806 uint16_t pdb_fcount;
807 uint16_t pdb_prli_len;
808 uint16_t pdb_prli_svc0;
809 uint16_t pdb_prli_svc3;
810 uint16_t pdb_loopid;
811 uint16_t pdb_il_ptr;
812 uint16_t pdb_sl_ptr;
1007 uint8_t pdb_hardaddr_bits[4];
1008 uint8_t pdb_portid_bits[4];
1009 uint8_t pdb_nodename[8];
1010 uint8_t pdb_portname[8];
1011 uint16_t pdb_execthrottle;
1012 uint16_t pdb_exec_count;
1013 uint8_t pdb_retry_count;
1014 uint8_t pdb_retry_delay;

--- 19 unchanged lines hidden (view full) ---

1034 uint16_t pdb_nxt_seqid;
1035 uint16_t pdb_fcount;
1036 uint16_t pdb_prli_len;
1037 uint16_t pdb_prli_svc0;
1038 uint16_t pdb_prli_svc3;
1039 uint16_t pdb_loopid;
1040 uint16_t pdb_il_ptr;
1041 uint16_t pdb_sl_ptr;
813} isp_pdb_t;
1042} isp_pdb_21xx_t;
814
815#define PDB_OPTIONS_XMITTING (1<<11)
816#define PDB_OPTIONS_LNKXMIT (1<<10)
817#define PDB_OPTIONS_ABORTED (1<<9)
818#define PDB_OPTIONS_ADISC (1<<1)
819
820#define PDB_STATE_DISCOVERY 0
821#define PDB_STATE_WDISC_ACK 1

--- 8 unchanged lines hidden (view full) ---

830#define PDB_STATE_PLOGO 10
831#define PDB_STATE_PLOG_ACK 11
832
833#define SVC3_TGT_ROLE 0x10
834#define SVC3_INI_ROLE 0x20
835#define SVC3_ROLE_MASK 0x30
836#define SVC3_ROLE_SHIFT 4
837
1043
1044#define PDB_OPTIONS_XMITTING (1<<11)
1045#define PDB_OPTIONS_LNKXMIT (1<<10)
1046#define PDB_OPTIONS_ABORTED (1<<9)
1047#define PDB_OPTIONS_ADISC (1<<1)
1048
1049#define PDB_STATE_DISCOVERY 0
1050#define PDB_STATE_WDISC_ACK 1

--- 8 unchanged lines hidden (view full) ---

1059#define PDB_STATE_PLOGO 10
1060#define PDB_STATE_PLOG_ACK 11
1061
1062#define SVC3_TGT_ROLE 0x10
1063#define SVC3_INI_ROLE 0x20
1064#define SVC3_ROLE_MASK 0x30
1065#define SVC3_ROLE_SHIFT 4
1066
1067#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1068#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1069
838/*
1070/*
839 * CT definition
840 *
841 * This is as the QLogic f/w documentations defines it- which is just opposite,
842 * bit wise, from what the specification defines it as. Additionally, the
843 * ct_response and ct_resid (really from FC-GS-2) need to be byte swapped.
1071 * Port Data Base Element- 24XX cards
844 */
1072 */
1073typedef struct {
1074 uint16_t pdb_flags;
1075 uint8_t pdb_curstate;
1076 uint8_t pdb_laststate;
1077 uint8_t pdb_hardaddr_bits[4];
1078 uint8_t pdb_portid_bits[4];
1079#define pdb_nxt_seqid_2400 pdb_portid_bits[3]
1080 uint16_t pdb_retry_timer;
1081 uint16_t pdb_handle;
1082 uint16_t pdb_rcv_dsize;
1083 uint16_t pdb_reserved0;
1084 uint16_t pdb_prli_svc0;
1085 uint16_t pdb_prli_svc3;
1086 uint8_t pdb_portname[8];
1087 uint8_t pdb_nodename[8];
1088 uint8_t pdb_reserved1[24];
1089} isp_pdb_24xx_t;
845
1090
1091#define PDB2400_TID_SUPPORTED 0x4000
1092#define PDB2400_FC_TAPE 0x0080
1093#define PDB2400_CLASS2_ACK0 0x0040
1094#define PDB2400_FCP_CONF 0x0020
1095#define PDB2400_CLASS2 0x0010
1096#define PDB2400_ADDR_VALID 0x0002
1097
1098/*
1099 * Common elements from the above two structures that are actually useful to us.
1100 */
846typedef struct {
1101typedef struct {
847 uint8_t ct_revision;
848 uint8_t ct_portid[3];
849 uint8_t ct_fcs_type;
850 uint8_t ct_fcs_subtype;
851 uint8_t ct_options;
852 uint8_t ct_res0;
853 uint16_t ct_response;
854 uint16_t ct_resid;
855 uint8_t ct_res1;
856 uint8_t ct_reason;
857 uint8_t ct_explanation;
858 uint8_t ct_vunique;
859} ct_hdr_t;
860#define FS_ACC 0x8002
861#define FS_RJT 0x8001
1102 uint16_t handle;
1103 uint16_t reserved;
1104 uint32_t s3_role : 8,
1105 portid : 24;
1106 uint8_t portname[8];
1107 uint8_t nodename[8];
1108} isp_pdb_t;
862
1109
863#define FC4_IP 5 /* ISO/EEC 8802-2 LLC/SNAP "Out of Order Delivery" */
864#define FC4_SCSI 8 /* SCSI-3 via Fivre Channel Protocol (FCP) */
865#define FC4_FC_SVC 0x20 /* Fibre Channel Services */
1110/*
1111 * ISP24XX- Login/Logout Port IOCB
1112 */
1113typedef struct {
1114 isphdr_t plogx_header;
1115 uint32_t plogx_handle;
1116 uint16_t plogx_status;
1117 uint16_t plogx_nphdl;
1118 uint16_t plogx_flags;
1119 uint16_t plogx_vphdl; /* low 8 bits */
1120 uint16_t plogx_portlo; /* low 16 bits */
1121 uint16_t plogx_rspsz_porthi;
1122 struct {
1123 uint16_t lo16;
1124 uint16_t hi16;
1125 } plogx_ioparm[11];
1126} isp_plogx_t;
866
1127
1128#define PLOGX_STATUS_OK 0x00
1129#define PLOGX_STATUS_UNAVAIL 0x28
1130#define PLOGX_STATUS_LOGOUT 0x29
1131#define PLOGX_STATUS_IOCBERR 0x31
1132
1133#define PLOGX_IOCBERR_NOLINK 0x01
1134#define PLOGX_IOCBERR_NOIOCB 0x02
1135#define PLOGX_IOCBERR_NOXGHG 0x03
1136#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */
1137#define PLOGX_IOCBERR_NOFABRIC 0x05
1138#define PLOGX_IOCBERR_NOTREADY 0x07
1139#define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */
1140#define PLOGX_IOCBERR_NOPCB 0x0a
1141#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */
1142#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */
1143#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */
1144#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */
1145#define PLOGX_IOCBERR_NOHANDLE 0x1c
1146#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */
1147
1148#define PLOGX_FLG_CMD_MASK 0xf
1149#define PLOGX_FLG_CMD_PLOGI 0
1150#define PLOGX_FLG_CMD_PRLI 1
1151#define PLOGX_FLG_CMD_PDISC 2
1152#define PLOGX_FLG_CMD_LOGO 8
1153#define PLOGX_FLG_CMD_PRLO 9
1154#define PLOGX_FLG_CMD_TPRLO 10
1155
1156#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */
1157#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */
1158#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */
1159#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */
1160#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */
1161#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */
1162#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */
1163
1164#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */
1165#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */
1166
1167/*
1168 * Simple Name Server Data Structures
1169 */
867#define SNS_GA_NXT 0x100
868#define SNS_GPN_ID 0x112
869#define SNS_GNN_ID 0x113
870#define SNS_GFF_ID 0x11F
871#define SNS_GID_FT 0x171
872#define SNS_RFT_ID 0x217
873typedef struct {
874 uint16_t snscb_rblen; /* response buffer length (words) */
1170#define SNS_GA_NXT 0x100
1171#define SNS_GPN_ID 0x112
1172#define SNS_GNN_ID 0x113
1173#define SNS_GFF_ID 0x11F
1174#define SNS_GID_FT 0x171
1175#define SNS_RFT_ID 0x217
1176typedef struct {
1177 uint16_t snscb_rblen; /* response buffer length (words) */
875 uint16_t snscb_res0;
1178 uint16_t snscb_reserved0;
876 uint16_t snscb_addr[4]; /* response buffer address */
877 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1179 uint16_t snscb_addr[4]; /* response buffer address */
1180 uint16_t snscb_sblen; /* subcommand buffer length (words) */
878 uint16_t snscb_res1;
1181 uint16_t snscb_reserved1;
879 uint16_t snscb_data[1]; /* variable data */
880} sns_screq_t; /* Subcommand Request Structure */
881
882typedef struct {
883 uint16_t snscb_rblen; /* response buffer length (words) */
1182 uint16_t snscb_data[1]; /* variable data */
1183} sns_screq_t; /* Subcommand Request Structure */
1184
1185typedef struct {
1186 uint16_t snscb_rblen; /* response buffer length (words) */
884 uint16_t snscb_res0;
1187 uint16_t snscb_reserved0;
885 uint16_t snscb_addr[4]; /* response buffer address */
886 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1188 uint16_t snscb_addr[4]; /* response buffer address */
1189 uint16_t snscb_sblen; /* subcommand buffer length (words) */
887 uint16_t snscb_res1;
1190 uint16_t snscb_reserved1;
888 uint16_t snscb_cmd;
1191 uint16_t snscb_cmd;
889 uint16_t snscb_res2;
890 uint32_t snscb_res3;
1192 uint16_t snscb_reserved2;
1193 uint32_t snscb_reserved3;
891 uint32_t snscb_port;
892} sns_ga_nxt_req_t;
893#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
894
895typedef struct {
896 uint16_t snscb_rblen; /* response buffer length (words) */
1194 uint32_t snscb_port;
1195} sns_ga_nxt_req_t;
1196#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
1197
1198typedef struct {
1199 uint16_t snscb_rblen; /* response buffer length (words) */
897 uint16_t snscb_res0;
1200 uint16_t snscb_reserved0;
898 uint16_t snscb_addr[4]; /* response buffer address */
899 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1201 uint16_t snscb_addr[4]; /* response buffer address */
1202 uint16_t snscb_sblen; /* subcommand buffer length (words) */
900 uint16_t snscb_res1;
1203 uint16_t snscb_reserved1;
901 uint16_t snscb_cmd;
1204 uint16_t snscb_cmd;
902 uint16_t snscb_res2;
903 uint32_t snscb_res3;
1205 uint16_t snscb_reserved2;
1206 uint32_t snscb_reserved3;
904 uint32_t snscb_portid;
905} sns_gxn_id_req_t;
906#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
907
908typedef struct {
909 uint16_t snscb_rblen; /* response buffer length (words) */
1207 uint32_t snscb_portid;
1208} sns_gxn_id_req_t;
1209#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
1210
1211typedef struct {
1212 uint16_t snscb_rblen; /* response buffer length (words) */
910 uint16_t snscb_res0;
1213 uint16_t snscb_reserved0;
911 uint16_t snscb_addr[4]; /* response buffer address */
912 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1214 uint16_t snscb_addr[4]; /* response buffer address */
1215 uint16_t snscb_sblen; /* subcommand buffer length (words) */
913 uint16_t snscb_res1;
1216 uint16_t snscb_reserved1;
914 uint16_t snscb_cmd;
915 uint16_t snscb_mword_div_2;
1217 uint16_t snscb_cmd;
1218 uint16_t snscb_mword_div_2;
916 uint32_t snscb_res3;
1219 uint32_t snscb_reserved3;
917 uint32_t snscb_fc4_type;
918} sns_gid_ft_req_t;
919#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
920
921typedef struct {
922 uint16_t snscb_rblen; /* response buffer length (words) */
1220 uint32_t snscb_fc4_type;
1221} sns_gid_ft_req_t;
1222#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
1223
1224typedef struct {
1225 uint16_t snscb_rblen; /* response buffer length (words) */
923 uint16_t snscb_res0;
1226 uint16_t snscb_reserved0;
924 uint16_t snscb_addr[4]; /* response buffer address */
925 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1227 uint16_t snscb_addr[4]; /* response buffer address */
1228 uint16_t snscb_sblen; /* subcommand buffer length (words) */
926 uint16_t snscb_res1;
1229 uint16_t snscb_reserved1;
927 uint16_t snscb_cmd;
1230 uint16_t snscb_cmd;
928 uint16_t snscb_res2;
929 uint32_t snscb_res3;
1231 uint16_t snscb_reserved2;
1232 uint32_t snscb_reserved3;
930 uint32_t snscb_port;
931 uint32_t snscb_fc4_types[8];
932} sns_rft_id_req_t;
933#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
934
935typedef struct {
936 ct_hdr_t snscb_cthdr;
937 uint8_t snscb_port_type;

--- 37 unchanged lines hidden (view full) ---

975typedef struct {
976 ct_hdr_t snscb_cthdr;
977 struct {
978 uint8_t control;
979 uint8_t portid[3];
980 } snscb_ports[1];
981} sns_gid_ft_rsp_t;
982#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
1233 uint32_t snscb_port;
1234 uint32_t snscb_fc4_types[8];
1235} sns_rft_id_req_t;
1236#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
1237
1238typedef struct {
1239 ct_hdr_t snscb_cthdr;
1240 uint8_t snscb_port_type;

--- 37 unchanged lines hidden (view full) ---

1278typedef struct {
1279 ct_hdr_t snscb_cthdr;
1280 struct {
1281 uint8_t control;
1282 uint8_t portid[3];
1283 } snscb_ports[1];
1284} sns_gid_ft_rsp_t;
1285#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
983
984#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
985
1286#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
1287
1288/*
1289 * Other Misc Structures
1290 */
1291
1292/* ELS Pass Through */
1293typedef struct {
1294 isphdr_t els_hdr;
1295 uint32_t els_handle;
1296 uint16_t els_status;
1297 uint16_t els_nphdl;
1298 uint16_t els_xmit_dsd_count; /* outgoing only */
1299 uint8_t els_vphdl;
1300 uint8_t els_sof;
1301 uint32_t els_rxid;
1302 uint16_t els_recv_dsd_count; /* outgoing only */
1303 uint8_t els_opcode;
1304 uint8_t els_reserved1;
1305 uint8_t els_did_lo;
1306 uint8_t els_did_mid;
1307 uint8_t els_did_hi;
1308 uint8_t els_reserved2;
1309 uint16_t els_reserved3;
1310 uint16_t els_ctl_flags;
1311 union {
1312 struct {
1313 uint32_t _els_bytecnt;
1314 uint32_t _els_subcode1;
1315 uint32_t _els_subcode2;
1316 uint8_t _els_reserved4[20];
1317 } in;
1318 struct {
1319 uint32_t _els_recv_bytecnt;
1320 uint32_t _els_xmit_bytecnt;
1321 uint32_t _els_xmit_dsd_length;
1322 uint16_t _els_xmit_dsd_a1500;
1323 uint16_t _els_xmit_dsd_a3116;
1324 uint16_t _els_xmit_dsd_a4732;
1325 uint16_t _els_xmit_dsd_a6348;
1326 uint32_t _els_recv_dsd_length;
1327 uint16_t _els_recv_dsd_a1500;
1328 uint16_t _els_recv_dsd_a3116;
1329 uint16_t _els_recv_dsd_a4732;
1330 uint16_t _els_recv_dsd_a6348;
1331 } out;
1332 } inout;
1333#define els_bytecnt inout.in._els_bytecnt
1334#define els_subcode1 inout.in._els_subcode1
1335#define els_subcode2 inout.in._els_subcode2
1336#define els_reserved4 inout.in._els_reserved4
1337#define els_recv_bytecnt inout.out._els_recv_bytecnt
1338#define els_xmit_bytecnt inout.out._els_xmit_bytecnt
1339#define els_xmit_dsd_length inout.out._els_xmit_dsd_length
1340#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500
1341#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116
1342#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732
1343#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348
1344#define els_recv_dsd_length inout.out._els_recv_dsd_length
1345#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500
1346#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116
1347#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732
1348#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348
1349} els_t;
986#endif /* _ISPMBOX_H */
1350#endif /* _ISPMBOX_H */