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isp_pci.c (155285) isp_pci.c (155704)
1/*-
2 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
3 * FreeBSD Version.
4 *
5 * Copyright (c) 1997-2006 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

--- 15 unchanged lines hidden (view full) ---

24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 */
30
31#include <sys/cdefs.h>
1/*-
2 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
3 * FreeBSD Version.
4 *
5 * Copyright (c) 1997-2006 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

--- 15 unchanged lines hidden (view full) ---

24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/isp/isp_pci.c 155285 2006-02-04 08:39:02Z mjacob $");
32__FBSDID("$FreeBSD: head/sys/dev/isp/isp_pci.c 155704 2006-02-15 00:31:48Z mjacob $");
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39#include <sys/stdint.h>
40
41#include <dev/pci/pcireg.h>
42#include <dev/pci/pcivar.h>
43
44#include <machine/bus.h>
45#include <machine/resource.h>
46#include <sys/rman.h>
47#include <sys/malloc.h>
48
49#include <dev/isp/isp_freebsd.h>
50
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39#include <sys/stdint.h>
40
41#include <dev/pci/pcireg.h>
42#include <dev/pci/pcivar.h>
43
44#include <machine/bus.h>
45#include <machine/resource.h>
46#include <sys/rman.h>
47#include <sys/malloc.h>
48
49#include <dev/isp/isp_freebsd.h>
50
51static u_int16_t isp_pci_rd_reg(struct ispsoftc *, int);
52static void isp_pci_wr_reg(struct ispsoftc *, int, u_int16_t);
53static u_int16_t isp_pci_rd_reg_1080(struct ispsoftc *, int);
54static void isp_pci_wr_reg_1080(struct ispsoftc *, int, u_int16_t);
51static uint16_t isp_pci_rd_reg(struct ispsoftc *, int);
52static void isp_pci_wr_reg(struct ispsoftc *, int, uint16_t);
53static uint16_t isp_pci_rd_reg_1080(struct ispsoftc *, int);
54static void isp_pci_wr_reg_1080(struct ispsoftc *, int, uint16_t);
55static int
55static int
56isp_pci_rd_isr(struct ispsoftc *, u_int16_t *, u_int16_t *, u_int16_t *);
56isp_pci_rd_isr(struct ispsoftc *, uint16_t *, uint16_t *, uint16_t *);
57static int
57static int
58isp_pci_rd_isr_2300(struct ispsoftc *, u_int16_t *, u_int16_t *, u_int16_t *);
58isp_pci_rd_isr_2300(struct ispsoftc *, uint16_t *, uint16_t *, uint16_t *);
59static int isp_pci_mbxdma(struct ispsoftc *);
60static int
59static int isp_pci_mbxdma(struct ispsoftc *);
60static int
61isp_pci_dmasetup(struct ispsoftc *, XS_T *, ispreq_t *, u_int16_t *, u_int16_t);
61isp_pci_dmasetup(struct ispsoftc *, XS_T *, ispreq_t *, uint16_t *, uint16_t);
62static void
62static void
63isp_pci_dmateardown(struct ispsoftc *, XS_T *, u_int16_t);
63isp_pci_dmateardown(struct ispsoftc *, XS_T *, uint16_t);
64
65static void isp_pci_reset1(struct ispsoftc *);
66static void isp_pci_dumpregs(struct ispsoftc *, const char *);
67
68static struct ispmdvec mdvec = {
69 isp_pci_rd_isr,
70 isp_pci_rd_reg,
71 isp_pci_wr_reg,

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372 return (BUS_PROBE_DEFAULT);
373}
374
375static int
376isp_pci_attach(device_t dev)
377{
378 struct resource *regs, *irq;
379 int tval, rtp, rgd, iqd, m1, m2, isp_debug, role;
64
65static void isp_pci_reset1(struct ispsoftc *);
66static void isp_pci_dumpregs(struct ispsoftc *, const char *);
67
68static struct ispmdvec mdvec = {
69 isp_pci_rd_isr,
70 isp_pci_rd_reg,
71 isp_pci_wr_reg,

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372 return (BUS_PROBE_DEFAULT);
373}
374
375static int
376isp_pci_attach(device_t dev)
377{
378 struct resource *regs, *irq;
379 int tval, rtp, rgd, iqd, m1, m2, isp_debug, role;
380 u_int32_t data, cmd, linesz, psize, basetype;
380 uint32_t data, cmd, linesz, psize, basetype;
381 struct isp_pcisoftc *pcs;
382 struct ispsoftc *isp = NULL;
383 struct ispmdvec *mdvp;
384 const char *sptr;
385 int locksetup = 0;
386
387 /*
388 * Figure out if we're supposed to skip this one.

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840 */
841 return (ENXIO);
842}
843
844static void
845isp_pci_intr(void *arg)
846{
847 struct ispsoftc *isp = arg;
381 struct isp_pcisoftc *pcs;
382 struct ispsoftc *isp = NULL;
383 struct ispmdvec *mdvp;
384 const char *sptr;
385 int locksetup = 0;
386
387 /*
388 * Figure out if we're supposed to skip this one.

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840 */
841 return (ENXIO);
842}
843
844static void
845isp_pci_intr(void *arg)
846{
847 struct ispsoftc *isp = arg;
848 u_int16_t isr, sema, mbox;
848 uint16_t isr, sema, mbox;
849
850 ISP_LOCK(isp);
851 isp->isp_intcnt++;
852 if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
853 isp->isp_intbogus++;
854 } else {
855 int iok = isp->isp_osinfo.intsok;
856 isp->isp_osinfo.intsok = 0;

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867
868#define BXR2(pcs, off) \
869 bus_space_read_2(pcs->pci_st, pcs->pci_sh, off)
870#define BXW2(pcs, off, v) \
871 bus_space_write_2(pcs->pci_st, pcs->pci_sh, off, v)
872
873
874static __inline int
849
850 ISP_LOCK(isp);
851 isp->isp_intcnt++;
852 if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
853 isp->isp_intbogus++;
854 } else {
855 int iok = isp->isp_osinfo.intsok;
856 isp->isp_osinfo.intsok = 0;

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867
868#define BXR2(pcs, off) \
869 bus_space_read_2(pcs->pci_st, pcs->pci_sh, off)
870#define BXW2(pcs, off, v) \
871 bus_space_write_2(pcs->pci_st, pcs->pci_sh, off, v)
872
873
874static __inline int
875isp_pci_rd_debounced(struct ispsoftc *isp, int off, u_int16_t *rp)
875isp_pci_rd_debounced(struct ispsoftc *isp, int off, uint16_t *rp)
876{
877 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
876{
877 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
878 u_int16_t val0, val1;
878 uint16_t val0, val1;
879 int i = 0;
880
881 do {
882 val0 = BXR2(pcs, IspVirt2Off(isp, off));
883 val1 = BXR2(pcs, IspVirt2Off(isp, off));
884 } while (val0 != val1 && ++i < 1000);
885 if (val0 != val1) {
886 return (1);
887 }
888 *rp = val0;
889 return (0);
890}
891
892static int
879 int i = 0;
880
881 do {
882 val0 = BXR2(pcs, IspVirt2Off(isp, off));
883 val1 = BXR2(pcs, IspVirt2Off(isp, off));
884 } while (val0 != val1 && ++i < 1000);
885 if (val0 != val1) {
886 return (1);
887 }
888 *rp = val0;
889 return (0);
890}
891
892static int
893isp_pci_rd_isr(struct ispsoftc *isp, u_int16_t *isrp,
894 u_int16_t *semap, u_int16_t *mbp)
893isp_pci_rd_isr(struct ispsoftc *isp, uint16_t *isrp,
894 uint16_t *semap, uint16_t *mbp)
895{
896 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
895{
896 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
897 u_int16_t isr, sema;
897 uint16_t isr, sema;
898
899 if (IS_2100(isp)) {
900 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
901 return (0);
902 }
903 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) {
904 return (0);
905 }

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922 } else {
923 *mbp = BXR2(pcs, IspVirt2Off(isp, OUTMAILBOX0));
924 }
925 }
926 return (1);
927}
928
929static int
898
899 if (IS_2100(isp)) {
900 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
901 return (0);
902 }
903 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) {
904 return (0);
905 }

--- 16 unchanged lines hidden (view full) ---

922 } else {
923 *mbp = BXR2(pcs, IspVirt2Off(isp, OUTMAILBOX0));
924 }
925 }
926 return (1);
927}
928
929static int
930isp_pci_rd_isr_2300(struct ispsoftc *isp, u_int16_t *isrp,
931 u_int16_t *semap, u_int16_t *mbox0p)
930isp_pci_rd_isr_2300(struct ispsoftc *isp, uint16_t *isrp,
931 uint16_t *semap, uint16_t *mbox0p)
932{
933 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
932{
933 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
934 u_int32_t r2hisr;
934 uint32_t r2hisr;
935
936 if (!(BXR2(pcs, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) {
937 *isrp = 0;
938 return (0);
939 }
940 r2hisr = bus_space_read_4(pcs->pci_st, pcs->pci_sh,
941 IspVirt2Off(pcs, BIU_R2HSTSLO));
942 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);

--- 31 unchanged lines hidden (view full) ---

974 *mbox0p = 0;
975 *semap = 0;
976 return (1);
977 default:
978 return (0);
979 }
980}
981
935
936 if (!(BXR2(pcs, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) {
937 *isrp = 0;
938 return (0);
939 }
940 r2hisr = bus_space_read_4(pcs->pci_st, pcs->pci_sh,
941 IspVirt2Off(pcs, BIU_R2HSTSLO));
942 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);

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974 *mbox0p = 0;
975 *semap = 0;
976 return (1);
977 default:
978 return (0);
979 }
980}
981
982static u_int16_t
982static uint16_t
983isp_pci_rd_reg(struct ispsoftc *isp, int regoff)
984{
983isp_pci_rd_reg(struct ispsoftc *isp, int regoff)
984{
985 u_int16_t rv;
985 uint16_t rv;
986 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
987 int oldconf = 0;
988
989 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
990 /*
991 * We will assume that someone has paused the RISC processor.
992 */
993 oldconf = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
994 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
995 oldconf | BIU_PCI_CONF1_SXP);
996 }
997 rv = BXR2(pcs, IspVirt2Off(isp, regoff));
998 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
999 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oldconf);
1000 }
1001 return (rv);
1002}
1003
1004static void
986 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
987 int oldconf = 0;
988
989 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
990 /*
991 * We will assume that someone has paused the RISC processor.
992 */
993 oldconf = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
994 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
995 oldconf | BIU_PCI_CONF1_SXP);
996 }
997 rv = BXR2(pcs, IspVirt2Off(isp, regoff));
998 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
999 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oldconf);
1000 }
1001 return (rv);
1002}
1003
1004static void
1005isp_pci_wr_reg(struct ispsoftc *isp, int regoff, u_int16_t val)
1005isp_pci_wr_reg(struct ispsoftc *isp, int regoff, uint16_t val)
1006{
1007 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
1008 int oldconf = 0;
1009
1010 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1011 /*
1012 * We will assume that someone has paused the RISC processor.
1013 */
1014 oldconf = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
1015 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
1016 oldconf | BIU_PCI_CONF1_SXP);
1017 }
1018 BXW2(pcs, IspVirt2Off(isp, regoff), val);
1019 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1020 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oldconf);
1021 }
1022}
1023
1006{
1007 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
1008 int oldconf = 0;
1009
1010 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1011 /*
1012 * We will assume that someone has paused the RISC processor.
1013 */
1014 oldconf = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
1015 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
1016 oldconf | BIU_PCI_CONF1_SXP);
1017 }
1018 BXW2(pcs, IspVirt2Off(isp, regoff), val);
1019 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1020 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oldconf);
1021 }
1022}
1023
1024static u_int16_t
1024static uint16_t
1025isp_pci_rd_reg_1080(struct ispsoftc *isp, int regoff)
1026{
1025isp_pci_rd_reg_1080(struct ispsoftc *isp, int regoff)
1026{
1027 u_int16_t rv, oc = 0;
1027 uint16_t rv, oc = 0;
1028 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
1029
1030 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1031 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1028 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
1029
1030 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1031 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1032 u_int16_t tc;
1032 uint16_t tc;
1033 /*
1034 * We will assume that someone has paused the RISC processor.
1035 */
1036 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
1037 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1038 if (regoff & SXP_BANK1_SELECT)
1039 tc |= BIU_PCI1080_CONF1_SXP1;
1040 else

--- 7 unchanged lines hidden (view full) ---

1048 rv = BXR2(pcs, IspVirt2Off(isp, regoff));
1049 if (oc) {
1050 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oc);
1051 }
1052 return (rv);
1053}
1054
1055static void
1033 /*
1034 * We will assume that someone has paused the RISC processor.
1035 */
1036 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
1037 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1038 if (regoff & SXP_BANK1_SELECT)
1039 tc |= BIU_PCI1080_CONF1_SXP1;
1040 else

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1048 rv = BXR2(pcs, IspVirt2Off(isp, regoff));
1049 if (oc) {
1050 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oc);
1051 }
1052 return (rv);
1053}
1054
1055static void
1056isp_pci_wr_reg_1080(struct ispsoftc *isp, int regoff, u_int16_t val)
1056isp_pci_wr_reg_1080(struct ispsoftc *isp, int regoff, uint16_t val)
1057{
1058 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
1059 int oc = 0;
1060
1061 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1062 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1057{
1058 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
1059 int oc = 0;
1060
1061 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1062 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1063 u_int16_t tc;
1063 uint16_t tc;
1064 /*
1065 * We will assume that someone has paused the RISC processor.
1066 */
1067 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
1068 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1069 if (regoff & SXP_BANK1_SELECT)
1070 tc |= BIU_PCI1080_CONF1_SXP1;
1071 else

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1115 */
1116#define ISP_NSEGS ((MAXPHYS / PAGE_SIZE) + 1)
1117
1118static int
1119isp_pci_mbxdma(struct ispsoftc *isp)
1120{
1121 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1122 caddr_t base;
1064 /*
1065 * We will assume that someone has paused the RISC processor.
1066 */
1067 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
1068 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1069 if (regoff & SXP_BANK1_SELECT)
1070 tc |= BIU_PCI1080_CONF1_SXP1;
1071 else

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1115 */
1116#define ISP_NSEGS ((MAXPHYS / PAGE_SIZE) + 1)
1117
1118static int
1119isp_pci_mbxdma(struct ispsoftc *isp)
1120{
1121 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1122 caddr_t base;
1123 u_int32_t len;
1123 uint32_t len;
1124 int i, error, ns;
1125 bus_size_t slim; /* segment size */
1126 bus_addr_t llim; /* low limit of unavailable dma */
1127 bus_addr_t hlim; /* high limit of unavailable dma */
1128 struct imush im;
1129
1130 /*
1131 * Already been here? If so, leave...
1132 */
1133 if (isp->isp_rquest) {
1134 return (0);
1135 }
1136
1124 int i, error, ns;
1125 bus_size_t slim; /* segment size */
1126 bus_addr_t llim; /* low limit of unavailable dma */
1127 bus_addr_t hlim; /* high limit of unavailable dma */
1128 struct imush im;
1129
1130 /*
1131 * Already been here? If so, leave...
1132 */
1133 if (isp->isp_rquest) {
1134 return (0);
1135 }
1136
1137#ifdef ISP_DAC_SUPPORTED
1138 llim = hlim = BUS_SPACE_MAXADDR;
1139#else
1140 llim = BUS_SPACE_MAXADDR_32BIT;
1141 hlim = BUS_SPACE_MAXADDR;
1137 hlim = BUS_SPACE_MAXADDR;
1142#endif
1143 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1144 slim = (bus_size_t) (1ULL << 32);
1138 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1139 slim = (bus_size_t) (1ULL << 32);
1140#ifdef ISP_TARGET_MODE
1141 /*
1142 * XXX: Until Fixed Soon
1143 */
1144 llim = BUS_SPACE_MAXADDR_32BIT;
1145#else
1146 llim = BUS_SPACE_MAXADDR;
1147#endif
1145 } else {
1148 } else {
1149 llim = BUS_SPACE_MAXADDR_32BIT;
1146 slim = (1 << 24);
1147 }
1148
1149 ISP_UNLOCK(isp);
1150 if (bus_dma_tag_create(NULL, 1, slim, llim, hlim,
1151 NULL, NULL, BUS_SPACE_MAXSIZE, ISP_NSEGS, slim, 0,
1152 busdma_lock_mutex, &Giant, &pcs->dmat)) {
1153 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");

--- 115 unchanged lines hidden (view full) ---

1269 isp->isp_rquest = NULL;
1270 return (1);
1271}
1272
1273typedef struct {
1274 struct ispsoftc *isp;
1275 void *cmd_token;
1276 void *rq;
1150 slim = (1 << 24);
1151 }
1152
1153 ISP_UNLOCK(isp);
1154 if (bus_dma_tag_create(NULL, 1, slim, llim, hlim,
1155 NULL, NULL, BUS_SPACE_MAXSIZE, ISP_NSEGS, slim, 0,
1156 busdma_lock_mutex, &Giant, &pcs->dmat)) {
1157 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");

--- 115 unchanged lines hidden (view full) ---

1273 isp->isp_rquest = NULL;
1274 return (1);
1275}
1276
1277typedef struct {
1278 struct ispsoftc *isp;
1279 void *cmd_token;
1280 void *rq;
1277 u_int16_t *nxtip;
1278 u_int16_t optr;
1279 u_int error;
1281 uint16_t *nxtip;
1282 uint16_t optr;
1283 int error;
1280} mush_t;
1281
1282#define MUSHERR_NOQENTRIES -2
1283
1284#ifdef ISP_TARGET_MODE
1285/*
1286 * We need to handle DMA for target mode differently from initiator mode.
1287 *

--- 19 unchanged lines hidden (view full) ---

1307tdma_mk(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1308{
1309 mush_t *mp;
1310 struct ccb_scsiio *csio;
1311 struct ispsoftc *isp;
1312 struct isp_pcisoftc *pcs;
1313 bus_dmamap_t *dp;
1314 ct_entry_t *cto, *qe;
1284} mush_t;
1285
1286#define MUSHERR_NOQENTRIES -2
1287
1288#ifdef ISP_TARGET_MODE
1289/*
1290 * We need to handle DMA for target mode differently from initiator mode.
1291 *

--- 19 unchanged lines hidden (view full) ---

1311tdma_mk(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1312{
1313 mush_t *mp;
1314 struct ccb_scsiio *csio;
1315 struct ispsoftc *isp;
1316 struct isp_pcisoftc *pcs;
1317 bus_dmamap_t *dp;
1318 ct_entry_t *cto, *qe;
1315 u_int8_t scsi_status;
1316 u_int16_t curi, nxti, handle;
1317 u_int32_t sflags;
1319 uint8_t scsi_status;
1320 uint16_t curi, nxti, handle;
1321 uint32_t sflags;
1318 int32_t resid;
1319 int nth_ctio, nctios, send_status;
1320
1321 mp = (mush_t *) arg;
1322 if (error) {
1323 mp->error = error;
1324 return;
1325 }

--- 222 unchanged lines hidden (view full) ---

1548
1549static void
1550tdma_mkfc(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1551{
1552 mush_t *mp;
1553 struct ccb_scsiio *csio;
1554 struct ispsoftc *isp;
1555 ct2_entry_t *cto, *qe;
1322 int32_t resid;
1323 int nth_ctio, nctios, send_status;
1324
1325 mp = (mush_t *) arg;
1326 if (error) {
1327 mp->error = error;
1328 return;
1329 }

--- 222 unchanged lines hidden (view full) ---

1552
1553static void
1554tdma_mkfc(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1555{
1556 mush_t *mp;
1557 struct ccb_scsiio *csio;
1558 struct ispsoftc *isp;
1559 ct2_entry_t *cto, *qe;
1556 u_int16_t curi, nxti;
1560 uint16_t curi, nxti;
1557 int segcnt;
1558
1559 mp = (mush_t *) arg;
1560 if (error) {
1561 mp->error = error;
1562 return;
1563 }
1564

--- 53 unchanged lines hidden (view full) ---

1618 cto->rsp.m0.ct_xfrlen += dm_segs[segcnt].ds_len;
1619 isp_prt(isp, ISP_LOGTDEBUG1,
1620 "isp_send_ctio2: ent0[%d]0x%jx:%ju",
1621 cto->ct_seg_count, (uintmax_t)dm_segs[segcnt].ds_addr,
1622 (uintmax_t)dm_segs[segcnt].ds_len);
1623 }
1624
1625 while (segcnt < nseg) {
1561 int segcnt;
1562
1563 mp = (mush_t *) arg;
1564 if (error) {
1565 mp->error = error;
1566 return;
1567 }
1568

--- 53 unchanged lines hidden (view full) ---

1622 cto->rsp.m0.ct_xfrlen += dm_segs[segcnt].ds_len;
1623 isp_prt(isp, ISP_LOGTDEBUG1,
1624 "isp_send_ctio2: ent0[%d]0x%jx:%ju",
1625 cto->ct_seg_count, (uintmax_t)dm_segs[segcnt].ds_addr,
1626 (uintmax_t)dm_segs[segcnt].ds_len);
1627 }
1628
1629 while (segcnt < nseg) {
1626 u_int16_t curip;
1630 uint16_t curip;
1627 int seg;
1628 ispcontreq_t local, *crq = &local, *qep;
1629
1630 qep = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1631 curip = nxti;
1632 nxti = ISP_NXT_QENTRY(curip, RQUEST_QUEUE_LEN(isp));
1633 if (nxti == mp->optr) {
1634 ISP_UNLOCK(isp);

--- 33 unchanged lines hidden (view full) ---

1668 cto->ct_flags, cto->ct_status, cto->rsp.m1.ct_scsi_status,
1669 cto->ct_resid);
1670 isp_put_ctio2(isp, cto, qe);
1671 ISP_TDQE(isp, "last dma2_tgt_fc", curi, qe);
1672 *mp->nxtip = nxti;
1673}
1674#endif
1675
1631 int seg;
1632 ispcontreq_t local, *crq = &local, *qep;
1633
1634 qep = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1635 curip = nxti;
1636 nxti = ISP_NXT_QENTRY(curip, RQUEST_QUEUE_LEN(isp));
1637 if (nxti == mp->optr) {
1638 ISP_UNLOCK(isp);

--- 33 unchanged lines hidden (view full) ---

1672 cto->ct_flags, cto->ct_status, cto->rsp.m1.ct_scsi_status,
1673 cto->ct_resid);
1674 isp_put_ctio2(isp, cto, qe);
1675 ISP_TDQE(isp, "last dma2_tgt_fc", curi, qe);
1676 *mp->nxtip = nxti;
1677}
1678#endif
1679
1680static void dma2_a64(void *, bus_dma_segment_t *, int, int);
1676static void dma2(void *, bus_dma_segment_t *, int, int);
1677
1681static void dma2(void *, bus_dma_segment_t *, int, int);
1682
1678#if defined(ISP_DAC_SUPPORTED) && (ISP_64BIT_CORRECTLY_DONE)
1679#define LOWD(x) ((uint32_t) x)
1680#define HIWD(x) ((uint32_t) (x >> 32))
1681
1682static void
1683static void
1683dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1684dma2_a64(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1684{
1685 mush_t *mp;
1686 struct ispsoftc *isp;
1687 struct ccb_scsiio *csio;
1688 struct isp_pcisoftc *pcs;
1689 bus_dmamap_t *dp;
1690 bus_dma_segment_t *eseg;
1691 ispreq64_t *rq;
1692 int seglim, datalen;
1685{
1686 mush_t *mp;
1687 struct ispsoftc *isp;
1688 struct ccb_scsiio *csio;
1689 struct isp_pcisoftc *pcs;
1690 bus_dmamap_t *dp;
1691 bus_dma_segment_t *eseg;
1692 ispreq64_t *rq;
1693 int seglim, datalen;
1693 u_int16_t nxti;
1694 uint16_t nxti;
1694
1695 mp = (mush_t *) arg;
1696 if (error) {
1697 mp->error = error;
1698 return;
1699 }
1700
1701 if (nseg < 1) {

--- 49 unchanged lines hidden (view full) ---

1751 }
1752
1753 eseg = dm_segs + nseg;
1754
1755 while (datalen != 0 && rq->req_seg_count < seglim && dm_segs != eseg) {
1756 if (IS_FC(isp)) {
1757 ispreqt3_t *rq3 = (ispreqt3_t *)rq;
1758 rq3->req_dataseg[rq3->req_seg_count].ds_base =
1695
1696 mp = (mush_t *) arg;
1697 if (error) {
1698 mp->error = error;
1699 return;
1700 }
1701
1702 if (nseg < 1) {

--- 49 unchanged lines hidden (view full) ---

1752 }
1753
1754 eseg = dm_segs + nseg;
1755
1756 while (datalen != 0 && rq->req_seg_count < seglim && dm_segs != eseg) {
1757 if (IS_FC(isp)) {
1758 ispreqt3_t *rq3 = (ispreqt3_t *)rq;
1759 rq3->req_dataseg[rq3->req_seg_count].ds_base =
1759 LOWD(dm_segs->ds_addr);
1760 DMA_LO32(dm_segs->ds_addr);
1760 rq3->req_dataseg[rq3->req_seg_count].ds_basehi =
1761 rq3->req_dataseg[rq3->req_seg_count].ds_basehi =
1761 HIWD(dm_segs->ds_addr);
1762 DMA_HI32(dm_segs->ds_addr);
1762 rq3->req_dataseg[rq3->req_seg_count].ds_count =
1763 dm_segs->ds_len;
1764 } else {
1765 rq->req_dataseg[rq->req_seg_count].ds_base =
1763 rq3->req_dataseg[rq3->req_seg_count].ds_count =
1764 dm_segs->ds_len;
1765 } else {
1766 rq->req_dataseg[rq->req_seg_count].ds_base =
1766 LOWD(dm_segs->ds_addr);
1767 DMA_LO32(dm_segs->ds_addr);
1767 rq->req_dataseg[rq->req_seg_count].ds_basehi =
1768 rq->req_dataseg[rq->req_seg_count].ds_basehi =
1768 HIWD(dm_segs->ds_addr);
1769 DMA_HI32(dm_segs->ds_addr);
1769 rq->req_dataseg[rq->req_seg_count].ds_count =
1770 dm_segs->ds_len;
1771 }
1772 datalen -= dm_segs->ds_len;
1773 rq->req_seg_count++;
1774 dm_segs++;
1775 }
1776
1777 while (datalen > 0 && dm_segs != eseg) {
1770 rq->req_dataseg[rq->req_seg_count].ds_count =
1771 dm_segs->ds_len;
1772 }
1773 datalen -= dm_segs->ds_len;
1774 rq->req_seg_count++;
1775 dm_segs++;
1776 }
1777
1778 while (datalen > 0 && dm_segs != eseg) {
1778 u_int16_t onxti;
1779 uint16_t onxti;
1779 ispcontreq64_t local, *crq = &local, *cqe;
1780
1781 cqe = (ispcontreq64_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1782 onxti = nxti;
1783 nxti = ISP_NXT_QENTRY(onxti, RQUEST_QUEUE_LEN(isp));
1784 if (nxti == mp->optr) {
1785 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++");
1786 mp->error = MUSHERR_NOQENTRIES;
1787 return;
1788 }
1789 rq->req_header.rqs_entry_count++;
1790 MEMZERO((void *)crq, sizeof (*crq));
1791 crq->req_header.rqs_entry_count = 1;
1792 crq->req_header.rqs_entry_type = RQSTYPE_A64_CONT;
1793
1794 seglim = 0;
1795 while (datalen > 0 && seglim < ISP_CDSEG64 && dm_segs != eseg) {
1796 crq->req_dataseg[seglim].ds_base =
1780 ispcontreq64_t local, *crq = &local, *cqe;
1781
1782 cqe = (ispcontreq64_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1783 onxti = nxti;
1784 nxti = ISP_NXT_QENTRY(onxti, RQUEST_QUEUE_LEN(isp));
1785 if (nxti == mp->optr) {
1786 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++");
1787 mp->error = MUSHERR_NOQENTRIES;
1788 return;
1789 }
1790 rq->req_header.rqs_entry_count++;
1791 MEMZERO((void *)crq, sizeof (*crq));
1792 crq->req_header.rqs_entry_count = 1;
1793 crq->req_header.rqs_entry_type = RQSTYPE_A64_CONT;
1794
1795 seglim = 0;
1796 while (datalen > 0 && seglim < ISP_CDSEG64 && dm_segs != eseg) {
1797 crq->req_dataseg[seglim].ds_base =
1797 LOWD(dm_segs->ds_addr);
1798 DMA_LO32(dm_segs->ds_addr);
1798 crq->req_dataseg[seglim].ds_basehi =
1799 crq->req_dataseg[seglim].ds_basehi =
1799 HIWD(dm_segs->ds_addr);
1800 DMA_HI32(dm_segs->ds_addr);
1800 crq->req_dataseg[seglim].ds_count =
1801 dm_segs->ds_len;
1802 rq->req_seg_count++;
1803 dm_segs++;
1804 seglim++;
1805 datalen -= dm_segs->ds_len;
1806 }
1807 isp_put_cont64_req(isp, crq, cqe);
1808 MEMORYBARRIER(isp, SYNC_REQUEST, onxti, QENTRY_LEN);
1809 }
1810 *mp->nxtip = nxti;
1811}
1801 crq->req_dataseg[seglim].ds_count =
1802 dm_segs->ds_len;
1803 rq->req_seg_count++;
1804 dm_segs++;
1805 seglim++;
1806 datalen -= dm_segs->ds_len;
1807 }
1808 isp_put_cont64_req(isp, crq, cqe);
1809 MEMORYBARRIER(isp, SYNC_REQUEST, onxti, QENTRY_LEN);
1810 }
1811 *mp->nxtip = nxti;
1812}
1812#else
1813
1813static void
1814dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1815{
1816 mush_t *mp;
1817 struct ispsoftc *isp;
1818 struct ccb_scsiio *csio;
1819 struct isp_pcisoftc *pcs;
1820 bus_dmamap_t *dp;
1821 bus_dma_segment_t *eseg;
1822 ispreq_t *rq;
1823 int seglim, datalen;
1814static void
1815dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1816{
1817 mush_t *mp;
1818 struct ispsoftc *isp;
1819 struct ccb_scsiio *csio;
1820 struct isp_pcisoftc *pcs;
1821 bus_dmamap_t *dp;
1822 bus_dma_segment_t *eseg;
1823 ispreq_t *rq;
1824 int seglim, datalen;
1824 u_int16_t nxti;
1825 uint16_t nxti;
1825
1826 mp = (mush_t *) arg;
1827 if (error) {
1828 mp->error = error;
1829 return;
1830 }
1831
1832 if (nseg < 1) {

--- 48 unchanged lines hidden (view full) ---

1881 }
1882
1883 eseg = dm_segs + nseg;
1884
1885 while (datalen != 0 && rq->req_seg_count < seglim && dm_segs != eseg) {
1886 if (IS_FC(isp)) {
1887 ispreqt2_t *rq2 = (ispreqt2_t *)rq;
1888 rq2->req_dataseg[rq2->req_seg_count].ds_base =
1826
1827 mp = (mush_t *) arg;
1828 if (error) {
1829 mp->error = error;
1830 return;
1831 }
1832
1833 if (nseg < 1) {

--- 48 unchanged lines hidden (view full) ---

1882 }
1883
1884 eseg = dm_segs + nseg;
1885
1886 while (datalen != 0 && rq->req_seg_count < seglim && dm_segs != eseg) {
1887 if (IS_FC(isp)) {
1888 ispreqt2_t *rq2 = (ispreqt2_t *)rq;
1889 rq2->req_dataseg[rq2->req_seg_count].ds_base =
1889 dm_segs->ds_addr;
1890 DMA_LO32(dm_segs->ds_addr);
1890 rq2->req_dataseg[rq2->req_seg_count].ds_count =
1891 dm_segs->ds_len;
1892 } else {
1893 rq->req_dataseg[rq->req_seg_count].ds_base =
1891 rq2->req_dataseg[rq2->req_seg_count].ds_count =
1892 dm_segs->ds_len;
1893 } else {
1894 rq->req_dataseg[rq->req_seg_count].ds_base =
1894 dm_segs->ds_addr;
1895 DMA_LO32(dm_segs->ds_addr);
1895 rq->req_dataseg[rq->req_seg_count].ds_count =
1896 dm_segs->ds_len;
1897 }
1898 datalen -= dm_segs->ds_len;
1899 rq->req_seg_count++;
1900 dm_segs++;
1901 }
1902
1903 while (datalen > 0 && dm_segs != eseg) {
1896 rq->req_dataseg[rq->req_seg_count].ds_count =
1897 dm_segs->ds_len;
1898 }
1899 datalen -= dm_segs->ds_len;
1900 rq->req_seg_count++;
1901 dm_segs++;
1902 }
1903
1904 while (datalen > 0 && dm_segs != eseg) {
1904 u_int16_t onxti;
1905 uint16_t onxti;
1905 ispcontreq_t local, *crq = &local, *cqe;
1906
1907 cqe = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1908 onxti = nxti;
1909 nxti = ISP_NXT_QENTRY(onxti, RQUEST_QUEUE_LEN(isp));
1910 if (nxti == mp->optr) {
1911 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++");
1912 mp->error = MUSHERR_NOQENTRIES;
1913 return;
1914 }
1915 rq->req_header.rqs_entry_count++;
1916 MEMZERO((void *)crq, sizeof (*crq));
1917 crq->req_header.rqs_entry_count = 1;
1918 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
1919
1920 seglim = 0;
1921 while (datalen > 0 && seglim < ISP_CDSEG && dm_segs != eseg) {
1922 crq->req_dataseg[seglim].ds_base =
1906 ispcontreq_t local, *crq = &local, *cqe;
1907
1908 cqe = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1909 onxti = nxti;
1910 nxti = ISP_NXT_QENTRY(onxti, RQUEST_QUEUE_LEN(isp));
1911 if (nxti == mp->optr) {
1912 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++");
1913 mp->error = MUSHERR_NOQENTRIES;
1914 return;
1915 }
1916 rq->req_header.rqs_entry_count++;
1917 MEMZERO((void *)crq, sizeof (*crq));
1918 crq->req_header.rqs_entry_count = 1;
1919 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
1920
1921 seglim = 0;
1922 while (datalen > 0 && seglim < ISP_CDSEG && dm_segs != eseg) {
1923 crq->req_dataseg[seglim].ds_base =
1923 dm_segs->ds_addr;
1924 DMA_LO32(dm_segs->ds_addr);
1924 crq->req_dataseg[seglim].ds_count =
1925 dm_segs->ds_len;
1926 rq->req_seg_count++;
1927 dm_segs++;
1928 seglim++;
1929 datalen -= dm_segs->ds_len;
1930 }
1931 isp_put_cont_req(isp, crq, cqe);
1932 MEMORYBARRIER(isp, SYNC_REQUEST, onxti, QENTRY_LEN);
1933 }
1934 *mp->nxtip = nxti;
1935}
1925 crq->req_dataseg[seglim].ds_count =
1926 dm_segs->ds_len;
1927 rq->req_seg_count++;
1928 dm_segs++;
1929 seglim++;
1930 datalen -= dm_segs->ds_len;
1931 }
1932 isp_put_cont_req(isp, crq, cqe);
1933 MEMORYBARRIER(isp, SYNC_REQUEST, onxti, QENTRY_LEN);
1934 }
1935 *mp->nxtip = nxti;
1936}
1936#endif
1937
1938static int
1939isp_pci_dmasetup(struct ispsoftc *isp, struct ccb_scsiio *csio, ispreq_t *rq,
1937
1938static int
1939isp_pci_dmasetup(struct ispsoftc *isp, struct ccb_scsiio *csio, ispreq_t *rq,
1940 u_int16_t *nxtip, u_int16_t optr)
1940 uint16_t *nxtip, uint16_t optr)
1941{
1942 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1943 ispreq_t *qep;
1944 bus_dmamap_t *dp = NULL;
1945 mush_t mush, *mp;
1946 void (*eptr)(void *, bus_dma_segment_t *, int, int);
1947
1948 qep = (ispreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, isp->isp_reqidx);

--- 13 unchanged lines hidden (view full) ---

1962 mp->nxtip = nxtip;
1963 mp->optr = optr;
1964 mp->error = 0;
1965 (*eptr)(mp, NULL, 0, 0);
1966 goto mbxsync;
1967 }
1968 } else
1969#endif
1941{
1942 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1943 ispreq_t *qep;
1944 bus_dmamap_t *dp = NULL;
1945 mush_t mush, *mp;
1946 void (*eptr)(void *, bus_dma_segment_t *, int, int);
1947
1948 qep = (ispreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, isp->isp_reqidx);

--- 13 unchanged lines hidden (view full) ---

1962 mp->nxtip = nxtip;
1963 mp->optr = optr;
1964 mp->error = 0;
1965 (*eptr)(mp, NULL, 0, 0);
1966 goto mbxsync;
1967 }
1968 } else
1969#endif
1970 eptr = dma2;
1970 if (sizeof (bus_addr_t) > 4) {
1971 eptr = dma2_a64;
1972 } else {
1973 eptr = dma2;
1974 }
1971
1972
1973 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE ||
1974 (csio->dxfer_len == 0)) {
1975 rq->req_seg_count = 1;
1976 goto mbxsync;
1977 }
1978

--- 82 unchanged lines hidden (view full) ---

2061 case RQSTYPE_T3RQS:
2062 isp_put_request_t3(isp, (ispreqt3_t *) rq, (ispreqt3_t *) qep);
2063 break;
2064 }
2065 return (CMD_QUEUED);
2066}
2067
2068static void
1975
1976
1977 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE ||
1978 (csio->dxfer_len == 0)) {
1979 rq->req_seg_count = 1;
1980 goto mbxsync;
1981 }
1982

--- 82 unchanged lines hidden (view full) ---

2065 case RQSTYPE_T3RQS:
2066 isp_put_request_t3(isp, (ispreqt3_t *) rq, (ispreqt3_t *) qep);
2067 break;
2068 }
2069 return (CMD_QUEUED);
2070}
2071
2072static void
2069isp_pci_dmateardown(struct ispsoftc *isp, XS_T *xs, u_int16_t handle)
2073isp_pci_dmateardown(struct ispsoftc *isp, XS_T *xs, uint16_t handle)
2070{
2071 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
2072 bus_dmamap_t *dp = &pcs->dmaps[isp_handle_index(handle)];
2073 if ((xs->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
2074 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_POSTREAD);
2075 } else {
2076 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_POSTWRITE);
2077 }

--- 51 unchanged lines hidden --- 		2074{
2075 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
2076 bus_dmamap_t *dp = &pcs->dmaps[isp_handle_index(handle)];
2077 if ((xs->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
2078 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_POSTREAD);
2079 } else {
2080 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_POSTWRITE);
2081 }

--- 51 unchanged lines hidden ---