hwpmc_intel.c (282658) | hwpmc_intel.c (291494) |
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1/*- 2 * Copyright (c) 2008 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Common code for handling Intel CPUs. 29 */ 30 31#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Common code for handling Intel CPUs. 29 */ 30 31#include <sys/cdefs.h> |
32__FBSDID("$FreeBSD: head/sys/dev/hwpmc/hwpmc_intel.c 282658 2015-05-08 19:40:00Z jhb $"); | 32__FBSDID("$FreeBSD: head/sys/dev/hwpmc/hwpmc_intel.c 291494 2015-11-30 17:35:49Z rrs $"); |
33 34#include <sys/param.h> 35#include <sys/pmc.h> 36#include <sys/pmckern.h> 37#include <sys/systm.h> 38 39#include <machine/cpu.h> 40#include <machine/cputypes.h> --- 133 unchanged lines hidden (view full) --- 174 case 0x3A: /* Per Intel document 253669-043US 05/2012. */ 175 cputype = PMC_CPU_INTEL_IVYBRIDGE; 176 nclasses = 3; 177 break; 178 case 0x3E: /* Per Intel document 325462-045US 01/2013. */ 179 cputype = PMC_CPU_INTEL_IVYBRIDGE_XEON; 180 nclasses = 3; 181 break; | 33 34#include <sys/param.h> 35#include <sys/pmc.h> 36#include <sys/pmckern.h> 37#include <sys/systm.h> 38 39#include <machine/cpu.h> 40#include <machine/cputypes.h> --- 133 unchanged lines hidden (view full) --- 174 case 0x3A: /* Per Intel document 253669-043US 05/2012. */ 175 cputype = PMC_CPU_INTEL_IVYBRIDGE; 176 nclasses = 3; 177 break; 178 case 0x3E: /* Per Intel document 325462-045US 01/2013. */ 179 cputype = PMC_CPU_INTEL_IVYBRIDGE_XEON; 180 nclasses = 3; 181 break; |
182 case 0x4e: 183 case 0x5e: 184 cputype = PMC_CPU_INTEL_SKYLAKE; 185 nclasses = 3; 186 break; |
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182 case 0x3D: | 187 case 0x3D: |
188 case 0x47: |
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183 cputype = PMC_CPU_INTEL_BROADWELL; 184 nclasses = 3; 185 break; | 189 cputype = PMC_CPU_INTEL_BROADWELL; 190 nclasses = 3; 191 break; |
192 case 0x4f: 193 case 0x56: 194 cputype = PMC_CPU_INTEL_BROADWELL_XEON; 195 nclasses = 3; 196 break; |
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186 case 0x3F: /* Per Intel document 325462-045US 09/2014. */ 187 case 0x46: /* Per Intel document 325462-045US 09/2014. */ 188 /* Should 46 be XEON. probably its own? */ 189 cputype = PMC_CPU_INTEL_HASWELL_XEON; 190 nclasses = 3; 191 break; 192 case 0x3C: /* Per Intel document 325462-045US 01/2013. */ 193 case 0x45: /* Per Intel document 325462-045US 09/2014. */ --- 33 unchanged lines hidden (view full) --- 227 switch (cputype) { 228#if defined(__i386__) || defined(__amd64__) 229 /* 230 * Intel Core, Core 2 and Atom processors. 231 */ 232 case PMC_CPU_INTEL_ATOM: 233 case PMC_CPU_INTEL_ATOM_SILVERMONT: 234 case PMC_CPU_INTEL_BROADWELL: | 197 case 0x3F: /* Per Intel document 325462-045US 09/2014. */ 198 case 0x46: /* Per Intel document 325462-045US 09/2014. */ 199 /* Should 46 be XEON. probably its own? */ 200 cputype = PMC_CPU_INTEL_HASWELL_XEON; 201 nclasses = 3; 202 break; 203 case 0x3C: /* Per Intel document 325462-045US 01/2013. */ 204 case 0x45: /* Per Intel document 325462-045US 09/2014. */ --- 33 unchanged lines hidden (view full) --- 238 switch (cputype) { 239#if defined(__i386__) || defined(__amd64__) 240 /* 241 * Intel Core, Core 2 and Atom processors. 242 */ 243 case PMC_CPU_INTEL_ATOM: 244 case PMC_CPU_INTEL_ATOM_SILVERMONT: 245 case PMC_CPU_INTEL_BROADWELL: |
246 case PMC_CPU_INTEL_BROADWELL_XEON: 247 case PMC_CPU_INTEL_SKYLAKE: |
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235 case PMC_CPU_INTEL_CORE: 236 case PMC_CPU_INTEL_CORE2: 237 case PMC_CPU_INTEL_CORE2EXTREME: 238 case PMC_CPU_INTEL_COREI7: 239 case PMC_CPU_INTEL_NEHALEM_EX: 240 case PMC_CPU_INTEL_IVYBRIDGE: 241 case PMC_CPU_INTEL_SANDYBRIDGE: 242 case PMC_CPU_INTEL_WESTMERE: --- 78 unchanged lines hidden (view full) --- 321{ 322 pmc_tsc_finalize(md); 323 324 switch (md->pmd_cputype) { 325#if defined(__i386__) || defined(__amd64__) 326 case PMC_CPU_INTEL_ATOM: 327 case PMC_CPU_INTEL_ATOM_SILVERMONT: 328 case PMC_CPU_INTEL_BROADWELL: | 248 case PMC_CPU_INTEL_CORE: 249 case PMC_CPU_INTEL_CORE2: 250 case PMC_CPU_INTEL_CORE2EXTREME: 251 case PMC_CPU_INTEL_COREI7: 252 case PMC_CPU_INTEL_NEHALEM_EX: 253 case PMC_CPU_INTEL_IVYBRIDGE: 254 case PMC_CPU_INTEL_SANDYBRIDGE: 255 case PMC_CPU_INTEL_WESTMERE: --- 78 unchanged lines hidden (view full) --- 334{ 335 pmc_tsc_finalize(md); 336 337 switch (md->pmd_cputype) { 338#if defined(__i386__) || defined(__amd64__) 339 case PMC_CPU_INTEL_ATOM: 340 case PMC_CPU_INTEL_ATOM_SILVERMONT: 341 case PMC_CPU_INTEL_BROADWELL: |
342 case PMC_CPU_INTEL_BROADWELL_XEON: 343 case PMC_CPU_INTEL_SKYLAKE: |
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329 case PMC_CPU_INTEL_CORE: 330 case PMC_CPU_INTEL_CORE2: 331 case PMC_CPU_INTEL_CORE2EXTREME: 332 case PMC_CPU_INTEL_COREI7: 333 case PMC_CPU_INTEL_NEHALEM_EX: 334 case PMC_CPU_INTEL_HASWELL: 335 case PMC_CPU_INTEL_HASWELL_XEON: 336 case PMC_CPU_INTEL_IVYBRIDGE: --- 45 unchanged lines hidden --- | 344 case PMC_CPU_INTEL_CORE: 345 case PMC_CPU_INTEL_CORE2: 346 case PMC_CPU_INTEL_CORE2EXTREME: 347 case PMC_CPU_INTEL_COREI7: 348 case PMC_CPU_INTEL_NEHALEM_EX: 349 case PMC_CPU_INTEL_HASWELL: 350 case PMC_CPU_INTEL_HASWELL_XEON: 351 case PMC_CPU_INTEL_IVYBRIDGE: --- 45 unchanged lines hidden --- |