| hwpmc_intel.c (206089) | hwpmc_intel.c (232366) |
|---|---|
| 1/*- 2 * Copyright (c) 2008 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Common code for handling Intel CPUs. 29 */ 30 31#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Common code for handling Intel CPUs. 29 */ 30 31#include <sys/cdefs.h> |
| 32__FBSDID("$FreeBSD: head/sys/dev/hwpmc/hwpmc_intel.c 206089 2010-04-02 13:23:49Z fabient $"); | 32__FBSDID("$FreeBSD: head/sys/dev/hwpmc/hwpmc_intel.c 232366 2012-03-01 21:23:26Z davide $"); |
| 33 34#include <sys/param.h> 35#include <sys/pmc.h> 36#include <sys/pmckern.h> 37#include <sys/systm.h> 38 39#include <machine/cpu.h> 40#include <machine/cputypes.h> --- 96 unchanged lines hidden (view full) --- 137 cputype = PMC_CPU_INTEL_COREI7; 138 nclasses = 5; 139 break; 140 case 0x25: /* Per Intel document 253669-033US 12/2009. */ 141 case 0x2C: /* Per Intel document 253669-033US 12/2009. */ 142 cputype = PMC_CPU_INTEL_WESTMERE; 143 nclasses = 5; 144 break; | 33 34#include <sys/param.h> 35#include <sys/pmc.h> 36#include <sys/pmckern.h> 37#include <sys/systm.h> 38 39#include <machine/cpu.h> 40#include <machine/cputypes.h> --- 96 unchanged lines hidden (view full) --- 137 cputype = PMC_CPU_INTEL_COREI7; 138 nclasses = 5; 139 break; 140 case 0x25: /* Per Intel document 253669-033US 12/2009. */ 141 case 0x2C: /* Per Intel document 253669-033US 12/2009. */ 142 cputype = PMC_CPU_INTEL_WESTMERE; 143 nclasses = 5; 144 break; |
| 145 case 0x2A: /* Per Intel document 253669-039US 05/2011. */ 146 case 0x2D: /* Per Intel document 253669-041US 12/2011. */ 147 cputype = PMC_CPU_INTEL_SANDYBRIDGE; 148 nclasses = 5; 149 break; |
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| 145 } 146 break; 147#if defined(__i386__) || defined(__amd64__) 148 case 0xF00: /* P4 */ 149 if (model >= 0 && model <= 6) /* known models */ 150 cputype = PMC_CPU_INTEL_PIV; 151 break; 152 } --- 24 unchanged lines hidden (view full) --- 177 /* 178 * Intel Core, Core 2 and Atom processors. 179 */ 180 case PMC_CPU_INTEL_ATOM: 181 case PMC_CPU_INTEL_CORE: 182 case PMC_CPU_INTEL_CORE2: 183 case PMC_CPU_INTEL_CORE2EXTREME: 184 case PMC_CPU_INTEL_COREI7: | 150 } 151 break; 152#if defined(__i386__) || defined(__amd64__) 153 case 0xF00: /* P4 */ 154 if (model >= 0 && model <= 6) /* known models */ 155 cputype = PMC_CPU_INTEL_PIV; 156 break; 157 } --- 24 unchanged lines hidden (view full) --- 182 /* 183 * Intel Core, Core 2 and Atom processors. 184 */ 185 case PMC_CPU_INTEL_ATOM: 186 case PMC_CPU_INTEL_CORE: 187 case PMC_CPU_INTEL_CORE2: 188 case PMC_CPU_INTEL_CORE2EXTREME: 189 case PMC_CPU_INTEL_COREI7: |
| 190 case PMC_CPU_INTEL_SANDYBRIDGE: |
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| 185 case PMC_CPU_INTEL_WESTMERE: 186 error = pmc_core_initialize(pmc_mdep, ncpus); 187 break; 188 189 /* 190 * Intel Pentium 4 Processors, and P4/EMT64 processors. 191 */ 192 --- 44 unchanged lines hidden (view full) --- 237 * Init the uncore class. 238 */ 239#if defined(__i386__) || defined(__amd64__) 240 switch (cputype) { 241 /* 242 * Intel Corei7 and Westmere processors. 243 */ 244 case PMC_CPU_INTEL_COREI7: | 191 case PMC_CPU_INTEL_WESTMERE: 192 error = pmc_core_initialize(pmc_mdep, ncpus); 193 break; 194 195 /* 196 * Intel Pentium 4 Processors, and P4/EMT64 processors. 197 */ 198 --- 44 unchanged lines hidden (view full) --- 243 * Init the uncore class. 244 */ 245#if defined(__i386__) || defined(__amd64__) 246 switch (cputype) { 247 /* 248 * Intel Corei7 and Westmere processors. 249 */ 250 case PMC_CPU_INTEL_COREI7: |
| 251 case PMC_CPU_INTEL_SANDYBRIDGE: |
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| 245 case PMC_CPU_INTEL_WESTMERE: 246 error = pmc_uncore_initialize(pmc_mdep, ncpus); 247 break; 248 default: 249 break; 250 } 251#endif 252 --- 13 unchanged lines hidden (view full) --- 266 267 switch (md->pmd_cputype) { 268#if defined(__i386__) || defined(__amd64__) 269 case PMC_CPU_INTEL_ATOM: 270 case PMC_CPU_INTEL_CORE: 271 case PMC_CPU_INTEL_CORE2: 272 case PMC_CPU_INTEL_CORE2EXTREME: 273 case PMC_CPU_INTEL_COREI7: | 252 case PMC_CPU_INTEL_WESTMERE: 253 error = pmc_uncore_initialize(pmc_mdep, ncpus); 254 break; 255 default: 256 break; 257 } 258#endif 259 --- 13 unchanged lines hidden (view full) --- 273 274 switch (md->pmd_cputype) { 275#if defined(__i386__) || defined(__amd64__) 276 case PMC_CPU_INTEL_ATOM: 277 case PMC_CPU_INTEL_CORE: 278 case PMC_CPU_INTEL_CORE2: 279 case PMC_CPU_INTEL_CORE2EXTREME: 280 case PMC_CPU_INTEL_COREI7: |
| 281 case PMC_CPU_INTEL_SANDYBRIDGE: |
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| 274 case PMC_CPU_INTEL_WESTMERE: 275 pmc_core_finalize(md); 276 break; 277 278 case PMC_CPU_INTEL_PIV: 279 pmc_p4_finalize(md); 280 break; 281#endif --- 14 unchanged lines hidden (view full) --- 296 } 297 298 /* 299 * Uncore. 300 */ 301#if defined(__i386__) || defined(__amd64__) 302 switch (md->pmd_cputype) { 303 case PMC_CPU_INTEL_COREI7: | 282 case PMC_CPU_INTEL_WESTMERE: 283 pmc_core_finalize(md); 284 break; 285 286 case PMC_CPU_INTEL_PIV: 287 pmc_p4_finalize(md); 288 break; 289#endif --- 14 unchanged lines hidden (view full) --- 304 } 305 306 /* 307 * Uncore. 308 */ 309#if defined(__i386__) || defined(__amd64__) 310 switch (md->pmd_cputype) { 311 case PMC_CPU_INTEL_COREI7: |
| 312 case PMC_CPU_INTEL_SANDYBRIDGE: |
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| 304 case PMC_CPU_INTEL_WESTMERE: 305 pmc_uncore_finalize(md); 306 break; 307 default: 308 break; 309 } 310#endif 311} | 313 case PMC_CPU_INTEL_WESTMERE: 314 pmc_uncore_finalize(md); 315 break; 316 default: 317 break; 318 } 319#endif 320} |