| fwohci.c (167086) | fwohci.c (167628) |
|---|---|
| 1/*- 2 * Copyright (c) 2003 Hidetoshi Shimokawa 3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 17 unchanged lines hidden (view full) --- 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 * | 1/*- 2 * Copyright (c) 2003 Hidetoshi Shimokawa 3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 17 unchanged lines hidden (view full) --- 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 * |
| 34 * $FreeBSD: head/sys/dev/firewire/fwohci.c 167086 2007-02-27 17:23:29Z jhb $ | 34 * $FreeBSD: head/sys/dev/firewire/fwohci.c 167628 2007-03-16 04:25:02Z simokawa $ |
| 35 * 36 */ 37 38#define ATRQ_CH 0 39#define ATRS_CH 1 40#define ARRQ_CH 2 41#define ARRS_CH 3 42#define ITX_CH 4 --- 1829 unchanged lines hidden (view full) --- 1872 OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_PRRQ); 1873#endif 1874#if 0 1875 dump_dma(sc, ARRQ_CH); 1876 dump_db(sc, ARRQ_CH); 1877#endif 1878 fwohci_arcv(sc, &sc->arrq, count); 1879 } | 35 * 36 */ 37 38#define ATRQ_CH 0 39#define ATRS_CH 1 40#define ARRQ_CH 2 41#define ARRS_CH 3 42#define ITX_CH 4 --- 1829 unchanged lines hidden (view full) --- 1872 OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_PRRQ); 1873#endif 1874#if 0 1875 dump_dma(sc, ARRQ_CH); 1876 dump_db(sc, ARRQ_CH); 1877#endif 1878 fwohci_arcv(sc, &sc->arrq, count); 1879 } |
| 1880 if (stat & OHCI_INT_CYC_LOST) { 1881 if (sc->cycle_lost >= 0) 1882 sc->cycle_lost ++; 1883 if (sc->cycle_lost > 10) { 1884 sc->cycle_lost = -1; 1885#if 0 1886 OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCTIMER); 1887#endif 1888 OWRITE(sc, FWOHCI_INTMASKCLR, OHCI_INT_CYC_LOST); 1889 device_printf(fc->dev, "too many cycle lost, " 1890 "no cycle master presents?\n"); 1891 } 1892 } |
|
| 1880 if(stat & OHCI_INT_PHY_SID){ 1881 uint32_t *buf, node_id; 1882 int plen; 1883 1884#ifndef ACK_ALL 1885 OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_PHY_SID); 1886#endif 1887 /* Enable bus reset interrupt */ --- 14 unchanged lines hidden (view full) --- 1902 plen = OREAD(sc, OHCI_SID_CNT); 1903 1904 device_printf(fc->dev, "node_id=0x%08x, gen=%d, ", 1905 node_id, (plen >> 16) & 0xff); 1906 if (!(node_id & OHCI_NODE_VALID)) { 1907 printf("Bus reset failure\n"); 1908 goto sidout; 1909 } | 1893 if(stat & OHCI_INT_PHY_SID){ 1894 uint32_t *buf, node_id; 1895 int plen; 1896 1897#ifndef ACK_ALL 1898 OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_PHY_SID); 1899#endif 1900 /* Enable bus reset interrupt */ --- 14 unchanged lines hidden (view full) --- 1915 plen = OREAD(sc, OHCI_SID_CNT); 1916 1917 device_printf(fc->dev, "node_id=0x%08x, gen=%d, ", 1918 node_id, (plen >> 16) & 0xff); 1919 if (!(node_id & OHCI_NODE_VALID)) { 1920 printf("Bus reset failure\n"); 1921 goto sidout; 1922 } |
| 1923 1924 /* cycle timer */ 1925 sc->cycle_lost = 0; 1926 OWRITE(sc, FWOHCI_INTMASK, OHCI_INT_CYC_LOST); |
|
| 1910 if (node_id & OHCI_NODE_ROOT) { 1911 printf("CYCLEMASTER mode\n"); 1912 OWRITE(sc, OHCI_LNKCTL, 1913 OHCI_CNTL_CYCMTR | OHCI_CNTL_CYCTIMER); 1914 } else { 1915 printf("non CYCLEMASTER mode\n"); 1916 OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCMTR); 1917 OWRITE(sc, OHCI_LNKCTL, OHCI_CNTL_CYCTIMER); 1918 } | 1927 if (node_id & OHCI_NODE_ROOT) { 1928 printf("CYCLEMASTER mode\n"); 1929 OWRITE(sc, OHCI_LNKCTL, 1930 OHCI_CNTL_CYCMTR | OHCI_CNTL_CYCTIMER); 1931 } else { 1932 printf("non CYCLEMASTER mode\n"); 1933 OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCMTR); 1934 OWRITE(sc, OHCI_LNKCTL, OHCI_CNTL_CYCTIMER); 1935 } |
| 1936 |
|
| 1919 fc->nodeid = node_id & 0x3f; 1920 1921 if (plen & OHCI_SID_ERR) { 1922 device_printf(fc->dev, "SID Error\n"); 1923 goto sidout; 1924 } 1925 plen &= OHCI_SID_CNT_MASK; 1926 if (plen < 4 || plen > OHCI_SIDSIZE) { --- 978 unchanged lines hidden --- | 1937 fc->nodeid = node_id & 0x3f; 1938 1939 if (plen & OHCI_SID_ERR) { 1940 device_printf(fc->dev, "SID Error\n"); 1941 goto sidout; 1942 } 1943 plen &= OHCI_SID_CNT_MASK; 1944 if (plen < 4 || plen > OHCI_SIDSIZE) { --- 978 unchanged lines hidden --- |