| fwohci.c (139749) | fwohci.c (144263) |
|---|---|
| 1/*- 2 * Copyright (c) 2003 Hidetoshi Shimokawa 3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 17 unchanged lines hidden (view full) --- 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 * | 1/*- 2 * Copyright (c) 2003 Hidetoshi Shimokawa 3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 17 unchanged lines hidden (view full) --- 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 * |
| 34 * $FreeBSD: head/sys/dev/firewire/fwohci.c 139749 2005-01-06 01:43:34Z imp $ | 34 * $FreeBSD: head/sys/dev/firewire/fwohci.c 144263 2005-03-29 01:44:59Z sam $ |
| 35 * 36 */ 37 38#define ATRQ_CH 0 39#define ATRS_CH 1 40#define ARRQ_CH 2 41#define ARRS_CH 3 42#define ITX_CH 4 --- 2244 unchanged lines hidden (view full) --- 2287 2288 if( dbch->ndb == 0 ){ 2289 device_printf(sc->fc.dev, "No DB is attached ch=%d\n", ch); 2290 return; 2291 } 2292 pp = dbch->top; 2293 prev = pp->db; 2294 for(idb = 0 ; idb < dbch->ndb ; idb ++ ){ | 35 * 36 */ 37 38#define ATRQ_CH 0 39#define ATRS_CH 1 40#define ARRQ_CH 2 41#define ARRS_CH 3 42#define ITX_CH 4 --- 2244 unchanged lines hidden (view full) --- 2287 2288 if( dbch->ndb == 0 ){ 2289 device_printf(sc->fc.dev, "No DB is attached ch=%d\n", ch); 2290 return; 2291 } 2292 pp = dbch->top; 2293 prev = pp->db; 2294 for(idb = 0 ; idb < dbch->ndb ; idb ++ ){ |
| 2295 if(pp == NULL){ 2296 curr = NULL; 2297 goto outdb; 2298 } | |
| 2299 cp = STAILQ_NEXT(pp, link); 2300 if(cp == NULL){ 2301 curr = NULL; 2302 goto outdb; 2303 } 2304 np = STAILQ_NEXT(cp, link); 2305 for(jdb = 0 ; jdb < dbch->ndesc ; jdb ++ ){ 2306 if ((cmd & 0xfffffff0) == cp->bus_addr) { 2307 curr = cp->db; 2308 if(np != NULL){ 2309 next = np->db; 2310 }else{ 2311 next = NULL; 2312 } 2313 goto outdb; 2314 } 2315 } 2316 pp = STAILQ_NEXT(pp, link); | 2295 cp = STAILQ_NEXT(pp, link); 2296 if(cp == NULL){ 2297 curr = NULL; 2298 goto outdb; 2299 } 2300 np = STAILQ_NEXT(cp, link); 2301 for(jdb = 0 ; jdb < dbch->ndesc ; jdb ++ ){ 2302 if ((cmd & 0xfffffff0) == cp->bus_addr) { 2303 curr = cp->db; 2304 if(np != NULL){ 2305 next = np->db; 2306 }else{ 2307 next = NULL; 2308 } 2309 goto outdb; 2310 } 2311 } 2312 pp = STAILQ_NEXT(pp, link); |
| 2313 if(pp == NULL){ 2314 curr = NULL; 2315 goto outdb; 2316 } |
|
| 2317 prev = pp->db; 2318 } 2319outdb: 2320 if( curr != NULL){ 2321#if 0 2322 printf("Prev DB %d\n", ch); 2323 print_db(pp, prev, ch, dbch->ndesc); 2324#endif --- 582 unchanged lines hidden --- | 2317 prev = pp->db; 2318 } 2319outdb: 2320 if( curr != NULL){ 2321#if 0 2322 printf("Prev DB %d\n", ch); 2323 print_db(pp, prev, ch, dbch->ndesc); 2324#endif --- 582 unchanged lines hidden --- |