fwohci.c (111787) | fwohci.c (111892) |
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1/* 2 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * | 1/* 2 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * |
33 * $FreeBSD: head/sys/dev/firewire/fwohci.c 111787 2003-03-03 04:10:56Z simokawa $ | 33 * $FreeBSD: head/sys/dev/firewire/fwohci.c 111892 2003-03-05 01:50:57Z simokawa $ |
34 * 35 */ 36 37#define ATRQ_CH 0 38#define ATRS_CH 1 39#define ARRQ_CH 2 40#define ARRS_CH 3 41#define ITX_CH 4 --- 1538 unchanged lines hidden (view full) --- 1580 unsigned short tag, ich; 1581 u_int32_t stat; 1582 struct fwohci_dbch *dbch; 1583 struct fw_bulkxfer *first, *prev, *chunk; 1584 struct fw_xferq *ir; 1585 1586 dbch = &sc->ir[dmach]; 1587 ir = &dbch->xferq; | 34 * 35 */ 36 37#define ATRQ_CH 0 38#define ATRS_CH 1 39#define ARRQ_CH 2 40#define ARRS_CH 3 41#define ITX_CH 4 --- 1538 unchanged lines hidden (view full) --- 1580 unsigned short tag, ich; 1581 u_int32_t stat; 1582 struct fwohci_dbch *dbch; 1583 struct fw_bulkxfer *first, *prev, *chunk; 1584 struct fw_xferq *ir; 1585 1586 dbch = &sc->ir[dmach]; 1587 ir = &dbch->xferq; |
1588 ldesc = dbch->ndesc - 1; | |
1589 1590 if ((ir->flag & FWXFERQ_RUNNING) == 0) { 1591 tag = (ir->flag >> 6) & 3; 1592 ich = ir->flag & 0x3f; 1593 OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich); 1594 1595 ir->queued = 0; 1596 dbch->ndb = ir->bnpacket * ir->bnchunk; --- 7 unchanged lines hidden (view full) --- 1604 fwohci_db_init(dbch); 1605 if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) 1606 return ENOMEM; 1607 err = fwohci_rx_enable(sc, dbch); 1608 } 1609 if(err) 1610 return err; 1611 | 1588 1589 if ((ir->flag & FWXFERQ_RUNNING) == 0) { 1590 tag = (ir->flag >> 6) & 3; 1591 ich = ir->flag & 0x3f; 1592 OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich); 1593 1594 ir->queued = 0; 1595 dbch->ndb = ir->bnpacket * ir->bnchunk; --- 7 unchanged lines hidden (view full) --- 1603 fwohci_db_init(dbch); 1604 if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) 1605 return ENOMEM; 1606 err = fwohci_rx_enable(sc, dbch); 1607 } 1608 if(err) 1609 return err; 1610 |
1612 s = splfw(); 1613 | |
1614 first = STAILQ_FIRST(&ir->stfree); 1615 if (first == NULL) { 1616 device_printf(fc->dev, "IR DMA no free chunk\n"); 1617 splx(s); 1618 return 0; 1619 } 1620 | 1611 first = STAILQ_FIRST(&ir->stfree); 1612 if (first == NULL) { 1613 device_printf(fc->dev, "IR DMA no free chunk\n"); 1614 splx(s); 1615 return 0; 1616 } 1617 |
1618 ldesc = dbch->ndesc - 1; 1619 s = splfw(); |
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1621 prev = STAILQ_LAST(&ir->stdma, fw_bulkxfer, link); 1622 while ((chunk = STAILQ_FIRST(&ir->stfree)) != NULL) { 1623 volatile struct fwohcidb *db; 1624 1625 db = ((struct fwohcidb_tr *)(chunk->end))->db; 1626 db[ldesc].db.desc.status = db[ldesc].db.desc.count = 0; 1627 db[ldesc].db.desc.depend &= ~0xf; 1628 if (prev != NULL) { --- 1182 unchanged lines hidden --- | 1620 prev = STAILQ_LAST(&ir->stdma, fw_bulkxfer, link); 1621 while ((chunk = STAILQ_FIRST(&ir->stfree)) != NULL) { 1622 volatile struct fwohcidb *db; 1623 1624 db = ((struct fwohcidb_tr *)(chunk->end))->db; 1625 db[ldesc].db.desc.status = db[ldesc].db.desc.count = 0; 1626 db[ldesc].db.desc.depend &= ~0xf; 1627 if (prev != NULL) { --- 1182 unchanged lines hidden --- |