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fwohci.c (109644) fwohci.c (109736)
1/*
2 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 16 unchanged lines hidden (view full) ---

25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
1/*
2 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/dev/firewire/fwohci.c 109644 2003-01-21 16:24:35Z simokawa $
33 * $FreeBSD: head/sys/dev/firewire/fwohci.c 109736 2003-01-23 13:34:40Z simokawa $
34 *
35 */
36
37#define ATRQ_CH 0
38#define ATRS_CH 1
39#define ARRQ_CH 2
40#define ARRS_CH 3
41#define ITX_CH 4

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655
656/* SID recieve buffer must allign 2^11 */
657#define OHCI_SIDSIZE (1 << 11)
658 sc->fc.sid_buf = (u_int32_t *) malloc(OHCI_SIDSIZE, M_DEVBUF, M_NOWAIT);
659 if (sc->fc.sid_buf == NULL) {
660 device_printf(dev, "sid_buf alloc failed.\n");
661 return ENOMEM;
662 }
34 *
35 */
36
37#define ATRQ_CH 0
38#define ATRS_CH 1
39#define ARRQ_CH 2
40#define ARRS_CH 3
41#define ITX_CH 4

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655
656/* SID recieve buffer must allign 2^11 */
657#define OHCI_SIDSIZE (1 << 11)
658 sc->fc.sid_buf = (u_int32_t *) malloc(OHCI_SIDSIZE, M_DEVBUF, M_NOWAIT);
659 if (sc->fc.sid_buf == NULL) {
660 device_printf(dev, "sid_buf alloc failed.\n");
661 return ENOMEM;
662 }
663
663 if (((u_int32_t) sc->fc.sid_buf & (OHCI_SIDSIZE - 1)) != 0) {
664 device_printf(dev, "sid_buf(%p) not aligned.\n",
665 sc->fc.sid_buf);
666 return ENOMEM;
667 }
664
665 fwohci_db_init(&sc->arrq);
666 if ((sc->arrq.flags & FWOHCI_DBCH_INIT) == 0)
667 return ENOMEM;
668
669 fwohci_db_init(&sc->arrs);
670 if ((sc->arrs.flags & FWOHCI_DBCH_INIT) == 0)
671 return ENOMEM;

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1536}
1537
1538static int
1539fwohci_irxbuf_enable(struct firewire_comm *fc, int dmach)
1540{
1541 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1542 int err = 0;
1543 unsigned short tag, ich;
668
669 fwohci_db_init(&sc->arrq);
670 if ((sc->arrq.flags & FWOHCI_DBCH_INIT) == 0)
671 return ENOMEM;
672
673 fwohci_db_init(&sc->arrs);
674 if ((sc->arrs.flags & FWOHCI_DBCH_INIT) == 0)
675 return ENOMEM;

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1540}
1541
1542static int
1543fwohci_irxbuf_enable(struct firewire_comm *fc, int dmach)
1544{
1545 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1546 int err = 0;
1547 unsigned short tag, ich;
1548 u_int32_t stat;
1544
1545 if(!(sc->ir[dmach].xferq.flag & FWXFERQ_RUNNING)){
1546 tag = (sc->ir[dmach].xferq.flag >> 6) & 3;
1547 ich = sc->ir[dmach].xferq.flag & 0x3f;
1548 OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich);
1549
1550 sc->ir[dmach].xferq.queued = 0;
1551 sc->ir[dmach].ndb = sc->ir[dmach].xferq.bnpacket *

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1561 fwohci_db_init(&sc->ir[dmach]);
1562 if ((sc->ir[dmach].flags & FWOHCI_DBCH_INIT) == 0)
1563 return ENOMEM;
1564 err = fwohci_rx_enable(sc, &sc->ir[dmach]);
1565 }
1566 if(err)
1567 return err;
1568
1549
1550 if(!(sc->ir[dmach].xferq.flag & FWXFERQ_RUNNING)){
1551 tag = (sc->ir[dmach].xferq.flag >> 6) & 3;
1552 ich = sc->ir[dmach].xferq.flag & 0x3f;
1553 OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich);
1554
1555 sc->ir[dmach].xferq.queued = 0;
1556 sc->ir[dmach].ndb = sc->ir[dmach].xferq.bnpacket *

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1566 fwohci_db_init(&sc->ir[dmach]);
1567 if ((sc->ir[dmach].flags & FWOHCI_DBCH_INIT) == 0)
1568 return ENOMEM;
1569 err = fwohci_rx_enable(sc, &sc->ir[dmach]);
1570 }
1571 if(err)
1572 return err;
1573
1569 if(OREAD(sc, OHCI_IRCTL(dmach)) & OHCI_CNTL_DMA_ACTIVE){
1574 stat = OREAD(sc, OHCI_IRCTL(dmach));
1575 if (stat & OHCI_CNTL_DMA_ACTIVE) {
1570 if(sc->ir[dmach].xferq.stdma2 != NULL){
1571 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend =
1572 vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db) | sc->ir[dmach].ndesc;
1573 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[0].db.desc.depend =
1574 vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db);
1575 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend &= ~0xf;
1576 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->end))->db[0].db.desc.depend &= ~0xf;
1577 }
1576 if(sc->ir[dmach].xferq.stdma2 != NULL){
1577 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend =
1578 vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db) | sc->ir[dmach].ndesc;
1579 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[0].db.desc.depend =
1580 vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db);
1581 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend &= ~0xf;
1582 ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->end))->db[0].db.desc.depend &= ~0xf;
1583 }
1578 }else if(!(OREAD(sc, OHCI_IRCTL(dmach)) & OHCI_CNTL_DMA_ACTIVE)
1579 && !(sc->ir[dmach].xferq.flag & FWXFERQ_PACKET)){
1584 } else if (!(stat & OHCI_CNTL_DMA_ACTIVE)
1585 && !(sc->ir[dmach].xferq.flag & FWXFERQ_PACKET)) {
1586 if (firewire_debug)
1587 device_printf(sc->fc.dev, "IR DMA stat %x\n", stat);
1580 fw_rbuf_update(&sc->fc, dmach, 0);
1581
1582 OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
1583 OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach);
1584 OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach);
1585 OWRITE(sc, OHCI_IR_MASK, 1 << dmach);
1586 OWRITE(sc, OHCI_IRCTLCLR(dmach), 0xf0000000);
1587 OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_ISOHDR);

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1824 }else{
1825 printf("non CYCLEMASTER mode\n");
1826 OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCMTR);
1827 OWRITE(sc, OHCI_LNKCTL, OHCI_CNTL_CYCTIMER);
1828 }
1829 fc->nodeid = OREAD(sc, FWOHCI_NODEID) & 0x3f;
1830
1831 plen = OREAD(sc, OHCI_SID_CNT) & OHCI_SID_CNT_MASK;
1588 fw_rbuf_update(&sc->fc, dmach, 0);
1589
1590 OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
1591 OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach);
1592 OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach);
1593 OWRITE(sc, OHCI_IR_MASK, 1 << dmach);
1594 OWRITE(sc, OHCI_IRCTLCLR(dmach), 0xf0000000);
1595 OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_ISOHDR);

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1832 }else{
1833 printf("non CYCLEMASTER mode\n");
1834 OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCMTR);
1835 OWRITE(sc, OHCI_LNKCTL, OHCI_CNTL_CYCTIMER);
1836 }
1837 fc->nodeid = OREAD(sc, FWOHCI_NODEID) & 0x3f;
1838
1839 plen = OREAD(sc, OHCI_SID_CNT) & OHCI_SID_CNT_MASK;
1840 if (plen < 4 || plen > OHCI_SIDSIZE) {
1841 device_printf(fc->dev, "invalid SID len = %d\n", plen);
1842 goto sidout;
1843 }
1832 plen -= 4; /* chop control info */
1833 buf = malloc(OHCI_SIDSIZE, M_DEVBUF, M_NOWAIT);
1834 if(buf == NULL) goto sidout;
1835 bcopy((void *)(uintptr_t)(volatile void *)(fc->sid_buf + 1),
1836 buf, plen);
1837 fw_sidrcv(fc, buf, plen, 0);
1838 }
1839sidout:

--- 912 unchanged lines hidden --- 		1844 plen -= 4; /* chop control info */
1845 buf = malloc(OHCI_SIDSIZE, M_DEVBUF, M_NOWAIT);
1846 if(buf == NULL) goto sidout;
1847 bcopy((void *)(uintptr_t)(volatile void *)(fc->sid_buf + 1),
1848 buf, plen);
1849 fw_sidrcv(fc, buf, plen, 0);
1850 }
1851sidout:

--- 912 unchanged lines hidden ---