25 *
26 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
27 * To be used with FreeBSD 3.x
28 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
29 *
30 * This version is intended to be a generic template for various
31 * MB86960A/MB86965A based Ethernet cards. It currently supports
32 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
33 * series for ISA, as well as Fujitsu MBH10302 PC card.
34 * There are some currently-
35 * unused hooks embedded, which are primarily intended to support
36 * other types of Ethernet cards, but the author is not sure whether
37 * they are useful.
38 *
39 * This version also includes some alignments to support RE1000,
40 * C-NET(98)P2 and so on. These cards are not for AT-compatibles,
41 * but for NEC PC-98 bus -- a proprietary bus architecture available
42 * only in Japan. Confusingly, it is different from the Microsoft's
43 * PC98 architecture. :-{
44 * Further work for PC-98 version will be available as a part of
45 * FreeBSD(98) project.
46 *
47 * This software is a derivative work of if_ed.c version 1.56 by David
48 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
49 *
50 * The following lines are retained from the original if_ed.c:
51 *
52 * Copyright (C) 1993, David Greenman. This software may be used, modified,
53 * copied, distributed, and sold, in both source and binary form provided
54 * that the above copyright and these terms are retained. Under no
55 * circumstances is the author responsible for the proper functioning
56 * of this software, nor does the author assume any responsibility
57 * for damages incurred with its use.
58 */
59
60/*
61 * TODO:
62 * o To support ISA PnP auto configuration for FMV-183/184.
63 * o To reconsider mbuf usage.
64 * o To reconsider transmission buffer usage, including
65 * transmission buffer size (currently 4KB x 2) and pros-and-
66 * cons of multiple frame transmission.
67 * o To test IPX codes.
68 * o To test FreeBSD3.0-current.
69 */
70
71#include "fe.h"
72#include "opt_fe.h"
73#include "opt_inet.h"
74#include "opt_ipx.h"
75
76#include <sys/param.h>
77#include <sys/systm.h>
78#include <sys/kernel.h>
79#include <sys/sockio.h>
80#include <sys/mbuf.h>
81#include <sys/socket.h>
82#include <sys/bus.h>
83
84#include <net/ethernet.h>
85#include <net/if.h>
86#include <net/if_dl.h>
87#include <net/if_mib.h>
88#include <net/if_media.h>
89#include <net/if_types.h>
90
91#include <netinet/in.h>
92#include <netinet/if_ether.h>
93
94#include <net/bpf.h>
95
96#include <machine/clock.h>
97
98#include <i386/isa/isa_device.h>
99#include <i386/isa/icu.h>
100
101#ifndef COMPAT_OLDISA
102#error "The fe device requires the old isa compatibility shims"
103#endif
104
105/* PCCARD suport */
106/* XXX FIXME! doesn't work with new pccard code, must be converted! */
107#ifdef notdef
108#include "card.h"
109#endif
110#if NCARD > 0
111#include <sys/kernel.h>
112#include <sys/select.h>
113#include <sys/module.h>
114#include <pccard/cardinfo.h>
115#include <pccard/slot.h>
116#endif
117
118#include <i386/isa/ic/mb86960.h>
119#include <i386/isa/if_fereg.h>
120
121/*
122 * Default settings for fe driver specific options.
123 * They can be set in config file by "options" statements.
124 */
125
126/*
127 * Transmit just one packet per a "send" command to 86960.
128 * This option is intended for performance test. An EXPERIMENTAL option.
129 */
130#ifndef FE_SINGLE_TRANSMISSION
131#define FE_SINGLE_TRANSMISSION 0
132#endif
133
134/*
135 * Maximum loops when interrupt.
136 * This option prevents an infinite loop due to hardware failure.
137 * (Some laptops make an infinite loop after PC-Card is ejected.)
138 */
139#ifndef FE_MAX_LOOP
140#define FE_MAX_LOOP 0x800
141#endif
142
143/*
144 * If you define this option, 8-bit cards are also supported.
145 */
146/*#define FE_8BIT_SUPPORT*/
147
148/*
149 * Device configuration flags.
150 */
151
152/* DLCR6 settings. */
153#define FE_FLAGS_DLCR6_VALUE 0x007F
154
155/* Force DLCR6 override. */
156#define FE_FLAGS_OVERRIDE_DLCR6 0x0080
157
158/* Shouldn't these be defined somewhere else such as isa_device.h? */
159#define NO_IOADDR (-1)
160#define NO_IRQ 0
161
162/*
163 * Data type for a multicast address filter on 8696x.
164 */
165struct fe_filter { u_char data [ FE_FILTER_LEN ]; };
166
167/*
168 * Special filter values.
169 */
170static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
171static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
172
173/* How many registers does an fe-supported adapter have at maximum? */
174#define MAXREGISTERS 32
175
176/*
177 * fe_softc: per line info and status
178 */
179static struct fe_softc {
180
181 /* Used by "common" codes. */
182 struct arpcom arpcom; /* Ethernet common */
183
184 /* Used by config codes. */
185
186 /* Set by probe() and not modified in later phases. */
187 char const * typestr; /* printable name of the interface. */
188 u_short iobase; /* base I/O address of the adapter. */
189 u_short ioaddr [ MAXREGISTERS ]; /* I/O addresses of registers. */
190 u_short txb_size; /* size of TX buffer, in bytes */
191 u_char proto_dlcr4; /* DLCR4 prototype. */
192 u_char proto_dlcr5; /* DLCR5 prototype. */
193 u_char proto_dlcr6; /* DLCR6 prototype. */
194 u_char proto_dlcr7; /* DLCR7 prototype. */
195 u_char proto_bmpr13; /* BMPR13 prototype. */
196 u_char stability; /* How stable is this? */
197 u_short priv_info; /* info specific to a vendor/model. */
198
199 /* Vendor/model specific hooks. */
200 void (*init)(struct fe_softc *); /* Just before fe_init(). */
201 void (*stop)(struct fe_softc *); /* Just after fe_stop(). */
202
203 /* Transmission buffer management. */
204 u_short txb_free; /* free bytes in TX buffer */
205 u_char txb_count; /* number of packets in TX buffer */
206 u_char txb_sched; /* number of scheduled packets */
207
208 /* Excessive collision counter (see fe_tint() for details.) */
209 u_char tx_excolls; /* # of excessive collisions. */
210
211 /* Multicast address filter management. */
212 u_char filter_change; /* MARs must be changed ASAP. */
213 struct fe_filter filter;/* new filter value. */
214
215 /* Network management. */
216 struct ifmib_iso_8802_3 mibdata;
217
218 /* Media information. */
219 struct ifmedia media; /* used by if_media. */
220 u_short mbitmap; /* bitmap for supported media; see bit2media */
221 int defmedia; /* default media */
222 void (* msel)(struct fe_softc *); /* media selector. */
223
224} fe_softc[NFE];
225
226#define sc_if arpcom.ac_if
227#define sc_unit arpcom.ac_if.if_unit
228#define sc_enaddr arpcom.ac_enaddr
229
230/* Standard driver entry points. These can be static. */
231static int fe_probe ( struct isa_device * );
232static int fe_attach ( struct isa_device * );
233static void fe_init ( void * );
234static ointhand2_t feintr;
235static int fe_ioctl ( struct ifnet *, u_long, caddr_t );
236static void fe_start ( struct ifnet * );
237static void fe_watchdog ( struct ifnet * );
238static int fe_medchange ( struct ifnet * );
239static void fe_medstat ( struct ifnet *, struct ifmediareq * );
240
241/* Local functions. Order of declaration is confused. FIXME. */
242static int fe_probe_ssi ( struct isa_device *, struct fe_softc * );
243static int fe_probe_jli ( struct isa_device *, struct fe_softc * );
244static int fe_probe_fmv ( struct isa_device *, struct fe_softc * );
245static int fe_probe_lnx ( struct isa_device *, struct fe_softc * );
246static int fe_probe_gwy ( struct isa_device *, struct fe_softc * );
247static int fe_probe_ubn ( struct isa_device *, struct fe_softc * );
248#ifdef PC98
249static int fe_probe_re1000 ( struct isa_device *, struct fe_softc * );
250static int fe_probe_cnet9ne( struct isa_device *, struct fe_softc * );
251static int fe_probe_rex ( struct isa_device *, struct fe_softc * );
252#endif
253#if NCARD > 0
254static int fe_probe_mbh ( struct isa_device *, struct fe_softc * );
255static int fe_probe_tdk ( struct isa_device *, struct fe_softc * );
256#endif
257static int fe_get_packet ( struct fe_softc *, u_short );
258static void fe_stop ( struct fe_softc * );
259static void fe_tint ( struct fe_softc *, u_char );
260static void fe_rint ( struct fe_softc *, u_char );
261static void fe_xmit ( struct fe_softc * );
262static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
263static void fe_setmode ( struct fe_softc * );
264static void fe_loadmar ( struct fe_softc * );
265
266#ifdef DIAGNOSTIC
267static void fe_emptybuffer ( struct fe_softc * );
268#endif
269
270/* Driver struct used in the config code. This must be public (external.) */
271struct isa_driver fedriver =
272{
273 INTR_TYPE_NET,
274 fe_probe,
275 fe_attach,
276 "fe",
277 1 /* It's safe to mark as "sensitive" */
278};
279COMPAT_ISA_DRIVER(fe, fedriver);
280
281/*
282 * Fe driver specific constants which relate to 86960/86965.
283 */
284
285/* Interrupt masks */
286#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
287#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
288 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
289
290/* Maximum number of iterations for a receive interrupt. */
291#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
292 /*
293 * Maximum size of SRAM is 65536,
294 * minimum size of transmission buffer in fe is 2x2KB,
295 * and minimum amount of received packet including headers
296 * added by the chip is 64 bytes.
297 * Hence FE_MAX_RECV_COUNT is the upper limit for number
298 * of packets in the receive buffer.
299 */
300
301/*
302 * Miscellaneous definitions not directly related to hardware.
303 */
304
305/* Flags for stability. */
306#define UNSTABLE_IRQ 0x01 /* IRQ setting may be incorrect. */
307#define UNSTABLE_MAC 0x02 /* Probed MAC address may be incorrect. */
308#define UNSTABLE_TYPE 0x04 /* Probed vendor/model may be incorrect. */
309
310/* The following line must be delete when "net/if_media.h" support it. */
311#ifndef IFM_10_FL
312#define IFM_10_FL /* 13 */ IFM_10_5
313#endif
314
315#if 0
316/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
317static int const bit2media [] = {
318#define MB_HA 0x0001
319 IFM_HDX | IFM_ETHER | IFM_AUTO,
320#define MB_HM 0x0002
321 IFM_HDX | IFM_ETHER | IFM_MANUAL,
322#define MB_HT 0x0004
323 IFM_HDX | IFM_ETHER | IFM_10_T,
324#define MB_H2 0x0008
325 IFM_HDX | IFM_ETHER | IFM_10_2,
326#define MB_H5 0x0010
327 IFM_HDX | IFM_ETHER | IFM_10_5,
328#define MB_HF 0x0020
329 IFM_HDX | IFM_ETHER | IFM_10_FL,
330#define MB_FT 0x0040
331 IFM_FDX | IFM_ETHER | IFM_10_T,
332 /* More can be come here... */
333 0
334};
335#else
336/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
337static int const bit2media [] = {
338#define MB_HA 0x0001
339 IFM_ETHER | IFM_AUTO,
340#define MB_HM 0x0002
341 IFM_ETHER | IFM_MANUAL,
342#define MB_HT 0x0004
343 IFM_ETHER | IFM_10_T,
344#define MB_H2 0x0008
345 IFM_ETHER | IFM_10_2,
346#define MB_H5 0x0010
347 IFM_ETHER | IFM_10_5,
348#define MB_HF 0x0020
349 IFM_ETHER | IFM_10_FL,
350#define MB_FT 0x0040
351 IFM_ETHER | IFM_10_T,
352 /* More can be come here... */
353 0
354};
355#endif
356
357/*
358 * Routines to access contiguous I/O ports.
359 */
360
361static void
362inblk ( struct fe_softc * sc, int offs, u_char * mem, int len )
363{
364 while ( --len >= 0 ) {
365 *mem++ = inb( sc->ioaddr[ offs++ ] );
366 }
367}
368
369static void
370outblk ( struct fe_softc * sc, int offs, u_char const * mem, int len )
371{
372 while ( --len >= 0 ) {
373 outb( sc->ioaddr[ offs++ ], *mem++ );
374 }
375}
376
377/* PCCARD Support */
378#if NCARD > 0
379/*
380 * PC-Card (PCMCIA) specific code.
381 */
382static int feinit (struct pccard_devinfo *);
383static void feunload (struct pccard_devinfo *);
384static int fe_card_intr (struct pccard_devinfo *);
385
386PCCARD_MODULE(fe, feinit, feunload, fe_card_intr, 0, net_imask);
387
388/*
389 * Initialize the device - called from Slot manager.
390 */
391static int
392feinit(struct pccard_devinfo *devi)
393{
394 struct fe_softc *sc;
395
396 /* validate unit number. */
397 if (devi->isahd.id_unit >= NFE) return ENODEV;
398
399 /* Prepare for the device probe process. */
400 sc = &fe_softc[devi->isahd.id_unit];
401 sc->sc_unit = devi->isahd.id_unit;
402 sc->iobase = devi->isahd.id_iobase;
403
404 /*
405 * When the feinit() is called, the devi->misc holds a
406 * six-byte value set by the pccard daemon. If the
407 * corresponding entry in /etc/pccard.conf has an "ether"
408 * keyword, the value is the Ethernet MAC address extracted
409 * from CIS area of the card. If the entry has no "ether"
410 * keyword, the daemon fills the field with binary zero,
411 * instead. We passes the value (either MAC address or zero)
412 * to model-specific sub-probe routines through sc->sc_enaddr
413 * (it actually is sc->sc_arpcom.ar_enaddr, BTW) so that the
414 * sub-probe routies can use that info.
415 */
416 bcopy(devi->misc, sc->sc_enaddr, ETHER_ADDR_LEN);
417
418 /* Probe for supported cards. */
419 if (fe_probe_mbh(&devi->isahd, sc) == 0
420 && fe_probe_tdk(&devi->isahd, sc) == 0) return ENXIO;
421
422 /* We've got a supported card. Attach it, then. */
423 if (fe_attach(&devi->isahd) == 0) return ENXIO;
424
425 return 0;
426}
427
428/*
429 * feunload - unload the driver and clear the table.
430 * XXX TODO:
431 * This is usually called when the card is ejected, but
432 * can be caused by a modunload of a controller driver.
433 * The idea is to reset the driver's view of the device
434 * and ensure that any driver entry points such as
435 * read and write do not hang.
436 */
437static void
438feunload(struct pccard_devinfo *devi)
439{
440 struct fe_softc *sc = &fe_softc[devi->isahd.id_unit];
441 printf("fe%d: unload\n", sc->sc_unit);
442 fe_stop(sc);
443 if_down(&sc->arpcom.ac_if);
444}
445
446/*
447 * fe_card_intr - Shared interrupt called from
448 * front end of PC-Card handler.
449 */
450static int
451fe_card_intr(struct pccard_devinfo *devi)
452{
453 feintr(devi->isahd.id_unit);
454 return (1);
455}
456#endif /* NCARD > 0 */
457
458
459/*
460 * Hardware probe routines.
461 *
462 * In older versions of this driver, we provided an automatic I/O
463 * address detection. The features is, however, removed from this
464 * version, for simplicity. Any comments?
465 */
466
467/*
468 * Determine if the device is present at a specified I/O address. The
469 * main entry to the driver.
470 */
471
472static int
473fe_probe (struct isa_device * dev)
474{
475 struct fe_softc * sc;
476 int nports;
477
478#ifdef DIAGNOSTIC
479 if (dev->id_unit >= NFE) {
480 printf("fe%d: too large unit number for the current config\n",
481 dev->id_unit);
482 return 0;
483 }
484#endif
485
486 /* Prepare for the softc struct. */
487 sc = &fe_softc[dev->id_unit];
488 sc->sc_unit = dev->id_unit;
489 sc->iobase = dev->id_iobase;
490
491 /* Probe for supported boards. */
492 nports = 0;
493#ifdef PC98
494 if (!nports) nports = fe_probe_re1000(dev, sc);
495 if (!nports) nports = fe_probe_cnet9ne(dev, sc);
496 if (!nports) nports = fe_probe_rex(dev, sc);
497#endif
498 if (!nports) nports = fe_probe_ssi(dev, sc);
499 if (!nports) nports = fe_probe_jli(dev, sc);
500 if (!nports) nports = fe_probe_fmv(dev, sc);
501 if (!nports) nports = fe_probe_lnx(dev, sc);
502 if (!nports) nports = fe_probe_ubn(dev, sc);
503 if (!nports) nports = fe_probe_gwy(dev, sc);
504
505 /* We found supported board. */
506 return nports;
507}
508
509/*
510 * Check for specific bits in specific registers have specific values.
511 * A common utility function called from various sub-probe routines.
512 */
513
514struct fe_simple_probe_struct
515{
516 u_char port; /* Offset from the base I/O address. */
517 u_char mask; /* Bits to be checked. */
518 u_char bits; /* Values to be compared against. */
519};
520
521static int
522fe_simple_probe ( struct fe_softc const * sc,
523 struct fe_simple_probe_struct const * sp )
524{
525 struct fe_simple_probe_struct const * p;
526
527 for ( p = sp; p->mask != 0; p++ ) {
528#ifdef FE_DEBUG
529 unsigned a = sc->ioaddr[p->port];
530 printf("fe%d: Probing %02x (%04x): %02x (%02x, %02x): %s\n",
531 sc->sc_unit, p->port, a, inb(a), p->mask, p->bits,
532 (inb(a) & p->mask) == p->bits ? "OK" : "NG");
533#endif
534 if ( ( inb( sc->ioaddr[ p->port ] ) & p->mask ) != p->bits )
535 {
536 return ( 0 );
537 }
538 }
539 return ( 1 );
540}
541
542/* Test if a given 6 byte value is a valid Ethernet station (MAC)
543 address. "Vendor" is an expected vendor code (first three bytes,)
544 or a zero when nothing expected. */
545static int
546valid_Ether_p (u_char const * addr, unsigned vendor)
547{
548#ifdef FE_DEBUG
549 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
550#endif
551
552 /* All zero is not allowed as a vendor code. */
553 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
554
555 switch (vendor) {
556 case 0x000000:
557 /* Legal Ethernet address (stored in ROM) must have
558 its Group and Local bits cleared. */
559 if ((addr[0] & 0x03) != 0) return 0;
560 break;
561 case 0x020000:
562 /* Same as above, but a local address is allowed in
563 this context. */
564 if ((addr[0] & 0x01) != 0) return 0;
565 break;
566 default:
567 /* Make sure the vendor part matches if one is given. */
568 if ( addr[0] != ((vendor >> 16) & 0xFF)
569 || addr[1] != ((vendor >> 8) & 0xFF)
570 || addr[2] != ((vendor ) & 0xFF)) return 0;
571 break;
572 }
573
574 /* Host part must not be all-zeros nor all-ones. */
575 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
576 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
577
578 /* Given addr looks like an Ethernet address. */
579 return 1;
580}
581
582/* Fill our softc struct with default value. */
583static void
584fe_softc_defaults (struct fe_softc *sc)
585{
586 int i;
587
588 /* Initialize I/O address re-mapping table for the standard
589 (contiguous) register layout. This routine doesn't use
590 ioaddr[], so the caller can safely override it after
591 calling fe_softc_defaults, if needed. */
592 for (i = 0; i < MAXREGISTERS; i++) sc->ioaddr[i] = sc->iobase + i;
593
594 /* Prepare for typical register prototypes. We assume a
595 "typical" board has <32KB> of <fast> SRAM connected with a
596 <byte-wide> data lines. */
597 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
598 sc->proto_dlcr5 = 0;
599 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
600 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
601 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
602 sc->proto_bmpr13 = 0;
603
604 /* Assume the probe process (to be done later) is stable. */
605 sc->stability = 0;
606
607 /* A typical board needs no hooks. */
608 sc->init = NULL;
609 sc->stop = NULL;
610
611 /* Assume the board has no software-controllable media selection. */
612 sc->mbitmap = MB_HM;
613 sc->defmedia = MB_HM;
614 sc->msel = NULL;
615}
616
617/* Common error reporting routine used in probe routines for
618 "soft configured IRQ"-type boards. */
619static void
620fe_irq_failure (char const *name, int unit, int irq, char const *list)
621{
622 printf("fe%d: %s board is detected, but %s IRQ was given\n",
623 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
624 if (list != NULL) {
625 printf("fe%d: specify an IRQ from %s in kernel config\n",
626 unit, list);
627 }
628}
629
630/*
631 * Hardware (vendor) specific probe routines and hooks.
632 */
633
634/*
635 * Machine independent routines.
636 */
637
638/*
639 * Generic media selection scheme for MB86965 based boards.
640 */
641static void
642fe_msel_965 (struct fe_softc *sc)
643{
644 u_char b13;
645
646 /* Find the appropriate bits for BMPR13 tranceiver control. */
647 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
648 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
649 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
650 default: b13 = FE_B13_PORT_AUI; break;
651 }
652
653 /* Write it into the register. It takes effect immediately. */
654 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | b13);
655}
656
657/*
658 * Fujitsu MB86965 JLI mode support routines.
659 */
660
661/* Datasheet for 86965 explicitly states that it only supports serial
662 * EEPROM with 16 words (32 bytes) capacity. (I.e., 93C06.) However,
663 * ones with 64 words (128 bytes) are available in the marked, namely
664 * 93C46, and are also fully compatible with 86965. It is known that
665 * some boards (e.g., ICL) actually have 93C46 on them and use extra
666 * storage to keep various config info. */
667#define JLI_EEPROM_SIZE 128
668
669/*
670 * Routines to read all bytes from the config EEPROM through MB86965A.
671 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
672 * (93C06 or 93C46.)
673 */
674static void
675fe_strobe_eeprom_jli ( u_short bmpr16 )
676{
677 /*
678 * We must guarantee 1us (or more) interval to access slow
679 * EEPROMs. The following redundant code provides enough
680 * delay with ISA timing. (Even if the bus clock is "tuned.")
681 * Some modification will be needed on faster busses.
682 */
683 outb( bmpr16, FE_B16_SELECT );
684 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK );
685 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK );
686 outb( bmpr16, FE_B16_SELECT );
687}
688
689static void
690fe_read_eeprom_jli ( struct fe_softc * sc, u_char * data )
691{
692 u_short bmpr16 = sc->ioaddr[ FE_BMPR16 ];
693 u_short bmpr17 = sc->ioaddr[ FE_BMPR17 ];
694 u_char n, val, bit;
695 u_char save16, save17;
696
697 /* Save the current value of the EEPROM interface registers. */
698 save16 = inb(bmpr16);
699 save17 = inb(bmpr17);
700
701 /* Read bytes from EEPROM; two bytes per an iteration. */
702 for ( n = 0; n < JLI_EEPROM_SIZE / 2; n++ ) {
703
704 /* Reset the EEPROM interface. */
705 outb( bmpr16, 0x00 );
706 outb( bmpr17, 0x00 );
707
708 /* Start EEPROM access. */
709 outb( bmpr16, FE_B16_SELECT );
710 outb( bmpr17, FE_B17_DATA );
711 fe_strobe_eeprom_jli( bmpr16 );
712
713 /* Pass the iteration count as well as a READ command. */
714 val = 0x80 | n;
715 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
716 outb( bmpr17, ( val & bit ) ? FE_B17_DATA : 0 );
717 fe_strobe_eeprom_jli( bmpr16 );
718 }
719 outb( bmpr17, 0x00 );
720
721 /* Read a byte. */
722 val = 0;
723 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
724 fe_strobe_eeprom_jli( bmpr16 );
725 if ( inb( bmpr17 ) & FE_B17_DATA ) {
726 val |= bit;
727 }
728 }
729 *data++ = val;
730
731 /* Read one more byte. */
732 val = 0;
733 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
734 fe_strobe_eeprom_jli( bmpr16 );
735 if ( inb( bmpr17 ) & FE_B17_DATA ) {
736 val |= bit;
737 }
738 }
739 *data++ = val;
740 }
741
742#if 0
743 /* Reset the EEPROM interface, again. */
744 outb( bmpr16, 0x00 );
745 outb( bmpr17, 0x00 );
746#else
747 /* Make sure to restore the original value of EEPROM interface
748 registers, since we are not yet sure we have MB86965A on
749 the address. */
750 outb(bmpr17, save17);
751 outb(bmpr16, save16);
752#endif
753
754#if 1
755 /* Report what we got. */
756 if (bootverbose) {
757 int i;
758 data -= JLI_EEPROM_SIZE;
759 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
760 printf("fe%d: EEPROM(JLI):%3x: %16D\n",
761 sc->sc_unit, i, data + i, " ");
762 }
763 }
764#endif
765}
766
767static void
768fe_init_jli (struct fe_softc * sc)
769{
770 /* "Reset" by writing into a magic location. */
771 DELAY(200);
772 outb(sc->ioaddr[0x1E], inb(sc->ioaddr[0x1E]));
773 DELAY(300);
774}
775
776/*
777 * SSi 78Q8377A support routines.
778 */
779
780#define SSI_EEPROM_SIZE 512
781#define SSI_DIN 0x01
782#define SSI_DAT 0x01
783#define SSI_CSL 0x02
784#define SSI_CLK 0x04
785#define SSI_EEP 0x10
786
787/*
788 * Routines to read all bytes from the config EEPROM through 78Q8377A.
789 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
790 * 93C56 or 93C66.)
791 *
792 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
793 * sure the following code is correct... It is just stolen from the
794 * C-NET(98)P2 support routine in FreeBSD(98).
795 */
796
797static void
798fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
799{
800 u_short bmpr12 = sc->ioaddr[FE_DLCR12];
801 u_char val, bit;
802 int n;
803 u_char save6, save7, save12;
804
805 /* Save the current value for the DLCR registers we are about
806 to destroy. */
807 save6 = inb(sc->ioaddr[FE_DLCR6]);
808 save7 = inb(sc->ioaddr[FE_DLCR7]);
809
810 /* Put the 78Q8377A into a state that we can access the EEPROM. */
811 outb(sc->ioaddr[FE_DLCR6],
812 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
813 outb(sc->ioaddr[FE_DLCR7],
814 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
815
816 /* Save the current value for the BMPR12 register, too. */
817 save12 = inb(bmpr12);
818
819 /* Read bytes from EEPROM; two bytes per an iteration. */
820 for ( n = 0; n < SSI_EEPROM_SIZE / 2; n++ ) {
821
822 /* Start EEPROM access */
823 outb(bmpr12, SSI_EEP);
824 outb(bmpr12, SSI_EEP | SSI_CSL);
825
826 /* Send the following four bits to the EEPROM in the
827 specified order: a dummy bit, a start bit, and
828 command bits (10) for READ. */
829 outb(bmpr12, SSI_EEP | SSI_CSL );
830 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
831 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT);
832 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
833 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT);
834 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
835 outb(bmpr12, SSI_EEP | SSI_CSL );
836 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
837
838 /* Pass the iteration count to the chip. */
839 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
840 val = ( n & bit ) ? SSI_DAT : 0;
841 outb(bmpr12, SSI_EEP | SSI_CSL | val);
842 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | val);
843 }
844
845 /* Read a byte. */
846 val = 0;
847 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
848 outb(bmpr12, SSI_EEP | SSI_CSL);
849 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK);
850 if (inb(bmpr12) & SSI_DIN) val |= bit;
851 }
852 *data++ = val;
853
854 /* Read one more byte. */
855 val = 0;
856 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
857 outb(bmpr12, SSI_EEP | SSI_CSL);
858 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK);
859 if (inb(bmpr12) & SSI_DIN) val |= bit;
860 }
861 *data++ = val;
862
863 outb(bmpr12, SSI_EEP);
864 }
865
866 /* Reset the EEPROM interface. (For now.) */
867 outb( bmpr12, 0x00 );
868
869 /* Restore the saved register values, for the case that we
870 didn't have 78Q8377A at the given address. */
871 outb(bmpr12, save12);
872 outb(sc->ioaddr[FE_DLCR7], save7);
873 outb(sc->ioaddr[FE_DLCR6], save6);
874
875#if 1
876 /* Report what we got. */
877 if (bootverbose) {
878 int i;
879 data -= SSI_EEPROM_SIZE;
880 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
881 printf("fe%d: EEPROM(SSI):%3x: %16D\n",
882 sc->sc_unit, i, data + i, " ");
883 }
884 }
885#endif
886}
887
888#define FE_SSI_EEP_IRQ 9 /* Irq ??? */
889#define FE_SSI_EEP_ADDR 16 /* Station(MAC) address */
890#define FE_SSI_EEP_DUPLEX 25 /* Duplex mode ??? */
891
892/*
893 * TDK/LANX boards support routines.
894 */
895
896/* AX012/AX013 equips an X24C01 chip, which has 128 bytes of memory cells. */
897#define LNX_EEPROM_SIZE 128
898
899/* Bit assignments and command definitions for the serial EEPROM
900 interface register in LANX ASIC. */
901#define LNX_SDA_HI 0x08 /* Drive SDA line high (logical 1.) */
902#define LNX_SDA_LO 0x00 /* Drive SDA line low (logical 0.) */
903#define LNX_SDA_FL 0x08 /* Float (don't drive) SDA line. */
904#define LNX_SDA_IN 0x01 /* Mask for reading SDA line. */
905#define LNX_CLK_HI 0x04 /* Drive clock line high (active.) */
906#define LNX_CLK_LO 0x00 /* Drive clock line low (inactive.) */
907
908/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
909#define LNX_PH(D,K,N) \
910 ((LNX_SDA_##D | LNX_CLK_##K) << N)
911#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
912 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
913
914#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
915#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
916#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
917#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
918#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
919
920static void
921fe_eeprom_cycle_lnx (u_short reg20, u_long cycle)
922{
923 outb(reg20, (cycle ) & 0xFF);
924 DELAY(15);
925 outb(reg20, (cycle >> 8) & 0xFF);
926 DELAY(15);
927 outb(reg20, (cycle >> 16) & 0xFF);
928 DELAY(15);
929 outb(reg20, (cycle >> 24) & 0xFF);
930 DELAY(15);
931}
932
933static u_char
934fe_eeprom_receive_lnx (u_short reg20)
935{
936 u_char dat;
937
938 outb(reg20, LNX_CLK_HI | LNX_SDA_FL);
939 DELAY(15);
940 dat = inb(reg20);
941 outb(reg20, LNX_CLK_LO | LNX_SDA_FL);
942 DELAY(15);
943 return (dat & LNX_SDA_IN);
944}
945
946static void
947fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
948{
949 int i;
950 u_char n, bit, val;
951 u_char save20;
952 u_short reg20 = sc->ioaddr[0x14];
953
954 save20 = inb(reg20);
955
956 /* NOTE: DELAY() timing constants are approximately three
957 times longer (slower) than the required minimum. This is
958 to guarantee a reliable operation under some tough
959 conditions... Fortunately, this routine is only called
960 during the boot phase, so the speed is less important than
961 stability. */
962
963#if 1
964 /* Reset the X24C01's internal state machine and put it into
965 the IDLE state. We usually don't need this, but *if*
966 someone (e.g., probe routine of other driver) write some
967 garbage into the register at 0x14, synchronization will be
968 lost, and the normal EEPROM access protocol won't work.
969 Moreover, as there are no easy way to reset, we need a
970 _manoeuvre_ here. (It even lacks a reset pin, so pushing
971 the RESET button on the PC doesn't help!) */
972 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_INIT);
973 for (i = 0; i < 10; i++) {
974 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
975 }
976 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP);
977 DELAY(10000);
978#endif
979
980 /* Issue a start condition. */
981 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
982
983 /* Send seven bits of the starting address (zero, in this
984 case) and a command bit for READ. */
985 val = 0x01;
986 for (bit = 0x80; bit != 0x00; bit >>= 1) {
987 if (val & bit) {
988 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_HI);
989 } else {
990 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
991 }
992 }
993
994 /* Receive an ACK bit. */
995 if (fe_eeprom_receive_lnx(reg20)) {
996 /* ACK was not received. EEPROM is not present (i.e.,
997 this board was not a TDK/LANX) or not working
998 properly. */
999 if (bootverbose) {
1000 printf("fe%d: no ACK received from EEPROM(LNX)\n",
1001 sc->sc_unit);
1002 }
1003 /* Clear the given buffer to indicate we could not get
1004 any info. and return. */
1005 bzero(data, LNX_EEPROM_SIZE);
1006 goto RET;
1007 }
1008
1009 /* Read bytes from EEPROM. */
1010 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
1011
1012 /* Read a byte and store it into the buffer. */
1013 val = 0x00;
1014 for (bit = 0x80; bit != 0x00; bit >>= 1) {
1015 if (fe_eeprom_receive_lnx(reg20)) val |= bit;
1016 }
1017 *data++ = val;
1018
1019 /* Acknowledge if we have to read more. */
1020 if (n < LNX_EEPROM_SIZE - 1) {
1021 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
1022 }
1023 }
1024
1025 /* Issue a STOP condition, de-activating the clock line.
1026 It will be safer to keep the clock line low than to leave
1027 it high. */
1028 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP);
1029
1030 RET:
1031 outb(reg20, save20);
1032
1033#if 1
1034 /* Report what we got. */
1035 if (bootverbose) {
1036 data -= LNX_EEPROM_SIZE;
1037 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
1038 printf("fe%d: EEPROM(LNX):%3x: %16D\n",
1039 sc->sc_unit, i, data + i, " ");
1040 }
1041 }
1042#endif
1043}
1044
1045static void
1046fe_init_lnx ( struct fe_softc * sc )
1047{
1048 /* Reset the 86960. Do we need this? FIXME. */
1049 outb(sc->ioaddr[0x12], 0x06);
1050 DELAY(100);
1051 outb(sc->ioaddr[0x12], 0x07);
1052 DELAY(100);
1053
1054 /* Setup IRQ control register on the ASIC. */
1055 outb(sc->ioaddr[0x14], sc->priv_info);
1056}
1057
1058/*
1059 * Ungermann-Bass boards support routine.
1060 */
1061static void
1062fe_init_ubn ( struct fe_softc * sc )
1063{
1064 /* Do we need this? FIXME. */
1065 outb(sc->ioaddr[FE_DLCR7],
1066 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1067 outb(sc->ioaddr[0x18], 0x00);
1068 DELAY( 200 );
1069
1070 /* Setup IRQ control register on the ASIC. */
1071 outb(sc->ioaddr[0x14], sc->priv_info);
1072}
1073
1074/*
1075 * Machine dependent probe routines.
1076 */
1077
1078#ifdef PC98
1079static int
1080fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc )
1081{
1082 /* PC-98 has no board of this architechture. */
1083 return 0;
1084}
1085
1086/* ioaddr for RE1000/1000Plus - Very dirty! */
1087static u_short ioaddr_re1000[MAXREGISTERS] = {
1088 0x0000, 0x0001, 0x0200, 0x0201, 0x0400, 0x0401, 0x0600, 0x0601,
1089 0x0800, 0x0801, 0x0a00, 0x0a01, 0x0c00, 0x0c01, 0x0e00, 0x0e01,
1090 0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00,
1091 0x1001, 0x1201, 0x1401, 0x1601, 0x1801, 0x1a01, 0x1c01, 0x1e01,
1092};
1093
1094/*
1095 * Probe and initialization for Allied-Telesis RE1000 series.
1096 */
1097static void
1098fe_init_re1000 ( struct fe_softc * sc )
1099{
1100 /* Setup IRQ control register on the ASIC. */
1101 outb(sc->ioaddr[FE_RE1000_IRQCONF], sc->priv_info);
1102}
1103
1104static int
1105fe_probe_re1000 ( struct isa_device * dev, struct fe_softc * sc )
1106{
1107 int i, n;
1108 u_char sum;
1109
1110 static struct fe_simple_probe_struct probe_table [] = {
1111 { FE_DLCR2, 0x58, 0x00 },
1112 { FE_DLCR4, 0x08, 0x00 },
1113 { 0 }
1114 };
1115
1116 /* See if the specified I/O address is possible for RE1000. */
1117 /* [01]D[02468ACE] are allowed. */
1118 if ((sc->iobase & ~0x10E) != 0xD0) return 0;
1119
1120 /* Setup an I/O address mapping table and some others. */
1121 fe_softc_defaults(sc);
1122
1123 /* Re-map ioaddr for RE1000. */
1124 for (i = 0; i < MAXREGISTERS; i++)
1125 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i];
1126
1127 /* See if the card is on its address. */
1128 if (!fe_simple_probe(sc, probe_table)) return 0;
1129
1130 /* Get our station address from EEPROM. */
1131 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1132
1133 /* Make sure it is Allied-Telesis's. */
1134 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return 0;
1135#if 1
1136 /* Calculate checksum. */
1137 sum = inb(sc->ioaddr[0x1e]);
1138 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1139 sum ^= sc->sc_enaddr[i];
1140 }
1141 if (sum != 0) return 0;
1142#endif
1143 /* Setup the board type. */
1144 sc->typestr = "RE1000";
1145
1146 /* This looks like an RE1000 board. It requires an
1147 explicit IRQ setting in config. Make sure we have one,
1148 determining an appropriate value for the IRQ control
1149 register. */
1150 switch (dev->id_irq) {
1151 case IRQ3: n = 0x10; break;
1152 case IRQ5: n = 0x20; break;
1153 case IRQ6: n = 0x40; break;
1154 case IRQ12: n = 0x80; break;
1155 default:
1156 fe_irq_failure(sc->typestr,
1157 sc->sc_unit, dev->id_irq, "3/5/6/12");
1158 return 0;
1159 }
1160 sc->priv_info = inb(sc->ioaddr[FE_RE1000_IRQCONF]) & 0x0f | n;
1161
1162 /* Setup hooks. We need a special initialization procedure. */
1163 sc->init = fe_init_re1000;
1164
1165 /* The I/O address range is fragmented in the RE1000.
1166 It occupies 2*16 I/O addresses, by the way. */
1167 return 2;
1168}
1169
1170/* JLI sub-probe for Allied-Telesis RE1000Plus/ME1500 series. */
1171static u_short const *
1172fe_probe_jli_re1000p (struct fe_softc * sc, u_char const * eeprom)
1173{
1174 int i;
1175 static u_short const irqmaps_re1000p [4] = { IRQ3, IRQ5, IRQ6, IRQ12 };
1176
1177 /* Make sure the EEPROM contains Allied-Telesis bit pattern. */
1178 if (eeprom[1] != 0xFF) return NULL;
1179 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL;
1180 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL;
1181
1182 /* Get our station address from EEPROM, and make sure the
1183 EEPROM contains Allied-Telesis's address. */
1184 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN);
1185 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL;
1186
1187 /* I don't know any sub-model identification. */
1188 sc->typestr = "RE1000Plus/ME1500";
1189
1190 /* Returns the IRQ table for the RE1000Plus. */
1191 return irqmaps_re1000p;
1192}
1193
1194/*
1195 * Probe for Allied-Telesis RE1000Plus/ME1500 series.
1196 */
1197static int
1198fe_probe_jli (struct isa_device * dev, struct fe_softc * sc)
1199{
1200 int i, n;
1201 int irq;
1202 u_char eeprom [JLI_EEPROM_SIZE];
1203 u_short const * irqmap;
1204
1205 static u_short const baseaddr [8] =
1206 { 0x1D6, 0x1D8, 0x1DA, 0x1D4, 0x0D4, 0x0D2, 0x0D8, 0x0D0 };
1207 static struct fe_simple_probe_struct const probe_table [] = {
1208 /* { FE_DLCR1, 0x20, 0x00 }, Doesn't work. */
1209 { FE_DLCR2, 0x50, 0x00 },
1210 { FE_DLCR4, 0x08, 0x00 },
1211 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
1212#if 0
1213 { FE_BMPR16, 0x1B, 0x00 },
1214 { FE_BMPR17, 0x7F, 0x00 },
1215#endif
1216 { 0 }
1217 };
1218
1219 /*
1220 * See if the specified address is possible for MB86965A JLI mode.
1221 */
1222 for (i = 0; i < 8; i++) {
1223 if (baseaddr[i] == sc->iobase) break;
1224 }
1225 if (i == 8) return 0;
1226
1227 /* Fill the softc struct with reasonable default. */
1228 fe_softc_defaults(sc);
1229
1230 /* Re-map ioaddr for RE1000Plus. */
1231 for (i = 0; i < MAXREGISTERS; i++)
1232 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i];
1233
1234 /*
1235 * We should test if MB86965A is on the base address now.
1236 * Unfortunately, it is very hard to probe it reliably, since
1237 * we have no way to reset the chip under software control.
1238 * On cold boot, we could check the "signature" bit patterns
1239 * described in the Fujitsu document. On warm boot, however,
1240 * we can predict almost nothing about register values.
1241 */
1242 if (!fe_simple_probe(sc, probe_table)) return 0;
1243
1244 /* Check if our I/O address matches config info on 86965. */
1245 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
1246 if (baseaddr[n] != sc->iobase) return 0;
1247
1248 /*
1249 * We are now almost sure we have an MB86965 at the given
1250 * address. So, read EEPROM through it. We have to write
1251 * into LSI registers to read from EEPROM. I want to avoid it
1252 * at this stage, but I cannot test the presence of the chip
1253 * any further without reading EEPROM. FIXME.
1254 */
1255 fe_read_eeprom_jli(sc, eeprom);
1256
1257 /* Make sure that config info in EEPROM and 86965 agree. */
1258 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) {
1259 return 0;
1260 }
1261
1262 /* Use 86965 media selection scheme, unless othewise
1263 specified. It is "AUTO always" and "select with BMPR13".
1264 This behaviour covers most of the 86965 based board (as
1265 minimum requirements.) It is backward compatible with
1266 previous versions, also. */
1267 sc->mbitmap = MB_HA;
1268 sc->defmedia = MB_HA;
1269 sc->msel = fe_msel_965;
1270
1271 /* Perform board-specific probe. */
1272 if ((irqmap = fe_probe_jli_re1000p(sc, eeprom)) == NULL) return 0;
1273
1274 /* Find the IRQ read from EEPROM. */
1275 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
1276 irq = irqmap[n];
1277
1278 /* Try to determine IRQ setting. */
1279 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) {
1280 /* The device must be configured with an explicit IRQ. */
1281 printf("fe%d: IRQ auto-detection does not work\n",
1282 sc->sc_unit);
1283 return 0;
1284 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) {
1285 /* Just use the probed IRQ value. */
1286 dev->id_irq = irq;
1287 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) {
1288 /* No problem. Go ahead. */
1289 } else if (dev->id_irq == irq) {
1290 /* Good. Go ahead. */
1291 } else {
1292 /* User must be warned in this case. */
1293 sc->stability |= UNSTABLE_IRQ;
1294 }
1295
1296 /* Setup a hook, which resets te 86965 when the driver is being
1297 initialized. This may solve a nasty bug. FIXME. */
1298 sc->init = fe_init_jli;
1299
1300 /* The I/O address range is fragmented in the RE1000Plus.
1301 It occupies 2*16 I/O addresses, by the way. */
1302 return 2;
1303}
1304
1305/*
1306 * Probe and initialization for Contec C-NET(9N)E series.
1307 */
1308
1309/* TODO: Should be in "if_fereg.h" */
1310#define FE_CNET9NE_INTR 0x10 /* Interrupt Mask? */
1311
1312static void
1313fe_init_cnet9ne ( struct fe_softc * sc )
1314{
1315 /* Enable interrupt? FIXME. */
1316 outb(sc->ioaddr[FE_CNET9NE_INTR], 0x10);
1317}
1318
1319static int
1320fe_probe_cnet9ne ( struct isa_device * dev, struct fe_softc * sc )
1321{
1322 int i;
1323
1324 static struct fe_simple_probe_struct probe_table [] = {
1325 { FE_DLCR2, 0x58, 0x00 },
1326 { FE_DLCR4, 0x08, 0x00 },
1327 { 0 }
1328 };
1329 static u_short ioaddr[MAXREGISTERS - 16] = {
1330 /* 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, */
1331 /* 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, */
1332 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e,
1333 0x401, 0x403, 0x405, 0x407, 0x409, 0x40b, 0x40d, 0x40f,
1334 };
1335
1336 /* See if the specified I/O address is possible for C-NET(9N)E. */
1337 if (sc->iobase != 0x73D0) return 0;
1338
1339 /* Setup an I/O address mapping table and some others. */
1340 fe_softc_defaults(sc);
1341
1342 /* Re-map ioaddr for C-NET(9N)E. */
1343 for (i = 16; i < MAXREGISTERS; i++)
1344 sc->ioaddr[i] = sc->iobase + ioaddr[i - 16];
1345
1346 /* See if the card is on its address. */
1347 if (!fe_simple_probe(sc, probe_table)) return 0;
1348
1349 /* Get our station address from EEPROM. */
1350 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1351
1352 /* Make sure it is Contec's. */
1353 if (!valid_Ether_p(sc->sc_enaddr, 0x00804C)) return 0;
1354
1355 /* Determine the card type. */
1356 if (sc->sc_enaddr[3] == 0x06) {
1357 sc->typestr = "C-NET(9N)C";
1358
1359 /* We seems to need our own IDENT bits... FIXME. */
1360 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
1361
1362 /* C-NET(9N)C requires an explicit IRQ to work. */
1363 if (dev->id_irq == NO_IRQ) {
1364 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL);
1365 return 0;
1366 }
1367 } else {
1368 sc->typestr = "C-NET(9N)E";
1369
1370 /* C-NET(9N)E works only IRQ5. */
1371 if (dev->id_irq != IRQ5) {
1372 fe_irq_failure(sc->typestr,
1373 sc->sc_unit, dev->id_irq, "5");
1374 return 0;
1375 }
1376
1377 /* We need an init hook to initialize ASIC before we start. */
1378 sc->init = fe_init_cnet9ne;
1379 }
1380
1381 /* C-NET(9N)E has 64KB SRAM. */
1382 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB
1383 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM;
1384
1385 /* The I/O address range is fragmented in the C-NET(9N)E.
1386 This is the number of regs at iobase. */
1387 return 16;
1388}
1389
1390/*
1391 * Probe for Contec C-NET(98)P2 series.
1392 * (Logitec LAN-98TP/LAN-98T25P - parhaps)
1393 */
1394static int
1395fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc)
1396{
1397 u_char eeprom [SSI_EEPROM_SIZE];
1398
1399 static struct fe_simple_probe_struct probe_table [] = {
1400 { FE_DLCR2, 0x08, 0x00 },
1401 { FE_DLCR4, 0x08, 0x00 },
1402 { 0 }
1403 };
1404 static u_short const irqmap[] = {
1405 /* INT0 INT1 INT2 */
1406 NO_IRQ, NO_IRQ, NO_IRQ, IRQ3 , NO_IRQ, IRQ5 , IRQ6 , NO_IRQ,
1407 NO_IRQ, IRQ9 , IRQ10 , NO_IRQ, IRQ12 , IRQ13 , NO_IRQ, NO_IRQ,
1408 /* INT3 INT41 INT5 INT6 */
1409 };
1410
1411 /* See if the specified I/O address is possible for 78Q8377A. */
1412 /* [0-D]3D0 are allowed. */
1413 if ((sc->iobase & 0xFFF) != 0x3D0) return 0; /* XXX */
1414
1415 /* Fill the softc struct with default values. */
1416 fe_softc_defaults(sc);
1417
1418 /* See if the card is on its address. */
1419 if (!fe_simple_probe(sc, probe_table)) return 0;
1420
1421 /* We now have to read the config EEPROM. We should be very
1422 careful, since doing so destroys a register. (Remember, we
1423 are not yet sure we have a C-NET(98)P2 board here.) Don't
1424 remember to select BMPRs bofore reading EEPROM, since other
1425 register bank may be selected before the probe() is called. */
1426 fe_read_eeprom_ssi(sc, eeprom);
1427
1428 /* Make sure the Ethernet (MAC) station address is of Contec's. */
1429 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x00804C)) return 0;
1430 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
1431
1432 /* Setup the board type. */
1433 sc->typestr = "C-NET(98)P2";
1434
1435 /* Get IRQ configuration from EEPROM. */
1436 dev->id_irq = irqmap[eeprom[FE_SSI_EEP_IRQ]];
1437 if (dev->id_irq == NO_IRQ) {
1438 fe_irq_failure(sc->typestr,
1439 sc->sc_unit, dev->id_irq, "3/5/6/9/10/12/13");
1440 return 0;
1441 }
1442
1443 /* Get Duplex-mode configuration from EEPROM. */
1444 sc->proto_dlcr4 |= (eeprom[FE_SSI_EEP_DUPLEX] & FE_D4_DSC);
1445
1446 /* Fill softc struct accordingly. */
1447 sc->mbitmap = MB_HT;
1448 sc->defmedia = MB_HT;
1449
1450 /* We have 16 registers. */
1451 return 16;
1452}
1453
1454/*
1455 * Probe for TDK LAC-98012/013/025/9N011 - parhaps.
1456 */
1457static int
1458fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc)
1459{
1460#ifndef FE_8BIT_SUPPORT
1461 printf("fe%d: skip LAC-98012/013(only 16-bit cards are supported)\n",
1462 sc->sc_unit);
1463 return 0;
1464#else
1465 int i;
1466 u_char eeprom [LNX_EEPROM_SIZE];
1467
1468 static struct fe_simple_probe_struct probe_table [] = {
1469 { FE_DLCR2, 0x58, 0x00 },
1470 { FE_DLCR4, 0x08, 0x00 },
1471 { 0 }
1472 };
1473
1474 /* See if the specified I/O address is possible for TDK/LANX boards. */
1475 /* 0D0, 4D0, 8D0, and CD0 are allowed. */
1476 if ((sc->iobase & ~0xC00) != 0xD0) return 0;
1477
1478 /* Fill the softc struct with default values. */
1479 fe_softc_defaults(sc);
1480
1481 /* Re-map ioaddr for LAC-98.
1482 * 0x000, 0x002, 0x004, 0x006, 0x008, 0x00a, 0x00c, 0x00e,
1483 * 0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e,
1484 * 0x200, 0x202, 0x204, 0x206, 0x208, 0x20a, 0x20c, 0x20e,
1485 * 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e,
1486 */
1487 for (i = 0; i < MAXREGISTERS; i++)
1488 sc->ioaddr[i] = sc->iobase + ((i & 7) << 1) + ((i & 0x18) << 5);
1489
1490 /* See if the card is on its address. */
1491 if (!fe_simple_probe(sc, probe_table)) return 0;
1492
1493 /* We now have to read the config EEPROM. We should be very
1494 careful, since doing so destroys a register. (Remember, we
1495 are not yet sure we have a LAC-98012/98013 board here.) */
1496 fe_read_eeprom_lnx(sc, eeprom);
1497
1498 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */
1499 if (!valid_Ether_p(eeprom, 0x008098)) return 0;
1500 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN);
1501
1502 /* Setup the board type. */
1503 sc->typestr = "LAC-98012/98013";
1504
1505 /* This looks like a TDK/LANX board. It requires an
1506 explicit IRQ setting in config. Make sure we have one,
1507 determining an appropriate value for the IRQ control
1508 register. */
1509 switch (dev->id_irq) {
1510 case IRQ3 : sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break;
1511 case IRQ5 : sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break;
1512 case IRQ6 : sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break;
1513 case IRQ12: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break;
1514 default:
1515 fe_irq_failure(sc->typestr,
1516 sc->sc_unit, dev->id_irq, "3/5/6/12");
1517 return 0;
1518 }
1519
1520 /* LAC-98's system bus width is 8-bit. */
1521 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x2KB
1522 | FE_D6_BBW_BYTE | FE_D6_SBW_BYTE | FE_D6_SRAM_150ns;
1523
1524 /* Setup hooks. We need a special initialization procedure. */
1525 sc->init = fe_init_lnx;
1526
1527 /* The I/O address range is fragmented in the LAC-98.
1528 It occupies 16*4 I/O addresses, by the way. */
1529 return 16;
1530#endif /* FE_8BIT_SUPPORT */
1531}
1532
1533/*
1534 * Probe for Gateway Communications' old cards.
1535 * (both as Generic MB86960 probe routine)
1536 */
1537static int
1538fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc )
1539{
1540 static struct fe_simple_probe_struct probe_table [] = {
1541 /* { FE_DLCR2, 0x70, 0x00 }, */
1542 { FE_DLCR2, 0x58, 0x00 },
1543 { FE_DLCR4, 0x08, 0x00 },
1544 { 0 }
1545 };
1546
1547 /* I'm not sure which address is possible, so accepts any. FIXME. */
1548
1549 /* Setup an I/O address mapping table and some others. */
1550 fe_softc_defaults(sc);
1551
1552 /* Does we need to re-map ioaddr? FIXME. */
1553
1554 /* See if the card is on its address. */
1555 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
1556
1557 /* Get our station address from EEPROM. */
1558 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN );
1559 if (!valid_Ether_p(sc->sc_enaddr, 0x000000)) return 0;
1560
1561 /* Determine the card type. */
1562 sc->typestr = "Generic MB86960 Ethernet";
1563 if (valid_Ether_p(sc->sc_enaddr, 0x000061))
1564 sc->typestr = "Gateway Ethernet (Fujitsu chipset)";
1565
1566 /* Gateway's board requires an explicit IRQ to work, since it
1567 is not possible to probe the setting of jumpers. */
1568 if (dev->id_irq == NO_IRQ) {
1569 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL);
1570 return 0;
1571 }
1572
1573 /* We should change return value when re-mapping ioaddr. FIXME. */
1574 return 32;
1575}
1576
1577/*
1578 * Probe for Ungermann-Bass Access/PC N98C+(Model 85152).
1579 */
1580static int
1581fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc)
1582{
1583 u_char sum, save7;
1584 int i;
1585 static struct fe_simple_probe_struct const probe_table [] = {
1586 { FE_DLCR2, 0x58, 0x00 },
1587 { FE_DLCR4, 0x08, 0x00 },
1588 { 0 }
1589 };
1590
1591 /* See if the specified I/O address is possible for Access/PC. */
1592 /* [01][048C]D0 are allowed. */
1593 if ((sc->iobase & ~0x1C00) != 0xD0) return 0;
1594
1595 /* Setup an I/O address mapping table and some others. */
1596 fe_softc_defaults(sc);
1597
1598 /* Re-map ioaddr for Access/PC N98C+.
1599 * 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007,
1600 * 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f,
1601 * 0x200, 0x201, 0x202, 0x203, 0x204, 0x205, 0x206, 0x207,
1602 * 0x208, 0x209, 0x20a, 0x20b, 0x20c, 0x20d, 0x20e, 0x20f,
1603 */
1604 for (i = 16; i < MAXREGISTERS; i++)
1605 sc->ioaddr[i] = sc->iobase + 0x200 - 16 + i;
1606
1607 /* Simple probe. */
1608 if (!fe_simple_probe(sc, probe_table)) return 0;
1609
1610 /* NOTE: Access/NOTE N98 sometimes freeze when reading station
1611 address. In case of using it togather with C-NET(9N)C,
1612 this problem usually happens.
1613 Writing DLCR7 prevents freezing, but I don't know why. FIXME. */
1614
1615 /* Save the current value for the DLCR7 register we are about
1616 to destroy. */
1617 save7 = inb(sc->ioaddr[FE_DLCR7]);
1618 outb(sc->ioaddr[FE_DLCR7],
1619 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1620
1621 /* Get our station address form ID ROM and make sure it is UBN's. */
1622 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1623 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) goto fail_ubn;
1624#if 1
1625 /* Calculate checksum. */
1626 sum = inb(sc->ioaddr[0x1e]);
1627 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1628 sum ^= sc->sc_enaddr[i];
1629 }
1630 if (sum != 0) goto fail_ubn;
1631#endif
1632 /* Setup the board type. */
1633 sc->typestr = "Access/PC";
1634
1635 /* This looks like an AccessPC/N98C+ board. It requires an
1636 explicit IRQ setting in config. Make sure we have one,
1637 determining an appropriate value for the IRQ control
1638 register. */
1639 switch (dev->id_irq) {
1640 case IRQ3: sc->priv_info = 0x01; break;
1641 case IRQ5: sc->priv_info = 0x02; break;
1642 case IRQ6: sc->priv_info = 0x04; break;
1643 case IRQ12: sc->priv_info = 0x08; break;
1644 default:
1645 fe_irq_failure(sc->typestr,
1646 sc->sc_unit, dev->id_irq, "3/5/6/12");
1647 goto fail_ubn;
1648 }
1649
1650 /* Setup hooks. We need a special initialization procedure. */
1651 sc->init = fe_init_ubn;
1652
1653 /* The I/O address range is fragmented in the Access/PC N98C+.
1654 This is the number of regs at iobase. */
1655 return 16;
1656
1657fail_ubn:
1658 outb(sc->ioaddr[FE_DLCR7], save7);
1659 return 0;
1660}
1661
1662/*
1663 * REX boards(non-JLI type) support routine.
1664 */
1665
1666#define REX_EEPROM_SIZE 32
1667#define REX_DAT 0x01
1668
1669static void
1670fe_read_eeprom_rex (struct fe_softc *sc, u_char *data)
1671{
1672 int i;
1673 u_char bit, val;
1674 u_char save16;
1675 u_short reg16 = sc->ioaddr[0x10];
1676
1677 save16 = inb(reg16);
1678
1679 /* Issue a start condition. */
1680 val = inb(reg16) & 0xf0;
1681 outb(reg16, val);
1682
1683 (void)inb(reg16);
1684 (void)inb(reg16);
1685 (void)inb(reg16);
1686 (void)inb(reg16);
1687
1688 /* Read bytes from EEPROM. */
1689 for (i = 0; i < REX_EEPROM_SIZE; i++) {
1690 /* Read a byte and store it into the buffer. */
1691 val = 0x00;
1692 for (bit = 0x01; bit != 0x00; bit <<= 1) {
1693 if (inb(reg16) & REX_DAT) val |= bit;
1694 }
1695 *data++ = val;
1696 }
1697
1698 outb(reg16, save16);
1699
1700#if 1
1701 /* Report what we got. */
1702 if (bootverbose) {
1703 data -= REX_EEPROM_SIZE;
1704 for (i = 0; i < REX_EEPROM_SIZE; i += 16) {
1705 printf("fe%d: EEPROM(REX):%3x: %16D\n",
1706 sc->sc_unit, i, data + i, " ");
1707 }
1708 }
1709#endif
1710}
1711
1712static void
1713fe_init_rex ( struct fe_softc * sc )
1714{
1715 /* Setup IRQ control register on the ASIC. */
1716 outb(sc->ioaddr[0x10], sc->priv_info);
1717}
1718
1719/*
1720 * Probe for RATOC REX-9880/81/82/83 series.
1721 */
1722static int
1723fe_probe_rex (struct isa_device * dev, struct fe_softc * sc)
1724{
1725 int i;
1726 u_char eeprom [REX_EEPROM_SIZE];
1727
1728 static struct fe_simple_probe_struct probe_table [] = {
1729 { FE_DLCR2, 0x58, 0x00 },
1730 { FE_DLCR4, 0x08, 0x00 },
1731 { 0 }
1732 };
1733
1734 /* See if the specified I/O address is possible for REX-9880. */
1735 /* 6[46CE]D0 are allowed. */
1736 if ((sc->iobase & ~0xA00) != 0x64D0) return 0;
1737
1738 /* Setup an I/O address mapping table and some others. */
1739 fe_softc_defaults(sc);
1740
1741 /* Re-map ioaddr for REX-9880. */
1742 for (i = 16; i < MAXREGISTERS; i++)
1743 sc->ioaddr[i] = sc->iobase + 0x100 - 16 + i;
1744
1745 /* See if the card is on its address. */
1746 if (!fe_simple_probe(sc, probe_table)) return 0;
1747
1748 /* We now have to read the config EEPROM. We should be very
1749 careful, since doing so destroys a register. (Remember, we
1750 are not yet sure we have a REX-9880 board here.) */
1751 fe_read_eeprom_rex(sc, eeprom);
1752 for (i = 0; i < ETHER_ADDR_LEN; i++)
1753 sc->sc_enaddr[i] = eeprom[7 - i];
1754
1755 /* Make sure it is RATOC's. */
1756 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0)) return 0;
1757
1758 /* Setup the board type. */
1759 sc->typestr = "REX-9880/9883";
1760
1761 /* This looks like a REX-9880 board. It requires an
1762 explicit IRQ setting in config. Make sure we have one,
1763 determining an appropriate value for the IRQ control
1764 register. */
1765 switch (dev->id_irq) {
1766 case IRQ3: sc->priv_info = 0x10; break;
1767 case IRQ5: sc->priv_info = 0x20; break;
1768 case IRQ6: sc->priv_info = 0x40; break;
1769 case IRQ12: sc->priv_info = 0x80; break;
1770 default:
1771 fe_irq_failure(sc->typestr,
1772 sc->sc_unit, dev->id_irq, "3/5/6/12");
1773 return 0;
1774 }
1775
1776 /* Setup hooks. We need a special initialization procedure. */
1777 sc->init = fe_init_rex;
1778
1779 /* REX-9880 has 64KB SRAM. */
1780 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB
1781 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM;
1782#if 1
1783 sc->proto_dlcr7 |= FE_D7_EOPPOL; /* XXX */
1784#endif
1785 /* The I/O address range is fragmented in the REX-9880.
1786 This is the number of regs at iobase. */
1787 return 16;
1788}
1789#else /* !PC98 */
1790/*
1791 * Probe and initialization for Fujitsu FMV-180 series boards
1792 */
1793
1794static void
1795fe_init_fmv (struct fe_softc *sc)
1796{
1797 /* Initialize ASIC. */
1798 outb( sc->ioaddr[ FE_FMV3 ], 0 );
1799 outb( sc->ioaddr[ FE_FMV10 ], 0 );
1800
1801#if 0
1802 /* "Refresh" hardware configuration. FIXME. */
1803 outb( sc->ioaddr[ FE_FMV2 ], inb( sc->ioaddr[ FE_FMV2 ] ) );
1804#endif
1805
1806 /* Turn the "master interrupt control" flag of ASIC on. */
1807 outb( sc->ioaddr[ FE_FMV3 ], FE_FMV3_IRQENB );
1808}
1809
1810static void
1811fe_msel_fmv184 (struct fe_softc *sc)
1812{
1813 u_char port;
1814
1815 /* FMV-184 has a special "register" to switch between AUI/BNC.
1816 Determine the value to write into the register, based on the
1817 user-specified media selection. */
1818 port = (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_2) ? 0x00 : 0x01;
1819
1820 /* The register is #5 on exntesion register bank...
1821 (Details of the register layout is not yet discovered.) */
1822 outb(sc->ioaddr[0x1B], 0x46); /* ??? */
1823 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */
1824 outb(sc->ioaddr[0x1F], 0xC8); /* ??? */
1825 outb(sc->ioaddr[0x1E], 0x05); /* select ex-reg #5. */
1826 outb(sc->ioaddr[0x1F], port); /* Switch the media. */
1827 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */
1828 outb(sc->ioaddr[0x1F], 0x00); /* ??? */
1829 outb(sc->ioaddr[0x1B], 0x00); /* ??? */
1830
1831 /* Make sure to select "external tranceiver" on MB86964. */
1832 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | FE_B13_PORT_AUI);
1833}
1834
1835static int
1836fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc )
1837{
1838 int n;
1839
1840 static u_short const irqmap [ 4 ] =
1841 { IRQ3, IRQ7, IRQ10, IRQ15 };
1842
1843 static struct fe_simple_probe_struct const probe_table [] = {
1844 { FE_DLCR2, 0x71, 0x00 },
1845 { FE_DLCR4, 0x08, 0x00 },
1846
1847 { FE_FMV0, 0x78, 0x50 }, /* ERRDY+PRRDY */
1848 { FE_FMV1, 0xB0, 0x00 }, /* FMV-183/4 has 0x48 bits. */
1849 { FE_FMV3, 0x7F, 0x00 },
1850
1851 { 0 }
1852 };
1853
1854 /* Board subtypes; it lists known FMV-180 variants. */
1855 struct subtype {
1856 u_short mcode;
1857 u_short mbitmap;
1858 u_short defmedia;
1859 char const * str;
1860 };
1861 static struct subtype const typelist [] = {
1862 { 0x0005, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181" },
1863 { 0x0105, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181A" },
1864 { 0x0003, MB_HM, MB_HM, "FMV-182" },
1865 { 0x0103, MB_HM, MB_HM, "FMV-182A" },
1866 { 0x0804, MB_HT, MB_HT, "FMV-183" },
1867 { 0x0C04, MB_HT, MB_HT, "FMV-183 (on-board)" },
1868 { 0x0803, MB_H2|MB_H5, MB_H2, "FMV-184" },
1869 { 0, MB_HA, MB_HA, "unknown FMV-180 (?)" },
1870 };
1871 struct subtype const * type;
1872
1873 /* Media indicator and "Hardware revision ID" */
1874 u_short mcode;
1875
1876 /* See if the specified address is possible for FMV-180
1877 series. 220, 240, 260, 280, 2A0, 2C0, 300, and 340 are
1878 allowed for all boards, and 200, 2E0, 320, 360, 380, 3A0,
1879 3C0, and 3E0 for PnP boards. */
1880 if ((sc->iobase & ~0x1E0) != 0x200) return 0;
1881
1882 /* Setup an I/O address mapping table and some others. */
1883 fe_softc_defaults(sc);
1884
1885 /* Simple probe. */
1886 if (!fe_simple_probe(sc, probe_table)) return 0;
1887
1888 /* Get our station address from EEPROM, and make sure it is
1889 Fujitsu's. */
1890 inblk(sc, FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
1891 if (!valid_Ether_p(sc->sc_enaddr, 0x00000E)) return 0;
1892
1893 /* Find the supported media and "hardware revision" to know
1894 the model identification. */
1895 mcode = (inb(sc->ioaddr[FE_FMV0]) & FE_FMV0_MEDIA)
1896 | ((inb(sc->ioaddr[FE_FMV1]) & FE_FMV1_REV) << 8);
1897
1898 /* Determine the card type. */
1899 for (type = typelist; type->mcode != 0; type++) {
1900 if (type->mcode == mcode) break;
1901 }
1902 if (type->mcode == 0) {
1903 /* Unknown card type... Hope the driver works. */
1904 sc->stability |= UNSTABLE_TYPE;
1905 if (bootverbose) {
1906 printf("fe%d: unknown config: %x-%x-%x-%x\n",
1907 sc->sc_unit,
1908 inb(sc->ioaddr[FE_FMV0]),
1909 inb(sc->ioaddr[FE_FMV1]),
1910 inb(sc->ioaddr[FE_FMV2]),
1911 inb(sc->ioaddr[FE_FMV3]));
1912 }
1913 }
1914
1915 /* Setup the board type and media information. */
1916 sc->typestr = type->str;
1917 sc->mbitmap = type->mbitmap;
1918 sc->defmedia = type->defmedia;
1919 sc->msel = fe_msel_965;
1920
1921 if (type->mbitmap == (MB_H2 | MB_H5)) {
1922 /* FMV184 requires a special media selection procedure. */
1923 sc->msel = fe_msel_fmv184;
1924 }
1925
1926 /*
1927 * An FMV-180 has been probed.
1928 * Determine which IRQ to be used.
1929 *
1930 * In this version, we give a priority to the kernel config file.
1931 * If the EEPROM and config don't match, say it to the user for
1932 * an attention.
1933 */
1934 n = ( inb( sc->ioaddr[ FE_FMV2 ] ) & FE_FMV2_IRS )
1935 >> FE_FMV2_IRS_SHIFT;
1936 if ( dev->id_irq == NO_IRQ ) {
1937 /* Just use the probed value. */
1938 dev->id_irq = irqmap[ n ];
1939 } else if ( dev->id_irq != irqmap[ n ] ) {
1940 /* Don't match. */
1941 sc->stability |= UNSTABLE_IRQ;
1942 }
1943
1944 /* We need an init hook to initialize ASIC before we start. */
1945 sc->init = fe_init_fmv;
1946
1947 /*
1948 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
1949 */
1950 return 32;
1951}
1952
1953/*
1954 * Fujitsu MB86965 JLI mode probe routines.
1955 *
1956 * 86965 has a special operating mode called JLI (mode 0), under which
1957 * the chip interfaces with ISA bus with a software-programmable
1958 * configuration. (The Fujitsu document calls the feature "Plug and
1959 * play," but it is not compatible with the ISA-PnP spec. designed by
1960 * Intel and Microsoft.) Ethernet cards designed to use JLI are
1961 * almost same, but there are two things which require board-specific
1962 * probe routines: EEPROM layout and IRQ pin connection.
1963 *
1964 * JLI provides a handy way to access EEPROM which should contains the
1965 * chip configuration information (such as I/O port address) as well
1966 * as Ethernet station (MAC) address. The chip configuration info. is
1967 * stored on a fixed location. However, the station address can be
1968 * located anywhere in the EEPROM; it is up to the board designer to
1969 * determine the location. (The manual just says "somewhere in the
1970 * EEPROM.") The fe driver must somehow find out the correct
1971 * location.
1972 *
1973 * Another problem resides in the IRQ pin connection. JLI provides a
1974 * user to choose an IRQ from up to four predefined IRQs. The 86965
1975 * chip has a register to select one out of the four possibilities.
1976 * However, the selection is against the four IRQ pins on the chip.
1977 * (So-called IRQ-A, -B, -C and -D.) It is (again) up to the board
1978 * designer to determine which pin to connect which IRQ line on the
1979 * ISA bus. We need a vendor (or model, for some vendor) specific IRQ
1980 * mapping table.
1981 *
1982 * The routine fe_probe_jli() provides all probe and initialization
1983 * processes which are common to all JLI implementation, and sub-probe
1984 * routines supply board-specific actions.
1985 *
1986 * JLI sub-probe routine has the following template:
1987 *
1988 * u_short const * func (struct fe_softc * sc, u_char const * eeprom);
1989 *
1990 * where eeprom is a pointer to an array of 32 byte data read from the
1991 * config EEPROM on the board. It retuns an IRQ mapping table for the
1992 * board, when the corresponding implementation is detected. It
1993 * returns a NULL otherwise.
1994 *
1995 * Primary purpose of the functin is to analize the config EEPROM,
1996 * determine if it matches with the pattern of that of supported card,
1997 * and extract necessary information from it. One of the information
1998 * expected to be extracted from EEPROM is the Ethernet station (MAC)
1999 * address, which must be set to the softc table of the interface by
2000 * the board-specific routine.
2001 */
2002
2003/* JLI sub-probe for Allied-Telesyn/Allied-Telesis AT1700/RE2000 series. */
2004static u_short const *
2005fe_probe_jli_ati (struct fe_softc * sc, u_char const * eeprom)
2006{
2007 int i;
2008 static u_short const irqmaps_ati [4][4] =
2009 {
2010 { IRQ3, IRQ4, IRQ5, IRQ9 },
2011 { IRQ10, IRQ11, IRQ12, IRQ15 },
2012 { IRQ3, IRQ11, IRQ5, IRQ15 },
2013 { IRQ10, IRQ11, IRQ14, IRQ15 },
2014 };
2015
2016 /* Make sure the EEPROM contains Allied-Telesis/Allied-Telesyn
2017 bit pattern. */
2018 if (eeprom[1] != 0x00) return NULL;
2019 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL;
2020 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL;
2021
2022 /* Get our station address from EEPROM, and make sure the
2023 EEPROM contains ATI's address. */
2024 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN);
2025 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL;
2026
2027 /*
2028 * The following model identification codes are stolen
2029 * from the NetBSD port of the fe driver. My reviewers
2030 * suggested minor revision.
2031 */
2032
2033 /* Determine the card type. */
2034 switch (eeprom[FE_ATI_EEP_MODEL]) {
2035 case FE_ATI_MODEL_AT1700T:
2036 sc->typestr = "AT-1700T/RE2001";
2037 sc->mbitmap = MB_HT;
2038 sc->defmedia = MB_HT;
2039 break;
2040 case FE_ATI_MODEL_AT1700BT:
2041 sc->typestr = "AT-1700BT/RE2003";
2042 sc->mbitmap = MB_HA | MB_HT | MB_H2;
2043 break;
2044 case FE_ATI_MODEL_AT1700FT:
2045 sc->typestr = "AT-1700FT/RE2009";
2046 sc->mbitmap = MB_HA | MB_HT | MB_HF;
2047 break;
2048 case FE_ATI_MODEL_AT1700AT:
2049 sc->typestr = "AT-1700AT/RE2005";
2050 sc->mbitmap = MB_HA | MB_HT | MB_H5;
2051 break;
2052 default:
2053 sc->typestr = "unknown AT-1700/RE2000";
2054 sc->stability |= UNSTABLE_TYPE | UNSTABLE_IRQ;
2055 break;
2056 }
2057
2058#if 0
2059 /* Should we extract default media from eeprom? Linux driver
2060 for AT1700 does it, although previous releases of FreeBSD
2061 don't. FIXME. */
2062 /* Determine the default media selection from the config
2063 EEPROM. The byte at offset EEP_MEDIA is believed to
2064 contain BMPR13 value to be set. We just ignore STP bit or
2065 squelch bit, since we don't support those. (It is
2066 intentional.) */
2067 switch (eeprom[FE_ATI_EEP_MEDIA] & FE_B13_PORT) {
2068 case FE_B13_AUTO:
2069 sc->defmedia = MB_HA;
2070 break;
2071 case FE_B13_TP:
2072 sc->defmedia = MB_HT;
2073 break;
2074 case FE_B13_AUI:
2075 sc->defmedia = sc->mbitmap & (MB_H2|MB_H5|MB_H5); /*XXX*/
2076 break;
2077 default:
2078 sc->defmedia = MB_HA;
2079 break;
2080 }
2081
2082 /* Make sure the default media is compatible with the supported
2083 ones. */
2084 if ((sc->defmedia & sc->mbitmap) == 0) {
2085 if (sc->defmedia == MB_HA) {
2086 sc->defmedia = MB_HT;
2087 } else {
2088 sc->defmedia = MB_HA;
2089 }
2090 }
2091#endif
2092
2093 /*
2094 * Try to determine IRQ settings.
2095 * Different models use different ranges of IRQs.
2096 */
2097 switch ((eeprom[FE_ATI_EEP_REVISION] & 0xf0)
2098 |(eeprom[FE_ATI_EEP_MAGIC] & 0x04)) {
2099 case 0x30: case 0x34: return irqmaps_ati[3];
2100 case 0x10: case 0x14:
2101 case 0x50: case 0x54: return irqmaps_ati[2];
2102 case 0x44: case 0x64: return irqmaps_ati[1];
2103 default: return irqmaps_ati[0];
2104 }
2105}
2106
2107/* JLI sub-probe and msel hook for ICL Ethernet. */
2108
2109static void
2110fe_msel_icl (struct fe_softc *sc)
2111{
2112 u_char d4;
2113
2114 /* Switch between UTP and "external tranceiver" as always. */
2115 fe_msel_965(sc);
2116
2117 /* The board needs one more bit (on DLCR4) be set appropriately. */
2118 if (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_5) {
2119 d4 = sc->proto_dlcr4 | FE_D4_CNTRL;
2120 } else {
2121 d4 = sc->proto_dlcr4 & ~FE_D4_CNTRL;
2122 }
2123 outb(sc->ioaddr[FE_DLCR4], d4);
2124}
2125
2126static u_short const *
2127fe_probe_jli_icl (struct fe_softc * sc, u_char const * eeprom)
2128{
2129 int i;
2130 u_short defmedia;
2131 u_char d6;
2132 static u_short const irqmap_icl [4] = { IRQ9, IRQ10, IRQ5, IRQ15 };
2133
2134 /* Make sure the EEPROM contains ICL bit pattern. */
2135 for (i = 24; i < 39; i++) {
2136 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL;
2137 }
2138 for (i = 112; i < 122; i++) {
2139 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL;
2140 }
2141
2142 /* Make sure the EEPROM contains ICL's permanent station
2143 address. If it isn't, probably this board is not an
2144 ICL's. */
2145 if (!valid_Ether_p(eeprom+122, 0x00004B)) return NULL;
2146
2147 /* Check if the "configured" Ethernet address in the EEPROM is
2148 valid. Use it if it is, or use the "permanent" address instead. */
2149 if (valid_Ether_p(eeprom+4, 0x020000)) {
2150 /* The configured address is valid. Use it. */
2151 bcopy(eeprom+4, sc->sc_enaddr, ETHER_ADDR_LEN);
2152 } else {
2153 /* The configured address is invalid. Use permanent. */
2154 bcopy(eeprom+122, sc->sc_enaddr, ETHER_ADDR_LEN);
2155 }
2156
2157 /* Determine model and supported media. */
2158 switch (eeprom[0x5E]) {
2159 case 0:
2160 sc->typestr = "EtherTeam16i/COMBO";
2161 sc->mbitmap = MB_HA | MB_HT | MB_H5 | MB_H2;
2162 break;
2163 case 1:
2164 sc->typestr = "EtherTeam16i/TP";
2165 sc->mbitmap = MB_HT;
2166 break;
2167 case 2:
2168 sc->typestr = "EtherTeam16i/ErgoPro";
2169 sc->mbitmap = MB_HA | MB_HT | MB_H5;
2170 break;
2171 case 4:
2172 sc->typestr = "EtherTeam16i/DUO";
2173 sc->mbitmap = MB_HA | MB_HT | MB_H2;
2174 break;
2175 default:
2176 sc->typestr = "EtherTeam16i";
2177 sc->stability |= UNSTABLE_TYPE;
2178 if (bootverbose) {
2179 printf("fe%d: unknown model code %02x for EtherTeam16i\n",
2180 sc->sc_unit, eeprom[0x5E]);
2181 }
2182 break;
2183 }
2184
2185 /* I'm not sure the following msel hook is required by all
2186 models or COMBO only... FIXME. */
2187 sc->msel = fe_msel_icl;
2188
2189 /* Make the configured media selection the default media. */
2190 switch (eeprom[0x28]) {
2191 case 0: defmedia = MB_HA; break;
2192 case 1: defmedia = MB_H5; break;
2193 case 2: defmedia = MB_HT; break;
2194 case 3: defmedia = MB_H2; break;
2195 default:
2196 if (bootverbose) {
2197 printf("fe%d: unknown default media: %02x\n",
2198 sc->sc_unit, eeprom[0x28]);
2199 }
2200 defmedia = MB_HA;
2201 break;
2202 }
2203
2204 /* Make sure the default media is compatible with the
2205 supported media. */
2206 if ((defmedia & sc->mbitmap) == 0) {
2207 if (bootverbose) {
2208 printf("fe%d: default media adjusted\n", sc->sc_unit);
2209 }
2210 defmedia = sc->mbitmap;
2211 }
2212
2213 /* Keep the determined default media. */
2214 sc->defmedia = defmedia;
2215
2216 /* ICL has "fat" models. We have to program 86965 to properly
2217 reflect the hardware. */
2218 d6 = sc->proto_dlcr6 & ~(FE_D6_BUFSIZ | FE_D6_BBW);
2219 switch ((eeprom[0x61] << 8) | eeprom[0x60]) {
2220 case 0x2008: d6 |= FE_D6_BUFSIZ_32KB | FE_D6_BBW_BYTE; break;
2221 case 0x4010: d6 |= FE_D6_BUFSIZ_64KB | FE_D6_BBW_WORD; break;
2222 default:
2223 /* We can't support it, since we don't know which bits
2224 to set in DLCR6. */
2225 printf("fe%d: unknown SRAM config for ICL\n", sc->sc_unit);
2226 return NULL;
2227 }
2228 sc->proto_dlcr6 = d6;
2229
2230 /* Returns the IRQ table for the ICL board. */
2231 return irqmap_icl;
2232}
2233
2234/* JLI sub-probe for RATOC REX-5586/5587. */
2235static u_short const *
2236fe_probe_jli_rex (struct fe_softc * sc, u_char const * eeprom)
2237{
2238 int i;
2239 static u_short const irqmap_rex [4] = { IRQ3, IRQ4, IRQ5, NO_IRQ };
2240
2241 /* Make sure the EEPROM contains RATOC's config pattern. */
2242 if (eeprom[1] != eeprom[0]) return NULL;
2243 for (i = 8; i < 32; i++) if (eeprom[i] != 0xFF) return NULL;
2244
2245 /* Get our station address from EEPROM. Note that RATOC
2246 stores it "byte-swapped" in each word. (I don't know why.)
2247 So, we just can't use bcopy().*/
2248 sc->sc_enaddr[0] = eeprom[3];
2249 sc->sc_enaddr[1] = eeprom[2];
2250 sc->sc_enaddr[2] = eeprom[5];
2251 sc->sc_enaddr[3] = eeprom[4];
2252 sc->sc_enaddr[4] = eeprom[7];
2253 sc->sc_enaddr[5] = eeprom[6];
2254
2255 /* Make sure the EEPROM contains RATOC's station address. */
2256 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0)) return NULL;
2257
2258 /* I don't know any sub-model identification. */
2259 sc->typestr = "REX-5586/5587";
2260
2261 /* Returns the IRQ for the RATOC board. */
2262 return irqmap_rex;
2263}
2264
2265/* JLI sub-probe for Unknown board. */
2266static u_short const *
2267fe_probe_jli_unk (struct fe_softc * sc, u_char const * eeprom)
2268{
2269 int i, n, romsize;
2270 static u_short const irqmap [4] = { NO_IRQ, NO_IRQ, NO_IRQ, NO_IRQ };
2271
2272 /* The generic JLI probe considered this board has an 86965
2273 in JLI mode, but any other board-specific routines could
2274 not find the matching implementation. So, we "guess" the
2275 location by looking for a bit pattern which looks like a
2276 MAC address. */
2277
2278 /* Determine how large the EEPROM is. */
2279 for (romsize = JLI_EEPROM_SIZE/2; romsize > 16; romsize >>= 1) {
2280 for (i = 0; i < romsize; i++) {
2281 if (eeprom[i] != eeprom[i+romsize]) break;
2282 }
2283 if (i < romsize) break;
2284 }
2285 romsize <<= 1;
2286
2287 /* Look for a bit pattern which looks like a MAC address. */
2288 for (n = 2; n <= romsize - ETHER_ADDR_LEN; n += 2) {
2289 if (!valid_Ether_p(eeprom + n, 0x000000)) continue;
2290 }
2291
2292 /* If no reasonable address was found, we can't go further. */
2293 if (n > romsize - ETHER_ADDR_LEN) return NULL;
2294
2295 /* Extract our (guessed) station address. */
2296 bcopy(eeprom+n, sc->sc_enaddr, ETHER_ADDR_LEN);
2297
2298 /* We are not sure what type of board it is... */
2299 sc->typestr = "(unknown JLI)";
2300 sc->stability |= UNSTABLE_TYPE | UNSTABLE_MAC;
2301
2302 /* Returns the totally unknown IRQ mapping table. */
2303 return irqmap;
2304}
2305
2306/*
2307 * Probe and initialization for all JLI implementations.
2308 */
2309
2310static int
2311fe_probe_jli (struct isa_device * dev, struct fe_softc * sc)
2312{
2313 int i, n;
2314 int irq;
2315 u_char eeprom [JLI_EEPROM_SIZE];
2316 u_short const * irqmap;
2317
2318 static u_short const baseaddr [8] =
2319 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
2320 static struct fe_simple_probe_struct const probe_table [] = {
2321 { FE_DLCR1, 0x20, 0x00 },
2322 { FE_DLCR2, 0x50, 0x00 },
2323 { FE_DLCR4, 0x08, 0x00 },
2324 { FE_DLCR5, 0x80, 0x00 },
2325#if 0
2326 { FE_BMPR16, 0x1B, 0x00 },
2327 { FE_BMPR17, 0x7F, 0x00 },
2328#endif
2329 { 0 }
2330 };
2331
2332 /*
2333 * See if the specified address is possible for MB86965A JLI mode.
2334 */
2335 for (i = 0; i < 8; i++) {
2336 if (baseaddr[i] == sc->iobase) break;
2337 }
2338 if (i == 8) return 0;
2339
2340 /* Fill the softc struct with reasonable default. */
2341 fe_softc_defaults(sc);
2342
2343 /*
2344 * We should test if MB86965A is on the base address now.
2345 * Unfortunately, it is very hard to probe it reliably, since
2346 * we have no way to reset the chip under software control.
2347 * On cold boot, we could check the "signature" bit patterns
2348 * described in the Fujitsu document. On warm boot, however,
2349 * we can predict almost nothing about register values.
2350 */
2351 if (!fe_simple_probe(sc, probe_table)) return 0;
2352
2353 /* Check if our I/O address matches config info on 86965. */
2354 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
2355 if (baseaddr[n] != sc->iobase) return 0;
2356
2357 /*
2358 * We are now almost sure we have an MB86965 at the given
2359 * address. So, read EEPROM through it. We have to write
2360 * into LSI registers to read from EEPROM. I want to avoid it
2361 * at this stage, but I cannot test the presence of the chip
2362 * any further without reading EEPROM. FIXME.
2363 */
2364 fe_read_eeprom_jli(sc, eeprom);
2365
2366 /* Make sure that config info in EEPROM and 86965 agree. */
2367 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) {
2368 return 0;
2369 }
2370
2371 /* Use 86965 media selection scheme, unless othewise
2372 specified. It is "AUTO always" and "select with BMPR13."
2373 This behaviour covers most of the 86965 based board (as
2374 minimum requirements.) It is backward compatible with
2375 previous versions, also. */
2376 sc->mbitmap = MB_HA;
2377 sc->defmedia = MB_HA;
2378 sc->msel = fe_msel_965;
2379
2380 /* Perform board-specific probe, one by one. Note that the
2381 order of probe is important and should not be changed
2382 arbitrarily. */
2383 if ((irqmap = fe_probe_jli_ati(sc, eeprom)) == NULL
2384 && (irqmap = fe_probe_jli_rex(sc, eeprom)) == NULL
2385 && (irqmap = fe_probe_jli_icl(sc, eeprom)) == NULL
2386 && (irqmap = fe_probe_jli_unk(sc, eeprom)) == NULL) return 0;
2387
2388 /* Find the IRQ read from EEPROM. */
2389 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
2390 irq = irqmap[n];
2391
2392 /* Try to determine IRQ setting. */
2393 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) {
2394 /* The device must be configured with an explicit IRQ. */
2395 printf("fe%d: IRQ auto-detection does not work\n",
2396 sc->sc_unit);
2397 return 0;
2398 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) {
2399 /* Just use the probed IRQ value. */
2400 dev->id_irq = irq;
2401 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) {
2402 /* No problem. Go ahead. */
2403 } else if (dev->id_irq == irq) {
2404 /* Good. Go ahead. */
2405 } else {
2406 /* User must be warned in this case. */
2407 sc->stability |= UNSTABLE_IRQ;
2408 }
2409
2410 /* Setup a hook, which resets te 86965 when the driver is being
2411 initialized. This may solve a nasty bug. FIXME. */
2412 sc->init = fe_init_jli;
2413
2414 /*
2415 * That's all. 86965 JLI occupies 32 I/O addresses, by the way.
2416 */
2417 return 32;
2418}
2419
2420/* Probe for TDK LAK-AX031, which is an SSi 78Q8377A based board. */
2421
2422static int
2423fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc)
2424{
2425 u_char eeprom [SSI_EEPROM_SIZE];
2426
2427 static struct fe_simple_probe_struct probe_table [] = {
2428 { FE_DLCR2, 0x08, 0x00 },
2429 { FE_DLCR4, 0x08, 0x00 },
2430 { 0 }
2431 };
2432
2433 /* See if the specified I/O address is possible for 78Q8377A. */
2434 if ((sc->iobase & ~0x3F0) != 0x000) return 0;
2435
2436 /* Fill the softc struct with default values. */
2437 fe_softc_defaults(sc);
2438
2439 /* See if the card is on its address. */
2440 if (!fe_simple_probe(sc, probe_table)) return 0;
2441
2442 /* We now have to read the config EEPROM. We should be very
2443 careful, since doing so destroys a register. (Remember, we
2444 are not yet sure we have a LAK-AX031 board here.) Don't
2445 remember to select BMPRs bofore reading EEPROM, since other
2446 register bank may be selected before the probe() is called. */
2447 fe_read_eeprom_ssi(sc, eeprom);
2448
2449 /* Make sure the Ethernet (MAC) station address is of TDK's. */
2450 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x008098)) return 0;
2451 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
2452
2453 /* This looks like a TDK-AX031 board. It requires an explicit
2454 IRQ setting in config, since we currently don't know how we
2455 can find the IRQ value assigned by ISA PnP manager. */
2456 if (dev->id_irq == NO_IRQ) {
2457 fe_irq_failure("LAK-AX031", sc->sc_unit, dev->id_irq, NULL);
2458 return 0;
2459 }
2460
2461 /* Fill softc struct accordingly. */
2462 sc->typestr = "LAK-AX031";
2463 sc->mbitmap = MB_HT;
2464 sc->defmedia = MB_HT;
2465
2466 /* We have 16 registers. */
2467 return 16;
2468}
2469
2470/*
2471 * Probe and initialization for TDK/LANX LAC-AX012/013 boards.
2472 */
2473static int
2474fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc)
2475{
2476 u_char eeprom [LNX_EEPROM_SIZE];
2477
2478 static struct fe_simple_probe_struct probe_table [] = {
2479 { FE_DLCR2, 0x58, 0x00 },
2480 { FE_DLCR4, 0x08, 0x00 },
2481 { 0 }
2482 };
2483
2484 /* See if the specified I/O address is possible for TDK/LANX boards. */
2485 /* 300, 320, 340, and 360 are allowed. */
2486 if ((sc->iobase & ~0x060) != 0x300) return 0;
2487
2488 /* Fill the softc struct with default values. */
2489 fe_softc_defaults(sc);
2490
2491 /* See if the card is on its address. */
2492 if (!fe_simple_probe(sc, probe_table)) return 0;
2493
2494 /* We now have to read the config EEPROM. We should be very
2495 careful, since doing so destroys a register. (Remember, we
2496 are not yet sure we have a LAC-AX012/AX013 board here.) */
2497 fe_read_eeprom_lnx(sc, eeprom);
2498
2499 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */
2500 if (!valid_Ether_p(eeprom, 0x008098)) return 0;
2501 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN);
2502
2503 /* This looks like a TDK/LANX board. It requires an
2504 explicit IRQ setting in config. Make sure we have one,
2505 determining an appropriate value for the IRQ control
2506 register. */
2507 switch (dev->id_irq) {
2508 case IRQ3: sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break;
2509 case IRQ4: sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break;
2510 case IRQ5: sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break;
2511 case IRQ9: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break;
2512 default:
2513 fe_irq_failure("LAC-AX012/AX013",
2514 sc->sc_unit, dev->id_irq, "3/4/5/9");
2515 return 0;
2516 }
2517
2518 /* Fill softc struct accordingly. */
2519 sc->typestr = "LAC-AX012/AX013";
2520 sc->init = fe_init_lnx;
2521
2522 /* We have 32 registers. */
2523 return 32;
2524}
2525
2526/*
2527 * Probe and initialization for Gateway Communications' old cards.
2528 */
2529static int
2530fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc )
2531{
2532 static struct fe_simple_probe_struct probe_table [] = {
2533 /* { FE_DLCR2, 0x70, 0x00 }, */
2534 { FE_DLCR2, 0x58, 0x00 },
2535 { FE_DLCR4, 0x08, 0x00 },
2536 { 0 }
2537 };
2538
2539 /* See if the specified I/O address is possible for Gateway boards. */
2540 if ((sc->iobase & ~0x1E0) != 0x200) return 0;
2541
2542 /* Setup an I/O address mapping table and some others. */
2543 fe_softc_defaults(sc);
2544
2545 /* See if the card is on its address. */
2546 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2547
2548 /* Get our station address from EEPROM. */
2549 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN );
2550
2551 /* Make sure it is Gateway Communication's. */
2552 if (!valid_Ether_p(sc->sc_enaddr, 0x000061)) return 0;
2553
2554 /* Gateway's board requires an explicit IRQ to work, since it
2555 is not possible to probe the setting of jumpers. */
2556 if (dev->id_irq == NO_IRQ) {
2557 fe_irq_failure("Gateway Ethernet", sc->sc_unit, NO_IRQ, NULL);
2558 return 0;
2559 }
2560
2561 /* Fill softc struct accordingly. */
2562 sc->typestr = "Gateway Ethernet (Fujitsu chipset)";
2563
2564 /* That's all. The card occupies 32 I/O addresses, as always. */
2565 return 32;
2566}
2567
2568/* Probe and initialization for Ungermann-Bass Network
2569 K.K. "Access/PC" boards. */
2570static int
2571fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc)
2572{
2573#if 0
2574 u_char sum;
2575#endif
2576 static struct fe_simple_probe_struct const probe_table [] = {
2577 { FE_DLCR2, 0x58, 0x00 },
2578 { FE_DLCR4, 0x08, 0x00 },
2579 { 0 }
2580 };
2581
2582 /* See if the specified I/O address is possible for AccessPC/ISA. */
2583 if ((sc->iobase & ~0x0E0) != 0x300) return 0;
2584
2585 /* Setup an I/O address mapping table and some others. */
2586 fe_softc_defaults(sc);
2587
2588 /* Simple probe. */
2589 if (!fe_simple_probe(sc, probe_table)) return 0;
2590
2591 /* Get our station address form ID ROM and make sure it is UBN's. */
2592 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
2593 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) return 0;
2594#if 0
2595 /* Calculate checksum. */
2596 sum = inb(sc->ioaddr[0x1e]);
2597 for (i = 0; i < ETHER_ADDR_LEN; i++) {
2598 sum ^= sc->sc_enaddr[i];
2599 }
2600 if (sum != 0) return 0;
2601#endif
2602 /* This looks like an AccessPC/ISA board. It requires an
2603 explicit IRQ setting in config. Make sure we have one,
2604 determining an appropriate value for the IRQ control
2605 register. */
2606 switch (dev->id_irq) {
2607 case IRQ3: sc->priv_info = 0x02; break;
2608 case IRQ4: sc->priv_info = 0x04; break;
2609 case IRQ5: sc->priv_info = 0x08; break;
2610 case IRQ10: sc->priv_info = 0x10; break;
2611 default:
2612 fe_irq_failure("Access/PC",
2613 sc->sc_unit, dev->id_irq, "3/4/5/10");
2614 return 0;
2615 }
2616
2617 /* Fill softc struct accordingly. */
2618 sc->typestr = "Access/PC";
2619 sc->init = fe_init_ubn;
2620
2621 /* We have 32 registers. */
2622 return 32;
2623}
2624#endif /* PC98 */
2625
2626#if NCARD > 0
2627/*
2628 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
2629 * Note that this is for 10302 only; MBH10304 is handled by fe_probe_tdk().
2630 */
2631
2632static void
2633fe_init_mbh ( struct fe_softc * sc )
2634{
2635 /* Minimal initialization of 86960. */
2636 DELAY( 200 );
2637 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
2638 DELAY( 200 );
2639
2640 /* Disable all interrupts. */
2641 outb( sc->ioaddr[ FE_DLCR2 ], 0 );
2642 outb( sc->ioaddr[ FE_DLCR3 ], 0 );
2643
2644 /* Enable master interrupt flag. */
2645 outb( sc->ioaddr[ FE_MBH0 ], FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE );
2646}
2647
2648static int
2649fe_probe_mbh ( struct isa_device * dev, struct fe_softc * sc )
2650{
2651 static struct fe_simple_probe_struct probe_table [] = {
2652 { FE_DLCR2, 0x58, 0x00 },
2653 { FE_DLCR4, 0x08, 0x00 },
2654 { FE_DLCR6, 0xFF, 0xB6 },
2655 { 0 }
2656 };
2657
2658#ifdef DIAGNOSTIC
2659 /* We need an explicit IRQ. */
2660 if (dev->id_irq == NO_IRQ) return 0;
2661#endif
2662
2663 /* Ethernet MAC address should *NOT* have been given by pccardd,
2664 if this is a true MBH10302; i.e., Ethernet address must be
2665 "all-zero" upon entry. */
2666 if (sc->sc_enaddr[0] || sc->sc_enaddr[1] || sc->sc_enaddr[2] ||
2667 sc->sc_enaddr[3] || sc->sc_enaddr[4] || sc->sc_enaddr[5]) {
2668 return 0;
2669 }
2670
2671 /* Fill the softc struct with default values. */
2672 fe_softc_defaults(sc);
2673
2674 /*
2675 * See if MBH10302 is on its address.
2676 * I'm not sure the following probe code works. FIXME.
2677 */
2678 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2679
2680 /* Get our station address from EEPROM. */
2681 inblk( sc, FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN );
2682
2683 /* Make sure we got a valid station address. */
2684 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
2685
2686 /* Determine the card type. */
2687 sc->typestr = "MBH10302 (PCMCIA)";
2688
2689 /* We seems to need our own IDENT bits... FIXME. */
2690 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
2691
2692 /* Setup hooks. We need a special initialization procedure. */
2693 sc->init = fe_init_mbh;
2694
2695 /*
2696 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
2697 */
2698 return 32;
2699}
2700
2701/*
2702 * Probe and initialization for TDK/CONTEC PCMCIA Ethernet interface.
2703 * by MASUI Kenji <masui@cs.titech.ac.jp>
2704 *
2705 * (Contec uses TDK Ethenet chip -- hosokawa)
2706 *
2707 * This version of fe_probe_tdk has been rewrote to handle
2708 * *generic* PC card implementation of Fujitsu MB8696x family. The
2709 * name _tdk is just for a historical reason. :-)
2710 */
2711static int
2712fe_probe_tdk ( struct isa_device * dev, struct fe_softc * sc )
2713{
2714 static struct fe_simple_probe_struct probe_table [] = {
2715 { FE_DLCR2, 0x50, 0x00 },
2716 { FE_DLCR4, 0x08, 0x00 },
2717 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
2718 { 0 }
2719 };
2720
2721 if ( dev->id_irq == NO_IRQ ) {
2722 return ( 0 );
2723 }
2724
2725 fe_softc_defaults(sc);
2726
2727 /*
2728 * See if C-NET(PC)C is on its address.
2729 */
2730
2731 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2732
2733 /* Determine the card type. */
2734 sc->typestr = "Generic MB8696x/78Q837x Ethernet (PCMCIA)";
2735
2736 /*
2737 * Initialize constants in the per-line structure.
2738 */
2739
2740 /* Make sure we got a valid station address. */
2741 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
2742
2743 /*
2744 * That's all. C-NET(PC)C occupies 16 I/O addresses.
2745 * XXX: Are there any card with 32 I/O addresses? FIXME.
2746 */
2747 return 16;
2748}
2749#endif /* NCARD > 0 */
2750
2751/*
2752 * Install interface into kernel networking data structures
2753 */
2754static int
2755fe_attach ( struct isa_device * dev )
2756{
2757#if NCARD > 0
2758 static int already_ifattach[NFE];
2759#endif
2760 struct fe_softc *sc = &fe_softc[dev->id_unit];
2761 int b;
2762
2763 dev->id_ointr = feintr;
2764
2765 /*
2766 * Initialize ifnet structure
2767 */
2768 sc->sc_if.if_softc = sc;
2769 sc->sc_if.if_unit = sc->sc_unit;
2770 sc->sc_if.if_name = "fe";
2771 sc->sc_if.if_output = ether_output;
2772 sc->sc_if.if_start = fe_start;
2773 sc->sc_if.if_ioctl = fe_ioctl;
2774 sc->sc_if.if_watchdog = fe_watchdog;
2775 sc->sc_if.if_init = fe_init;
2776 sc->sc_if.if_linkmib = &sc->mibdata;
2777 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata);
2778
2779#if 0 /* I'm not sure... */
2780 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
2781#endif
2782
2783 /*
2784 * Set fixed interface flags.
2785 */
2786 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2787
2788#if 1
2789 /*
2790 * Set maximum size of output queue, if it has not been set.
2791 * It is done here as this driver may be started after the
2792 * system initialization (i.e., the interface is PCMCIA.)
2793 *
2794 * I'm not sure this is really necessary, but, even if it is,
2795 * it should be done somewhere else, e.g., in if_attach(),
2796 * since it must be a common workaround for all network drivers.
2797 * FIXME.
2798 */
2799 if ( sc->sc_if.if_snd.ifq_maxlen == 0 ) {
2800 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen;
2801 }
2802#endif
2803
2804#if FE_SINGLE_TRANSMISSION
2805 /* Override txb config to allocate minimum. */
2806 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
2807 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
2808#endif
2809
2810 /* Modify hardware config if it is requested. */
2811 if ( dev->id_flags & FE_FLAGS_OVERRIDE_DLCR6 ) {
2812 sc->proto_dlcr6 = dev->id_flags & FE_FLAGS_DLCR6_VALUE;
2813 }
2814
2815 /* Find TX buffer size, based on the hardware dependent proto. */
2816 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
2817 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
2818 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
2819 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
2820 default:
2821 /* Oops, we can't work with single buffer configuration. */
2822 if (bootverbose) {
2823 printf("fe%d: strange TXBSIZ config; fixing\n",
2824 sc->sc_unit);
2825 }
2826 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
2827 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
2828 sc->txb_size = 2048;
2829 break;
2830 }
2831
2832 /* Initialize the if_media interface. */
2833 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat );
2834 for (b = 0; bit2media[b] != 0; b++) {
2835 if (sc->mbitmap & (1 << b)) {
2836 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
2837 }
2838 }
2839 for (b = 0; bit2media[b] != 0; b++) {
2840 if (sc->defmedia & (1 << b)) {
2841 ifmedia_set(&sc->media, bit2media[b]);
2842 break;
2843 }
2844 }
2845#if 0 /* Turned off; this is called later, when the interface UPs. */
2846 fe_medchange(sc);
2847#endif
2848
2849 /* Attach and stop the interface. */
2850#if NCARD > 0
2851 if (already_ifattach[dev->id_unit] != 1) {
| 25 *
26 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
27 * To be used with FreeBSD 3.x
28 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
29 *
30 * This version is intended to be a generic template for various
31 * MB86960A/MB86965A based Ethernet cards. It currently supports
32 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
33 * series for ISA, as well as Fujitsu MBH10302 PC card.
34 * There are some currently-
35 * unused hooks embedded, which are primarily intended to support
36 * other types of Ethernet cards, but the author is not sure whether
37 * they are useful.
38 *
39 * This version also includes some alignments to support RE1000,
40 * C-NET(98)P2 and so on. These cards are not for AT-compatibles,
41 * but for NEC PC-98 bus -- a proprietary bus architecture available
42 * only in Japan. Confusingly, it is different from the Microsoft's
43 * PC98 architecture. :-{
44 * Further work for PC-98 version will be available as a part of
45 * FreeBSD(98) project.
46 *
47 * This software is a derivative work of if_ed.c version 1.56 by David
48 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
49 *
50 * The following lines are retained from the original if_ed.c:
51 *
52 * Copyright (C) 1993, David Greenman. This software may be used, modified,
53 * copied, distributed, and sold, in both source and binary form provided
54 * that the above copyright and these terms are retained. Under no
55 * circumstances is the author responsible for the proper functioning
56 * of this software, nor does the author assume any responsibility
57 * for damages incurred with its use.
58 */
59
60/*
61 * TODO:
62 * o To support ISA PnP auto configuration for FMV-183/184.
63 * o To reconsider mbuf usage.
64 * o To reconsider transmission buffer usage, including
65 * transmission buffer size (currently 4KB x 2) and pros-and-
66 * cons of multiple frame transmission.
67 * o To test IPX codes.
68 * o To test FreeBSD3.0-current.
69 */
70
71#include "fe.h"
72#include "opt_fe.h"
73#include "opt_inet.h"
74#include "opt_ipx.h"
75
76#include <sys/param.h>
77#include <sys/systm.h>
78#include <sys/kernel.h>
79#include <sys/sockio.h>
80#include <sys/mbuf.h>
81#include <sys/socket.h>
82#include <sys/bus.h>
83
84#include <net/ethernet.h>
85#include <net/if.h>
86#include <net/if_dl.h>
87#include <net/if_mib.h>
88#include <net/if_media.h>
89#include <net/if_types.h>
90
91#include <netinet/in.h>
92#include <netinet/if_ether.h>
93
94#include <net/bpf.h>
95
96#include <machine/clock.h>
97
98#include <i386/isa/isa_device.h>
99#include <i386/isa/icu.h>
100
101#ifndef COMPAT_OLDISA
102#error "The fe device requires the old isa compatibility shims"
103#endif
104
105/* PCCARD suport */
106/* XXX FIXME! doesn't work with new pccard code, must be converted! */
107#ifdef notdef
108#include "card.h"
109#endif
110#if NCARD > 0
111#include <sys/kernel.h>
112#include <sys/select.h>
113#include <sys/module.h>
114#include <pccard/cardinfo.h>
115#include <pccard/slot.h>
116#endif
117
118#include <i386/isa/ic/mb86960.h>
119#include <i386/isa/if_fereg.h>
120
121/*
122 * Default settings for fe driver specific options.
123 * They can be set in config file by "options" statements.
124 */
125
126/*
127 * Transmit just one packet per a "send" command to 86960.
128 * This option is intended for performance test. An EXPERIMENTAL option.
129 */
130#ifndef FE_SINGLE_TRANSMISSION
131#define FE_SINGLE_TRANSMISSION 0
132#endif
133
134/*
135 * Maximum loops when interrupt.
136 * This option prevents an infinite loop due to hardware failure.
137 * (Some laptops make an infinite loop after PC-Card is ejected.)
138 */
139#ifndef FE_MAX_LOOP
140#define FE_MAX_LOOP 0x800
141#endif
142
143/*
144 * If you define this option, 8-bit cards are also supported.
145 */
146/*#define FE_8BIT_SUPPORT*/
147
148/*
149 * Device configuration flags.
150 */
151
152/* DLCR6 settings. */
153#define FE_FLAGS_DLCR6_VALUE 0x007F
154
155/* Force DLCR6 override. */
156#define FE_FLAGS_OVERRIDE_DLCR6 0x0080
157
158/* Shouldn't these be defined somewhere else such as isa_device.h? */
159#define NO_IOADDR (-1)
160#define NO_IRQ 0
161
162/*
163 * Data type for a multicast address filter on 8696x.
164 */
165struct fe_filter { u_char data [ FE_FILTER_LEN ]; };
166
167/*
168 * Special filter values.
169 */
170static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
171static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
172
173/* How many registers does an fe-supported adapter have at maximum? */
174#define MAXREGISTERS 32
175
176/*
177 * fe_softc: per line info and status
178 */
179static struct fe_softc {
180
181 /* Used by "common" codes. */
182 struct arpcom arpcom; /* Ethernet common */
183
184 /* Used by config codes. */
185
186 /* Set by probe() and not modified in later phases. */
187 char const * typestr; /* printable name of the interface. */
188 u_short iobase; /* base I/O address of the adapter. */
189 u_short ioaddr [ MAXREGISTERS ]; /* I/O addresses of registers. */
190 u_short txb_size; /* size of TX buffer, in bytes */
191 u_char proto_dlcr4; /* DLCR4 prototype. */
192 u_char proto_dlcr5; /* DLCR5 prototype. */
193 u_char proto_dlcr6; /* DLCR6 prototype. */
194 u_char proto_dlcr7; /* DLCR7 prototype. */
195 u_char proto_bmpr13; /* BMPR13 prototype. */
196 u_char stability; /* How stable is this? */
197 u_short priv_info; /* info specific to a vendor/model. */
198
199 /* Vendor/model specific hooks. */
200 void (*init)(struct fe_softc *); /* Just before fe_init(). */
201 void (*stop)(struct fe_softc *); /* Just after fe_stop(). */
202
203 /* Transmission buffer management. */
204 u_short txb_free; /* free bytes in TX buffer */
205 u_char txb_count; /* number of packets in TX buffer */
206 u_char txb_sched; /* number of scheduled packets */
207
208 /* Excessive collision counter (see fe_tint() for details.) */
209 u_char tx_excolls; /* # of excessive collisions. */
210
211 /* Multicast address filter management. */
212 u_char filter_change; /* MARs must be changed ASAP. */
213 struct fe_filter filter;/* new filter value. */
214
215 /* Network management. */
216 struct ifmib_iso_8802_3 mibdata;
217
218 /* Media information. */
219 struct ifmedia media; /* used by if_media. */
220 u_short mbitmap; /* bitmap for supported media; see bit2media */
221 int defmedia; /* default media */
222 void (* msel)(struct fe_softc *); /* media selector. */
223
224} fe_softc[NFE];
225
226#define sc_if arpcom.ac_if
227#define sc_unit arpcom.ac_if.if_unit
228#define sc_enaddr arpcom.ac_enaddr
229
230/* Standard driver entry points. These can be static. */
231static int fe_probe ( struct isa_device * );
232static int fe_attach ( struct isa_device * );
233static void fe_init ( void * );
234static ointhand2_t feintr;
235static int fe_ioctl ( struct ifnet *, u_long, caddr_t );
236static void fe_start ( struct ifnet * );
237static void fe_watchdog ( struct ifnet * );
238static int fe_medchange ( struct ifnet * );
239static void fe_medstat ( struct ifnet *, struct ifmediareq * );
240
241/* Local functions. Order of declaration is confused. FIXME. */
242static int fe_probe_ssi ( struct isa_device *, struct fe_softc * );
243static int fe_probe_jli ( struct isa_device *, struct fe_softc * );
244static int fe_probe_fmv ( struct isa_device *, struct fe_softc * );
245static int fe_probe_lnx ( struct isa_device *, struct fe_softc * );
246static int fe_probe_gwy ( struct isa_device *, struct fe_softc * );
247static int fe_probe_ubn ( struct isa_device *, struct fe_softc * );
248#ifdef PC98
249static int fe_probe_re1000 ( struct isa_device *, struct fe_softc * );
250static int fe_probe_cnet9ne( struct isa_device *, struct fe_softc * );
251static int fe_probe_rex ( struct isa_device *, struct fe_softc * );
252#endif
253#if NCARD > 0
254static int fe_probe_mbh ( struct isa_device *, struct fe_softc * );
255static int fe_probe_tdk ( struct isa_device *, struct fe_softc * );
256#endif
257static int fe_get_packet ( struct fe_softc *, u_short );
258static void fe_stop ( struct fe_softc * );
259static void fe_tint ( struct fe_softc *, u_char );
260static void fe_rint ( struct fe_softc *, u_char );
261static void fe_xmit ( struct fe_softc * );
262static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
263static void fe_setmode ( struct fe_softc * );
264static void fe_loadmar ( struct fe_softc * );
265
266#ifdef DIAGNOSTIC
267static void fe_emptybuffer ( struct fe_softc * );
268#endif
269
270/* Driver struct used in the config code. This must be public (external.) */
271struct isa_driver fedriver =
272{
273 INTR_TYPE_NET,
274 fe_probe,
275 fe_attach,
276 "fe",
277 1 /* It's safe to mark as "sensitive" */
278};
279COMPAT_ISA_DRIVER(fe, fedriver);
280
281/*
282 * Fe driver specific constants which relate to 86960/86965.
283 */
284
285/* Interrupt masks */
286#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
287#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
288 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
289
290/* Maximum number of iterations for a receive interrupt. */
291#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
292 /*
293 * Maximum size of SRAM is 65536,
294 * minimum size of transmission buffer in fe is 2x2KB,
295 * and minimum amount of received packet including headers
296 * added by the chip is 64 bytes.
297 * Hence FE_MAX_RECV_COUNT is the upper limit for number
298 * of packets in the receive buffer.
299 */
300
301/*
302 * Miscellaneous definitions not directly related to hardware.
303 */
304
305/* Flags for stability. */
306#define UNSTABLE_IRQ 0x01 /* IRQ setting may be incorrect. */
307#define UNSTABLE_MAC 0x02 /* Probed MAC address may be incorrect. */
308#define UNSTABLE_TYPE 0x04 /* Probed vendor/model may be incorrect. */
309
310/* The following line must be delete when "net/if_media.h" support it. */
311#ifndef IFM_10_FL
312#define IFM_10_FL /* 13 */ IFM_10_5
313#endif
314
315#if 0
316/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
317static int const bit2media [] = {
318#define MB_HA 0x0001
319 IFM_HDX | IFM_ETHER | IFM_AUTO,
320#define MB_HM 0x0002
321 IFM_HDX | IFM_ETHER | IFM_MANUAL,
322#define MB_HT 0x0004
323 IFM_HDX | IFM_ETHER | IFM_10_T,
324#define MB_H2 0x0008
325 IFM_HDX | IFM_ETHER | IFM_10_2,
326#define MB_H5 0x0010
327 IFM_HDX | IFM_ETHER | IFM_10_5,
328#define MB_HF 0x0020
329 IFM_HDX | IFM_ETHER | IFM_10_FL,
330#define MB_FT 0x0040
331 IFM_FDX | IFM_ETHER | IFM_10_T,
332 /* More can be come here... */
333 0
334};
335#else
336/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
337static int const bit2media [] = {
338#define MB_HA 0x0001
339 IFM_ETHER | IFM_AUTO,
340#define MB_HM 0x0002
341 IFM_ETHER | IFM_MANUAL,
342#define MB_HT 0x0004
343 IFM_ETHER | IFM_10_T,
344#define MB_H2 0x0008
345 IFM_ETHER | IFM_10_2,
346#define MB_H5 0x0010
347 IFM_ETHER | IFM_10_5,
348#define MB_HF 0x0020
349 IFM_ETHER | IFM_10_FL,
350#define MB_FT 0x0040
351 IFM_ETHER | IFM_10_T,
352 /* More can be come here... */
353 0
354};
355#endif
356
357/*
358 * Routines to access contiguous I/O ports.
359 */
360
361static void
362inblk ( struct fe_softc * sc, int offs, u_char * mem, int len )
363{
364 while ( --len >= 0 ) {
365 *mem++ = inb( sc->ioaddr[ offs++ ] );
366 }
367}
368
369static void
370outblk ( struct fe_softc * sc, int offs, u_char const * mem, int len )
371{
372 while ( --len >= 0 ) {
373 outb( sc->ioaddr[ offs++ ], *mem++ );
374 }
375}
376
377/* PCCARD Support */
378#if NCARD > 0
379/*
380 * PC-Card (PCMCIA) specific code.
381 */
382static int feinit (struct pccard_devinfo *);
383static void feunload (struct pccard_devinfo *);
384static int fe_card_intr (struct pccard_devinfo *);
385
386PCCARD_MODULE(fe, feinit, feunload, fe_card_intr, 0, net_imask);
387
388/*
389 * Initialize the device - called from Slot manager.
390 */
391static int
392feinit(struct pccard_devinfo *devi)
393{
394 struct fe_softc *sc;
395
396 /* validate unit number. */
397 if (devi->isahd.id_unit >= NFE) return ENODEV;
398
399 /* Prepare for the device probe process. */
400 sc = &fe_softc[devi->isahd.id_unit];
401 sc->sc_unit = devi->isahd.id_unit;
402 sc->iobase = devi->isahd.id_iobase;
403
404 /*
405 * When the feinit() is called, the devi->misc holds a
406 * six-byte value set by the pccard daemon. If the
407 * corresponding entry in /etc/pccard.conf has an "ether"
408 * keyword, the value is the Ethernet MAC address extracted
409 * from CIS area of the card. If the entry has no "ether"
410 * keyword, the daemon fills the field with binary zero,
411 * instead. We passes the value (either MAC address or zero)
412 * to model-specific sub-probe routines through sc->sc_enaddr
413 * (it actually is sc->sc_arpcom.ar_enaddr, BTW) so that the
414 * sub-probe routies can use that info.
415 */
416 bcopy(devi->misc, sc->sc_enaddr, ETHER_ADDR_LEN);
417
418 /* Probe for supported cards. */
419 if (fe_probe_mbh(&devi->isahd, sc) == 0
420 && fe_probe_tdk(&devi->isahd, sc) == 0) return ENXIO;
421
422 /* We've got a supported card. Attach it, then. */
423 if (fe_attach(&devi->isahd) == 0) return ENXIO;
424
425 return 0;
426}
427
428/*
429 * feunload - unload the driver and clear the table.
430 * XXX TODO:
431 * This is usually called when the card is ejected, but
432 * can be caused by a modunload of a controller driver.
433 * The idea is to reset the driver's view of the device
434 * and ensure that any driver entry points such as
435 * read and write do not hang.
436 */
437static void
438feunload(struct pccard_devinfo *devi)
439{
440 struct fe_softc *sc = &fe_softc[devi->isahd.id_unit];
441 printf("fe%d: unload\n", sc->sc_unit);
442 fe_stop(sc);
443 if_down(&sc->arpcom.ac_if);
444}
445
446/*
447 * fe_card_intr - Shared interrupt called from
448 * front end of PC-Card handler.
449 */
450static int
451fe_card_intr(struct pccard_devinfo *devi)
452{
453 feintr(devi->isahd.id_unit);
454 return (1);
455}
456#endif /* NCARD > 0 */
457
458
459/*
460 * Hardware probe routines.
461 *
462 * In older versions of this driver, we provided an automatic I/O
463 * address detection. The features is, however, removed from this
464 * version, for simplicity. Any comments?
465 */
466
467/*
468 * Determine if the device is present at a specified I/O address. The
469 * main entry to the driver.
470 */
471
472static int
473fe_probe (struct isa_device * dev)
474{
475 struct fe_softc * sc;
476 int nports;
477
478#ifdef DIAGNOSTIC
479 if (dev->id_unit >= NFE) {
480 printf("fe%d: too large unit number for the current config\n",
481 dev->id_unit);
482 return 0;
483 }
484#endif
485
486 /* Prepare for the softc struct. */
487 sc = &fe_softc[dev->id_unit];
488 sc->sc_unit = dev->id_unit;
489 sc->iobase = dev->id_iobase;
490
491 /* Probe for supported boards. */
492 nports = 0;
493#ifdef PC98
494 if (!nports) nports = fe_probe_re1000(dev, sc);
495 if (!nports) nports = fe_probe_cnet9ne(dev, sc);
496 if (!nports) nports = fe_probe_rex(dev, sc);
497#endif
498 if (!nports) nports = fe_probe_ssi(dev, sc);
499 if (!nports) nports = fe_probe_jli(dev, sc);
500 if (!nports) nports = fe_probe_fmv(dev, sc);
501 if (!nports) nports = fe_probe_lnx(dev, sc);
502 if (!nports) nports = fe_probe_ubn(dev, sc);
503 if (!nports) nports = fe_probe_gwy(dev, sc);
504
505 /* We found supported board. */
506 return nports;
507}
508
509/*
510 * Check for specific bits in specific registers have specific values.
511 * A common utility function called from various sub-probe routines.
512 */
513
514struct fe_simple_probe_struct
515{
516 u_char port; /* Offset from the base I/O address. */
517 u_char mask; /* Bits to be checked. */
518 u_char bits; /* Values to be compared against. */
519};
520
521static int
522fe_simple_probe ( struct fe_softc const * sc,
523 struct fe_simple_probe_struct const * sp )
524{
525 struct fe_simple_probe_struct const * p;
526
527 for ( p = sp; p->mask != 0; p++ ) {
528#ifdef FE_DEBUG
529 unsigned a = sc->ioaddr[p->port];
530 printf("fe%d: Probing %02x (%04x): %02x (%02x, %02x): %s\n",
531 sc->sc_unit, p->port, a, inb(a), p->mask, p->bits,
532 (inb(a) & p->mask) == p->bits ? "OK" : "NG");
533#endif
534 if ( ( inb( sc->ioaddr[ p->port ] ) & p->mask ) != p->bits )
535 {
536 return ( 0 );
537 }
538 }
539 return ( 1 );
540}
541
542/* Test if a given 6 byte value is a valid Ethernet station (MAC)
543 address. "Vendor" is an expected vendor code (first three bytes,)
544 or a zero when nothing expected. */
545static int
546valid_Ether_p (u_char const * addr, unsigned vendor)
547{
548#ifdef FE_DEBUG
549 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
550#endif
551
552 /* All zero is not allowed as a vendor code. */
553 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
554
555 switch (vendor) {
556 case 0x000000:
557 /* Legal Ethernet address (stored in ROM) must have
558 its Group and Local bits cleared. */
559 if ((addr[0] & 0x03) != 0) return 0;
560 break;
561 case 0x020000:
562 /* Same as above, but a local address is allowed in
563 this context. */
564 if ((addr[0] & 0x01) != 0) return 0;
565 break;
566 default:
567 /* Make sure the vendor part matches if one is given. */
568 if ( addr[0] != ((vendor >> 16) & 0xFF)
569 || addr[1] != ((vendor >> 8) & 0xFF)
570 || addr[2] != ((vendor ) & 0xFF)) return 0;
571 break;
572 }
573
574 /* Host part must not be all-zeros nor all-ones. */
575 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
576 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
577
578 /* Given addr looks like an Ethernet address. */
579 return 1;
580}
581
582/* Fill our softc struct with default value. */
583static void
584fe_softc_defaults (struct fe_softc *sc)
585{
586 int i;
587
588 /* Initialize I/O address re-mapping table for the standard
589 (contiguous) register layout. This routine doesn't use
590 ioaddr[], so the caller can safely override it after
591 calling fe_softc_defaults, if needed. */
592 for (i = 0; i < MAXREGISTERS; i++) sc->ioaddr[i] = sc->iobase + i;
593
594 /* Prepare for typical register prototypes. We assume a
595 "typical" board has <32KB> of <fast> SRAM connected with a
596 <byte-wide> data lines. */
597 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
598 sc->proto_dlcr5 = 0;
599 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
600 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
601 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
602 sc->proto_bmpr13 = 0;
603
604 /* Assume the probe process (to be done later) is stable. */
605 sc->stability = 0;
606
607 /* A typical board needs no hooks. */
608 sc->init = NULL;
609 sc->stop = NULL;
610
611 /* Assume the board has no software-controllable media selection. */
612 sc->mbitmap = MB_HM;
613 sc->defmedia = MB_HM;
614 sc->msel = NULL;
615}
616
617/* Common error reporting routine used in probe routines for
618 "soft configured IRQ"-type boards. */
619static void
620fe_irq_failure (char const *name, int unit, int irq, char const *list)
621{
622 printf("fe%d: %s board is detected, but %s IRQ was given\n",
623 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
624 if (list != NULL) {
625 printf("fe%d: specify an IRQ from %s in kernel config\n",
626 unit, list);
627 }
628}
629
630/*
631 * Hardware (vendor) specific probe routines and hooks.
632 */
633
634/*
635 * Machine independent routines.
636 */
637
638/*
639 * Generic media selection scheme for MB86965 based boards.
640 */
641static void
642fe_msel_965 (struct fe_softc *sc)
643{
644 u_char b13;
645
646 /* Find the appropriate bits for BMPR13 tranceiver control. */
647 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
648 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
649 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
650 default: b13 = FE_B13_PORT_AUI; break;
651 }
652
653 /* Write it into the register. It takes effect immediately. */
654 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | b13);
655}
656
657/*
658 * Fujitsu MB86965 JLI mode support routines.
659 */
660
661/* Datasheet for 86965 explicitly states that it only supports serial
662 * EEPROM with 16 words (32 bytes) capacity. (I.e., 93C06.) However,
663 * ones with 64 words (128 bytes) are available in the marked, namely
664 * 93C46, and are also fully compatible with 86965. It is known that
665 * some boards (e.g., ICL) actually have 93C46 on them and use extra
666 * storage to keep various config info. */
667#define JLI_EEPROM_SIZE 128
668
669/*
670 * Routines to read all bytes from the config EEPROM through MB86965A.
671 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
672 * (93C06 or 93C46.)
673 */
674static void
675fe_strobe_eeprom_jli ( u_short bmpr16 )
676{
677 /*
678 * We must guarantee 1us (or more) interval to access slow
679 * EEPROMs. The following redundant code provides enough
680 * delay with ISA timing. (Even if the bus clock is "tuned.")
681 * Some modification will be needed on faster busses.
682 */
683 outb( bmpr16, FE_B16_SELECT );
684 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK );
685 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK );
686 outb( bmpr16, FE_B16_SELECT );
687}
688
689static void
690fe_read_eeprom_jli ( struct fe_softc * sc, u_char * data )
691{
692 u_short bmpr16 = sc->ioaddr[ FE_BMPR16 ];
693 u_short bmpr17 = sc->ioaddr[ FE_BMPR17 ];
694 u_char n, val, bit;
695 u_char save16, save17;
696
697 /* Save the current value of the EEPROM interface registers. */
698 save16 = inb(bmpr16);
699 save17 = inb(bmpr17);
700
701 /* Read bytes from EEPROM; two bytes per an iteration. */
702 for ( n = 0; n < JLI_EEPROM_SIZE / 2; n++ ) {
703
704 /* Reset the EEPROM interface. */
705 outb( bmpr16, 0x00 );
706 outb( bmpr17, 0x00 );
707
708 /* Start EEPROM access. */
709 outb( bmpr16, FE_B16_SELECT );
710 outb( bmpr17, FE_B17_DATA );
711 fe_strobe_eeprom_jli( bmpr16 );
712
713 /* Pass the iteration count as well as a READ command. */
714 val = 0x80 | n;
715 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
716 outb( bmpr17, ( val & bit ) ? FE_B17_DATA : 0 );
717 fe_strobe_eeprom_jli( bmpr16 );
718 }
719 outb( bmpr17, 0x00 );
720
721 /* Read a byte. */
722 val = 0;
723 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
724 fe_strobe_eeprom_jli( bmpr16 );
725 if ( inb( bmpr17 ) & FE_B17_DATA ) {
726 val |= bit;
727 }
728 }
729 *data++ = val;
730
731 /* Read one more byte. */
732 val = 0;
733 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
734 fe_strobe_eeprom_jli( bmpr16 );
735 if ( inb( bmpr17 ) & FE_B17_DATA ) {
736 val |= bit;
737 }
738 }
739 *data++ = val;
740 }
741
742#if 0
743 /* Reset the EEPROM interface, again. */
744 outb( bmpr16, 0x00 );
745 outb( bmpr17, 0x00 );
746#else
747 /* Make sure to restore the original value of EEPROM interface
748 registers, since we are not yet sure we have MB86965A on
749 the address. */
750 outb(bmpr17, save17);
751 outb(bmpr16, save16);
752#endif
753
754#if 1
755 /* Report what we got. */
756 if (bootverbose) {
757 int i;
758 data -= JLI_EEPROM_SIZE;
759 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
760 printf("fe%d: EEPROM(JLI):%3x: %16D\n",
761 sc->sc_unit, i, data + i, " ");
762 }
763 }
764#endif
765}
766
767static void
768fe_init_jli (struct fe_softc * sc)
769{
770 /* "Reset" by writing into a magic location. */
771 DELAY(200);
772 outb(sc->ioaddr[0x1E], inb(sc->ioaddr[0x1E]));
773 DELAY(300);
774}
775
776/*
777 * SSi 78Q8377A support routines.
778 */
779
780#define SSI_EEPROM_SIZE 512
781#define SSI_DIN 0x01
782#define SSI_DAT 0x01
783#define SSI_CSL 0x02
784#define SSI_CLK 0x04
785#define SSI_EEP 0x10
786
787/*
788 * Routines to read all bytes from the config EEPROM through 78Q8377A.
789 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
790 * 93C56 or 93C66.)
791 *
792 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
793 * sure the following code is correct... It is just stolen from the
794 * C-NET(98)P2 support routine in FreeBSD(98).
795 */
796
797static void
798fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
799{
800 u_short bmpr12 = sc->ioaddr[FE_DLCR12];
801 u_char val, bit;
802 int n;
803 u_char save6, save7, save12;
804
805 /* Save the current value for the DLCR registers we are about
806 to destroy. */
807 save6 = inb(sc->ioaddr[FE_DLCR6]);
808 save7 = inb(sc->ioaddr[FE_DLCR7]);
809
810 /* Put the 78Q8377A into a state that we can access the EEPROM. */
811 outb(sc->ioaddr[FE_DLCR6],
812 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
813 outb(sc->ioaddr[FE_DLCR7],
814 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
815
816 /* Save the current value for the BMPR12 register, too. */
817 save12 = inb(bmpr12);
818
819 /* Read bytes from EEPROM; two bytes per an iteration. */
820 for ( n = 0; n < SSI_EEPROM_SIZE / 2; n++ ) {
821
822 /* Start EEPROM access */
823 outb(bmpr12, SSI_EEP);
824 outb(bmpr12, SSI_EEP | SSI_CSL);
825
826 /* Send the following four bits to the EEPROM in the
827 specified order: a dummy bit, a start bit, and
828 command bits (10) for READ. */
829 outb(bmpr12, SSI_EEP | SSI_CSL );
830 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
831 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT);
832 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
833 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT);
834 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
835 outb(bmpr12, SSI_EEP | SSI_CSL );
836 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
837
838 /* Pass the iteration count to the chip. */
839 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
840 val = ( n & bit ) ? SSI_DAT : 0;
841 outb(bmpr12, SSI_EEP | SSI_CSL | val);
842 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | val);
843 }
844
845 /* Read a byte. */
846 val = 0;
847 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
848 outb(bmpr12, SSI_EEP | SSI_CSL);
849 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK);
850 if (inb(bmpr12) & SSI_DIN) val |= bit;
851 }
852 *data++ = val;
853
854 /* Read one more byte. */
855 val = 0;
856 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
857 outb(bmpr12, SSI_EEP | SSI_CSL);
858 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK);
859 if (inb(bmpr12) & SSI_DIN) val |= bit;
860 }
861 *data++ = val;
862
863 outb(bmpr12, SSI_EEP);
864 }
865
866 /* Reset the EEPROM interface. (For now.) */
867 outb( bmpr12, 0x00 );
868
869 /* Restore the saved register values, for the case that we
870 didn't have 78Q8377A at the given address. */
871 outb(bmpr12, save12);
872 outb(sc->ioaddr[FE_DLCR7], save7);
873 outb(sc->ioaddr[FE_DLCR6], save6);
874
875#if 1
876 /* Report what we got. */
877 if (bootverbose) {
878 int i;
879 data -= SSI_EEPROM_SIZE;
880 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
881 printf("fe%d: EEPROM(SSI):%3x: %16D\n",
882 sc->sc_unit, i, data + i, " ");
883 }
884 }
885#endif
886}
887
888#define FE_SSI_EEP_IRQ 9 /* Irq ??? */
889#define FE_SSI_EEP_ADDR 16 /* Station(MAC) address */
890#define FE_SSI_EEP_DUPLEX 25 /* Duplex mode ??? */
891
892/*
893 * TDK/LANX boards support routines.
894 */
895
896/* AX012/AX013 equips an X24C01 chip, which has 128 bytes of memory cells. */
897#define LNX_EEPROM_SIZE 128
898
899/* Bit assignments and command definitions for the serial EEPROM
900 interface register in LANX ASIC. */
901#define LNX_SDA_HI 0x08 /* Drive SDA line high (logical 1.) */
902#define LNX_SDA_LO 0x00 /* Drive SDA line low (logical 0.) */
903#define LNX_SDA_FL 0x08 /* Float (don't drive) SDA line. */
904#define LNX_SDA_IN 0x01 /* Mask for reading SDA line. */
905#define LNX_CLK_HI 0x04 /* Drive clock line high (active.) */
906#define LNX_CLK_LO 0x00 /* Drive clock line low (inactive.) */
907
908/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
909#define LNX_PH(D,K,N) \
910 ((LNX_SDA_##D | LNX_CLK_##K) << N)
911#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
912 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
913
914#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
915#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
916#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
917#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
918#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
919
920static void
921fe_eeprom_cycle_lnx (u_short reg20, u_long cycle)
922{
923 outb(reg20, (cycle ) & 0xFF);
924 DELAY(15);
925 outb(reg20, (cycle >> 8) & 0xFF);
926 DELAY(15);
927 outb(reg20, (cycle >> 16) & 0xFF);
928 DELAY(15);
929 outb(reg20, (cycle >> 24) & 0xFF);
930 DELAY(15);
931}
932
933static u_char
934fe_eeprom_receive_lnx (u_short reg20)
935{
936 u_char dat;
937
938 outb(reg20, LNX_CLK_HI | LNX_SDA_FL);
939 DELAY(15);
940 dat = inb(reg20);
941 outb(reg20, LNX_CLK_LO | LNX_SDA_FL);
942 DELAY(15);
943 return (dat & LNX_SDA_IN);
944}
945
946static void
947fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
948{
949 int i;
950 u_char n, bit, val;
951 u_char save20;
952 u_short reg20 = sc->ioaddr[0x14];
953
954 save20 = inb(reg20);
955
956 /* NOTE: DELAY() timing constants are approximately three
957 times longer (slower) than the required minimum. This is
958 to guarantee a reliable operation under some tough
959 conditions... Fortunately, this routine is only called
960 during the boot phase, so the speed is less important than
961 stability. */
962
963#if 1
964 /* Reset the X24C01's internal state machine and put it into
965 the IDLE state. We usually don't need this, but *if*
966 someone (e.g., probe routine of other driver) write some
967 garbage into the register at 0x14, synchronization will be
968 lost, and the normal EEPROM access protocol won't work.
969 Moreover, as there are no easy way to reset, we need a
970 _manoeuvre_ here. (It even lacks a reset pin, so pushing
971 the RESET button on the PC doesn't help!) */
972 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_INIT);
973 for (i = 0; i < 10; i++) {
974 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
975 }
976 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP);
977 DELAY(10000);
978#endif
979
980 /* Issue a start condition. */
981 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
982
983 /* Send seven bits of the starting address (zero, in this
984 case) and a command bit for READ. */
985 val = 0x01;
986 for (bit = 0x80; bit != 0x00; bit >>= 1) {
987 if (val & bit) {
988 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_HI);
989 } else {
990 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
991 }
992 }
993
994 /* Receive an ACK bit. */
995 if (fe_eeprom_receive_lnx(reg20)) {
996 /* ACK was not received. EEPROM is not present (i.e.,
997 this board was not a TDK/LANX) or not working
998 properly. */
999 if (bootverbose) {
1000 printf("fe%d: no ACK received from EEPROM(LNX)\n",
1001 sc->sc_unit);
1002 }
1003 /* Clear the given buffer to indicate we could not get
1004 any info. and return. */
1005 bzero(data, LNX_EEPROM_SIZE);
1006 goto RET;
1007 }
1008
1009 /* Read bytes from EEPROM. */
1010 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
1011
1012 /* Read a byte and store it into the buffer. */
1013 val = 0x00;
1014 for (bit = 0x80; bit != 0x00; bit >>= 1) {
1015 if (fe_eeprom_receive_lnx(reg20)) val |= bit;
1016 }
1017 *data++ = val;
1018
1019 /* Acknowledge if we have to read more. */
1020 if (n < LNX_EEPROM_SIZE - 1) {
1021 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
1022 }
1023 }
1024
1025 /* Issue a STOP condition, de-activating the clock line.
1026 It will be safer to keep the clock line low than to leave
1027 it high. */
1028 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP);
1029
1030 RET:
1031 outb(reg20, save20);
1032
1033#if 1
1034 /* Report what we got. */
1035 if (bootverbose) {
1036 data -= LNX_EEPROM_SIZE;
1037 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
1038 printf("fe%d: EEPROM(LNX):%3x: %16D\n",
1039 sc->sc_unit, i, data + i, " ");
1040 }
1041 }
1042#endif
1043}
1044
1045static void
1046fe_init_lnx ( struct fe_softc * sc )
1047{
1048 /* Reset the 86960. Do we need this? FIXME. */
1049 outb(sc->ioaddr[0x12], 0x06);
1050 DELAY(100);
1051 outb(sc->ioaddr[0x12], 0x07);
1052 DELAY(100);
1053
1054 /* Setup IRQ control register on the ASIC. */
1055 outb(sc->ioaddr[0x14], sc->priv_info);
1056}
1057
1058/*
1059 * Ungermann-Bass boards support routine.
1060 */
1061static void
1062fe_init_ubn ( struct fe_softc * sc )
1063{
1064 /* Do we need this? FIXME. */
1065 outb(sc->ioaddr[FE_DLCR7],
1066 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1067 outb(sc->ioaddr[0x18], 0x00);
1068 DELAY( 200 );
1069
1070 /* Setup IRQ control register on the ASIC. */
1071 outb(sc->ioaddr[0x14], sc->priv_info);
1072}
1073
1074/*
1075 * Machine dependent probe routines.
1076 */
1077
1078#ifdef PC98
1079static int
1080fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc )
1081{
1082 /* PC-98 has no board of this architechture. */
1083 return 0;
1084}
1085
1086/* ioaddr for RE1000/1000Plus - Very dirty! */
1087static u_short ioaddr_re1000[MAXREGISTERS] = {
1088 0x0000, 0x0001, 0x0200, 0x0201, 0x0400, 0x0401, 0x0600, 0x0601,
1089 0x0800, 0x0801, 0x0a00, 0x0a01, 0x0c00, 0x0c01, 0x0e00, 0x0e01,
1090 0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00,
1091 0x1001, 0x1201, 0x1401, 0x1601, 0x1801, 0x1a01, 0x1c01, 0x1e01,
1092};
1093
1094/*
1095 * Probe and initialization for Allied-Telesis RE1000 series.
1096 */
1097static void
1098fe_init_re1000 ( struct fe_softc * sc )
1099{
1100 /* Setup IRQ control register on the ASIC. */
1101 outb(sc->ioaddr[FE_RE1000_IRQCONF], sc->priv_info);
1102}
1103
1104static int
1105fe_probe_re1000 ( struct isa_device * dev, struct fe_softc * sc )
1106{
1107 int i, n;
1108 u_char sum;
1109
1110 static struct fe_simple_probe_struct probe_table [] = {
1111 { FE_DLCR2, 0x58, 0x00 },
1112 { FE_DLCR4, 0x08, 0x00 },
1113 { 0 }
1114 };
1115
1116 /* See if the specified I/O address is possible for RE1000. */
1117 /* [01]D[02468ACE] are allowed. */
1118 if ((sc->iobase & ~0x10E) != 0xD0) return 0;
1119
1120 /* Setup an I/O address mapping table and some others. */
1121 fe_softc_defaults(sc);
1122
1123 /* Re-map ioaddr for RE1000. */
1124 for (i = 0; i < MAXREGISTERS; i++)
1125 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i];
1126
1127 /* See if the card is on its address. */
1128 if (!fe_simple_probe(sc, probe_table)) return 0;
1129
1130 /* Get our station address from EEPROM. */
1131 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1132
1133 /* Make sure it is Allied-Telesis's. */
1134 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return 0;
1135#if 1
1136 /* Calculate checksum. */
1137 sum = inb(sc->ioaddr[0x1e]);
1138 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1139 sum ^= sc->sc_enaddr[i];
1140 }
1141 if (sum != 0) return 0;
1142#endif
1143 /* Setup the board type. */
1144 sc->typestr = "RE1000";
1145
1146 /* This looks like an RE1000 board. It requires an
1147 explicit IRQ setting in config. Make sure we have one,
1148 determining an appropriate value for the IRQ control
1149 register. */
1150 switch (dev->id_irq) {
1151 case IRQ3: n = 0x10; break;
1152 case IRQ5: n = 0x20; break;
1153 case IRQ6: n = 0x40; break;
1154 case IRQ12: n = 0x80; break;
1155 default:
1156 fe_irq_failure(sc->typestr,
1157 sc->sc_unit, dev->id_irq, "3/5/6/12");
1158 return 0;
1159 }
1160 sc->priv_info = inb(sc->ioaddr[FE_RE1000_IRQCONF]) & 0x0f | n;
1161
1162 /* Setup hooks. We need a special initialization procedure. */
1163 sc->init = fe_init_re1000;
1164
1165 /* The I/O address range is fragmented in the RE1000.
1166 It occupies 2*16 I/O addresses, by the way. */
1167 return 2;
1168}
1169
1170/* JLI sub-probe for Allied-Telesis RE1000Plus/ME1500 series. */
1171static u_short const *
1172fe_probe_jli_re1000p (struct fe_softc * sc, u_char const * eeprom)
1173{
1174 int i;
1175 static u_short const irqmaps_re1000p [4] = { IRQ3, IRQ5, IRQ6, IRQ12 };
1176
1177 /* Make sure the EEPROM contains Allied-Telesis bit pattern. */
1178 if (eeprom[1] != 0xFF) return NULL;
1179 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL;
1180 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL;
1181
1182 /* Get our station address from EEPROM, and make sure the
1183 EEPROM contains Allied-Telesis's address. */
1184 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN);
1185 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL;
1186
1187 /* I don't know any sub-model identification. */
1188 sc->typestr = "RE1000Plus/ME1500";
1189
1190 /* Returns the IRQ table for the RE1000Plus. */
1191 return irqmaps_re1000p;
1192}
1193
1194/*
1195 * Probe for Allied-Telesis RE1000Plus/ME1500 series.
1196 */
1197static int
1198fe_probe_jli (struct isa_device * dev, struct fe_softc * sc)
1199{
1200 int i, n;
1201 int irq;
1202 u_char eeprom [JLI_EEPROM_SIZE];
1203 u_short const * irqmap;
1204
1205 static u_short const baseaddr [8] =
1206 { 0x1D6, 0x1D8, 0x1DA, 0x1D4, 0x0D4, 0x0D2, 0x0D8, 0x0D0 };
1207 static struct fe_simple_probe_struct const probe_table [] = {
1208 /* { FE_DLCR1, 0x20, 0x00 }, Doesn't work. */
1209 { FE_DLCR2, 0x50, 0x00 },
1210 { FE_DLCR4, 0x08, 0x00 },
1211 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
1212#if 0
1213 { FE_BMPR16, 0x1B, 0x00 },
1214 { FE_BMPR17, 0x7F, 0x00 },
1215#endif
1216 { 0 }
1217 };
1218
1219 /*
1220 * See if the specified address is possible for MB86965A JLI mode.
1221 */
1222 for (i = 0; i < 8; i++) {
1223 if (baseaddr[i] == sc->iobase) break;
1224 }
1225 if (i == 8) return 0;
1226
1227 /* Fill the softc struct with reasonable default. */
1228 fe_softc_defaults(sc);
1229
1230 /* Re-map ioaddr for RE1000Plus. */
1231 for (i = 0; i < MAXREGISTERS; i++)
1232 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i];
1233
1234 /*
1235 * We should test if MB86965A is on the base address now.
1236 * Unfortunately, it is very hard to probe it reliably, since
1237 * we have no way to reset the chip under software control.
1238 * On cold boot, we could check the "signature" bit patterns
1239 * described in the Fujitsu document. On warm boot, however,
1240 * we can predict almost nothing about register values.
1241 */
1242 if (!fe_simple_probe(sc, probe_table)) return 0;
1243
1244 /* Check if our I/O address matches config info on 86965. */
1245 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
1246 if (baseaddr[n] != sc->iobase) return 0;
1247
1248 /*
1249 * We are now almost sure we have an MB86965 at the given
1250 * address. So, read EEPROM through it. We have to write
1251 * into LSI registers to read from EEPROM. I want to avoid it
1252 * at this stage, but I cannot test the presence of the chip
1253 * any further without reading EEPROM. FIXME.
1254 */
1255 fe_read_eeprom_jli(sc, eeprom);
1256
1257 /* Make sure that config info in EEPROM and 86965 agree. */
1258 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) {
1259 return 0;
1260 }
1261
1262 /* Use 86965 media selection scheme, unless othewise
1263 specified. It is "AUTO always" and "select with BMPR13".
1264 This behaviour covers most of the 86965 based board (as
1265 minimum requirements.) It is backward compatible with
1266 previous versions, also. */
1267 sc->mbitmap = MB_HA;
1268 sc->defmedia = MB_HA;
1269 sc->msel = fe_msel_965;
1270
1271 /* Perform board-specific probe. */
1272 if ((irqmap = fe_probe_jli_re1000p(sc, eeprom)) == NULL) return 0;
1273
1274 /* Find the IRQ read from EEPROM. */
1275 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
1276 irq = irqmap[n];
1277
1278 /* Try to determine IRQ setting. */
1279 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) {
1280 /* The device must be configured with an explicit IRQ. */
1281 printf("fe%d: IRQ auto-detection does not work\n",
1282 sc->sc_unit);
1283 return 0;
1284 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) {
1285 /* Just use the probed IRQ value. */
1286 dev->id_irq = irq;
1287 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) {
1288 /* No problem. Go ahead. */
1289 } else if (dev->id_irq == irq) {
1290 /* Good. Go ahead. */
1291 } else {
1292 /* User must be warned in this case. */
1293 sc->stability |= UNSTABLE_IRQ;
1294 }
1295
1296 /* Setup a hook, which resets te 86965 when the driver is being
1297 initialized. This may solve a nasty bug. FIXME. */
1298 sc->init = fe_init_jli;
1299
1300 /* The I/O address range is fragmented in the RE1000Plus.
1301 It occupies 2*16 I/O addresses, by the way. */
1302 return 2;
1303}
1304
1305/*
1306 * Probe and initialization for Contec C-NET(9N)E series.
1307 */
1308
1309/* TODO: Should be in "if_fereg.h" */
1310#define FE_CNET9NE_INTR 0x10 /* Interrupt Mask? */
1311
1312static void
1313fe_init_cnet9ne ( struct fe_softc * sc )
1314{
1315 /* Enable interrupt? FIXME. */
1316 outb(sc->ioaddr[FE_CNET9NE_INTR], 0x10);
1317}
1318
1319static int
1320fe_probe_cnet9ne ( struct isa_device * dev, struct fe_softc * sc )
1321{
1322 int i;
1323
1324 static struct fe_simple_probe_struct probe_table [] = {
1325 { FE_DLCR2, 0x58, 0x00 },
1326 { FE_DLCR4, 0x08, 0x00 },
1327 { 0 }
1328 };
1329 static u_short ioaddr[MAXREGISTERS - 16] = {
1330 /* 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, */
1331 /* 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, */
1332 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e,
1333 0x401, 0x403, 0x405, 0x407, 0x409, 0x40b, 0x40d, 0x40f,
1334 };
1335
1336 /* See if the specified I/O address is possible for C-NET(9N)E. */
1337 if (sc->iobase != 0x73D0) return 0;
1338
1339 /* Setup an I/O address mapping table and some others. */
1340 fe_softc_defaults(sc);
1341
1342 /* Re-map ioaddr for C-NET(9N)E. */
1343 for (i = 16; i < MAXREGISTERS; i++)
1344 sc->ioaddr[i] = sc->iobase + ioaddr[i - 16];
1345
1346 /* See if the card is on its address. */
1347 if (!fe_simple_probe(sc, probe_table)) return 0;
1348
1349 /* Get our station address from EEPROM. */
1350 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1351
1352 /* Make sure it is Contec's. */
1353 if (!valid_Ether_p(sc->sc_enaddr, 0x00804C)) return 0;
1354
1355 /* Determine the card type. */
1356 if (sc->sc_enaddr[3] == 0x06) {
1357 sc->typestr = "C-NET(9N)C";
1358
1359 /* We seems to need our own IDENT bits... FIXME. */
1360 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
1361
1362 /* C-NET(9N)C requires an explicit IRQ to work. */
1363 if (dev->id_irq == NO_IRQ) {
1364 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL);
1365 return 0;
1366 }
1367 } else {
1368 sc->typestr = "C-NET(9N)E";
1369
1370 /* C-NET(9N)E works only IRQ5. */
1371 if (dev->id_irq != IRQ5) {
1372 fe_irq_failure(sc->typestr,
1373 sc->sc_unit, dev->id_irq, "5");
1374 return 0;
1375 }
1376
1377 /* We need an init hook to initialize ASIC before we start. */
1378 sc->init = fe_init_cnet9ne;
1379 }
1380
1381 /* C-NET(9N)E has 64KB SRAM. */
1382 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB
1383 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM;
1384
1385 /* The I/O address range is fragmented in the C-NET(9N)E.
1386 This is the number of regs at iobase. */
1387 return 16;
1388}
1389
1390/*
1391 * Probe for Contec C-NET(98)P2 series.
1392 * (Logitec LAN-98TP/LAN-98T25P - parhaps)
1393 */
1394static int
1395fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc)
1396{
1397 u_char eeprom [SSI_EEPROM_SIZE];
1398
1399 static struct fe_simple_probe_struct probe_table [] = {
1400 { FE_DLCR2, 0x08, 0x00 },
1401 { FE_DLCR4, 0x08, 0x00 },
1402 { 0 }
1403 };
1404 static u_short const irqmap[] = {
1405 /* INT0 INT1 INT2 */
1406 NO_IRQ, NO_IRQ, NO_IRQ, IRQ3 , NO_IRQ, IRQ5 , IRQ6 , NO_IRQ,
1407 NO_IRQ, IRQ9 , IRQ10 , NO_IRQ, IRQ12 , IRQ13 , NO_IRQ, NO_IRQ,
1408 /* INT3 INT41 INT5 INT6 */
1409 };
1410
1411 /* See if the specified I/O address is possible for 78Q8377A. */
1412 /* [0-D]3D0 are allowed. */
1413 if ((sc->iobase & 0xFFF) != 0x3D0) return 0; /* XXX */
1414
1415 /* Fill the softc struct with default values. */
1416 fe_softc_defaults(sc);
1417
1418 /* See if the card is on its address. */
1419 if (!fe_simple_probe(sc, probe_table)) return 0;
1420
1421 /* We now have to read the config EEPROM. We should be very
1422 careful, since doing so destroys a register. (Remember, we
1423 are not yet sure we have a C-NET(98)P2 board here.) Don't
1424 remember to select BMPRs bofore reading EEPROM, since other
1425 register bank may be selected before the probe() is called. */
1426 fe_read_eeprom_ssi(sc, eeprom);
1427
1428 /* Make sure the Ethernet (MAC) station address is of Contec's. */
1429 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x00804C)) return 0;
1430 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
1431
1432 /* Setup the board type. */
1433 sc->typestr = "C-NET(98)P2";
1434
1435 /* Get IRQ configuration from EEPROM. */
1436 dev->id_irq = irqmap[eeprom[FE_SSI_EEP_IRQ]];
1437 if (dev->id_irq == NO_IRQ) {
1438 fe_irq_failure(sc->typestr,
1439 sc->sc_unit, dev->id_irq, "3/5/6/9/10/12/13");
1440 return 0;
1441 }
1442
1443 /* Get Duplex-mode configuration from EEPROM. */
1444 sc->proto_dlcr4 |= (eeprom[FE_SSI_EEP_DUPLEX] & FE_D4_DSC);
1445
1446 /* Fill softc struct accordingly. */
1447 sc->mbitmap = MB_HT;
1448 sc->defmedia = MB_HT;
1449
1450 /* We have 16 registers. */
1451 return 16;
1452}
1453
1454/*
1455 * Probe for TDK LAC-98012/013/025/9N011 - parhaps.
1456 */
1457static int
1458fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc)
1459{
1460#ifndef FE_8BIT_SUPPORT
1461 printf("fe%d: skip LAC-98012/013(only 16-bit cards are supported)\n",
1462 sc->sc_unit);
1463 return 0;
1464#else
1465 int i;
1466 u_char eeprom [LNX_EEPROM_SIZE];
1467
1468 static struct fe_simple_probe_struct probe_table [] = {
1469 { FE_DLCR2, 0x58, 0x00 },
1470 { FE_DLCR4, 0x08, 0x00 },
1471 { 0 }
1472 };
1473
1474 /* See if the specified I/O address is possible for TDK/LANX boards. */
1475 /* 0D0, 4D0, 8D0, and CD0 are allowed. */
1476 if ((sc->iobase & ~0xC00) != 0xD0) return 0;
1477
1478 /* Fill the softc struct with default values. */
1479 fe_softc_defaults(sc);
1480
1481 /* Re-map ioaddr for LAC-98.
1482 * 0x000, 0x002, 0x004, 0x006, 0x008, 0x00a, 0x00c, 0x00e,
1483 * 0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e,
1484 * 0x200, 0x202, 0x204, 0x206, 0x208, 0x20a, 0x20c, 0x20e,
1485 * 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e,
1486 */
1487 for (i = 0; i < MAXREGISTERS; i++)
1488 sc->ioaddr[i] = sc->iobase + ((i & 7) << 1) + ((i & 0x18) << 5);
1489
1490 /* See if the card is on its address. */
1491 if (!fe_simple_probe(sc, probe_table)) return 0;
1492
1493 /* We now have to read the config EEPROM. We should be very
1494 careful, since doing so destroys a register. (Remember, we
1495 are not yet sure we have a LAC-98012/98013 board here.) */
1496 fe_read_eeprom_lnx(sc, eeprom);
1497
1498 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */
1499 if (!valid_Ether_p(eeprom, 0x008098)) return 0;
1500 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN);
1501
1502 /* Setup the board type. */
1503 sc->typestr = "LAC-98012/98013";
1504
1505 /* This looks like a TDK/LANX board. It requires an
1506 explicit IRQ setting in config. Make sure we have one,
1507 determining an appropriate value for the IRQ control
1508 register. */
1509 switch (dev->id_irq) {
1510 case IRQ3 : sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break;
1511 case IRQ5 : sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break;
1512 case IRQ6 : sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break;
1513 case IRQ12: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break;
1514 default:
1515 fe_irq_failure(sc->typestr,
1516 sc->sc_unit, dev->id_irq, "3/5/6/12");
1517 return 0;
1518 }
1519
1520 /* LAC-98's system bus width is 8-bit. */
1521 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x2KB
1522 | FE_D6_BBW_BYTE | FE_D6_SBW_BYTE | FE_D6_SRAM_150ns;
1523
1524 /* Setup hooks. We need a special initialization procedure. */
1525 sc->init = fe_init_lnx;
1526
1527 /* The I/O address range is fragmented in the LAC-98.
1528 It occupies 16*4 I/O addresses, by the way. */
1529 return 16;
1530#endif /* FE_8BIT_SUPPORT */
1531}
1532
1533/*
1534 * Probe for Gateway Communications' old cards.
1535 * (both as Generic MB86960 probe routine)
1536 */
1537static int
1538fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc )
1539{
1540 static struct fe_simple_probe_struct probe_table [] = {
1541 /* { FE_DLCR2, 0x70, 0x00 }, */
1542 { FE_DLCR2, 0x58, 0x00 },
1543 { FE_DLCR4, 0x08, 0x00 },
1544 { 0 }
1545 };
1546
1547 /* I'm not sure which address is possible, so accepts any. FIXME. */
1548
1549 /* Setup an I/O address mapping table and some others. */
1550 fe_softc_defaults(sc);
1551
1552 /* Does we need to re-map ioaddr? FIXME. */
1553
1554 /* See if the card is on its address. */
1555 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
1556
1557 /* Get our station address from EEPROM. */
1558 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN );
1559 if (!valid_Ether_p(sc->sc_enaddr, 0x000000)) return 0;
1560
1561 /* Determine the card type. */
1562 sc->typestr = "Generic MB86960 Ethernet";
1563 if (valid_Ether_p(sc->sc_enaddr, 0x000061))
1564 sc->typestr = "Gateway Ethernet (Fujitsu chipset)";
1565
1566 /* Gateway's board requires an explicit IRQ to work, since it
1567 is not possible to probe the setting of jumpers. */
1568 if (dev->id_irq == NO_IRQ) {
1569 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL);
1570 return 0;
1571 }
1572
1573 /* We should change return value when re-mapping ioaddr. FIXME. */
1574 return 32;
1575}
1576
1577/*
1578 * Probe for Ungermann-Bass Access/PC N98C+(Model 85152).
1579 */
1580static int
1581fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc)
1582{
1583 u_char sum, save7;
1584 int i;
1585 static struct fe_simple_probe_struct const probe_table [] = {
1586 { FE_DLCR2, 0x58, 0x00 },
1587 { FE_DLCR4, 0x08, 0x00 },
1588 { 0 }
1589 };
1590
1591 /* See if the specified I/O address is possible for Access/PC. */
1592 /* [01][048C]D0 are allowed. */
1593 if ((sc->iobase & ~0x1C00) != 0xD0) return 0;
1594
1595 /* Setup an I/O address mapping table and some others. */
1596 fe_softc_defaults(sc);
1597
1598 /* Re-map ioaddr for Access/PC N98C+.
1599 * 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007,
1600 * 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f,
1601 * 0x200, 0x201, 0x202, 0x203, 0x204, 0x205, 0x206, 0x207,
1602 * 0x208, 0x209, 0x20a, 0x20b, 0x20c, 0x20d, 0x20e, 0x20f,
1603 */
1604 for (i = 16; i < MAXREGISTERS; i++)
1605 sc->ioaddr[i] = sc->iobase + 0x200 - 16 + i;
1606
1607 /* Simple probe. */
1608 if (!fe_simple_probe(sc, probe_table)) return 0;
1609
1610 /* NOTE: Access/NOTE N98 sometimes freeze when reading station
1611 address. In case of using it togather with C-NET(9N)C,
1612 this problem usually happens.
1613 Writing DLCR7 prevents freezing, but I don't know why. FIXME. */
1614
1615 /* Save the current value for the DLCR7 register we are about
1616 to destroy. */
1617 save7 = inb(sc->ioaddr[FE_DLCR7]);
1618 outb(sc->ioaddr[FE_DLCR7],
1619 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1620
1621 /* Get our station address form ID ROM and make sure it is UBN's. */
1622 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1623 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) goto fail_ubn;
1624#if 1
1625 /* Calculate checksum. */
1626 sum = inb(sc->ioaddr[0x1e]);
1627 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1628 sum ^= sc->sc_enaddr[i];
1629 }
1630 if (sum != 0) goto fail_ubn;
1631#endif
1632 /* Setup the board type. */
1633 sc->typestr = "Access/PC";
1634
1635 /* This looks like an AccessPC/N98C+ board. It requires an
1636 explicit IRQ setting in config. Make sure we have one,
1637 determining an appropriate value for the IRQ control
1638 register. */
1639 switch (dev->id_irq) {
1640 case IRQ3: sc->priv_info = 0x01; break;
1641 case IRQ5: sc->priv_info = 0x02; break;
1642 case IRQ6: sc->priv_info = 0x04; break;
1643 case IRQ12: sc->priv_info = 0x08; break;
1644 default:
1645 fe_irq_failure(sc->typestr,
1646 sc->sc_unit, dev->id_irq, "3/5/6/12");
1647 goto fail_ubn;
1648 }
1649
1650 /* Setup hooks. We need a special initialization procedure. */
1651 sc->init = fe_init_ubn;
1652
1653 /* The I/O address range is fragmented in the Access/PC N98C+.
1654 This is the number of regs at iobase. */
1655 return 16;
1656
1657fail_ubn:
1658 outb(sc->ioaddr[FE_DLCR7], save7);
1659 return 0;
1660}
1661
1662/*
1663 * REX boards(non-JLI type) support routine.
1664 */
1665
1666#define REX_EEPROM_SIZE 32
1667#define REX_DAT 0x01
1668
1669static void
1670fe_read_eeprom_rex (struct fe_softc *sc, u_char *data)
1671{
1672 int i;
1673 u_char bit, val;
1674 u_char save16;
1675 u_short reg16 = sc->ioaddr[0x10];
1676
1677 save16 = inb(reg16);
1678
1679 /* Issue a start condition. */
1680 val = inb(reg16) & 0xf0;
1681 outb(reg16, val);
1682
1683 (void)inb(reg16);
1684 (void)inb(reg16);
1685 (void)inb(reg16);
1686 (void)inb(reg16);
1687
1688 /* Read bytes from EEPROM. */
1689 for (i = 0; i < REX_EEPROM_SIZE; i++) {
1690 /* Read a byte and store it into the buffer. */
1691 val = 0x00;
1692 for (bit = 0x01; bit != 0x00; bit <<= 1) {
1693 if (inb(reg16) & REX_DAT) val |= bit;
1694 }
1695 *data++ = val;
1696 }
1697
1698 outb(reg16, save16);
1699
1700#if 1
1701 /* Report what we got. */
1702 if (bootverbose) {
1703 data -= REX_EEPROM_SIZE;
1704 for (i = 0; i < REX_EEPROM_SIZE; i += 16) {
1705 printf("fe%d: EEPROM(REX):%3x: %16D\n",
1706 sc->sc_unit, i, data + i, " ");
1707 }
1708 }
1709#endif
1710}
1711
1712static void
1713fe_init_rex ( struct fe_softc * sc )
1714{
1715 /* Setup IRQ control register on the ASIC. */
1716 outb(sc->ioaddr[0x10], sc->priv_info);
1717}
1718
1719/*
1720 * Probe for RATOC REX-9880/81/82/83 series.
1721 */
1722static int
1723fe_probe_rex (struct isa_device * dev, struct fe_softc * sc)
1724{
1725 int i;
1726 u_char eeprom [REX_EEPROM_SIZE];
1727
1728 static struct fe_simple_probe_struct probe_table [] = {
1729 { FE_DLCR2, 0x58, 0x00 },
1730 { FE_DLCR4, 0x08, 0x00 },
1731 { 0 }
1732 };
1733
1734 /* See if the specified I/O address is possible for REX-9880. */
1735 /* 6[46CE]D0 are allowed. */
1736 if ((sc->iobase & ~0xA00) != 0x64D0) return 0;
1737
1738 /* Setup an I/O address mapping table and some others. */
1739 fe_softc_defaults(sc);
1740
1741 /* Re-map ioaddr for REX-9880. */
1742 for (i = 16; i < MAXREGISTERS; i++)
1743 sc->ioaddr[i] = sc->iobase + 0x100 - 16 + i;
1744
1745 /* See if the card is on its address. */
1746 if (!fe_simple_probe(sc, probe_table)) return 0;
1747
1748 /* We now have to read the config EEPROM. We should be very
1749 careful, since doing so destroys a register. (Remember, we
1750 are not yet sure we have a REX-9880 board here.) */
1751 fe_read_eeprom_rex(sc, eeprom);
1752 for (i = 0; i < ETHER_ADDR_LEN; i++)
1753 sc->sc_enaddr[i] = eeprom[7 - i];
1754
1755 /* Make sure it is RATOC's. */
1756 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0)) return 0;
1757
1758 /* Setup the board type. */
1759 sc->typestr = "REX-9880/9883";
1760
1761 /* This looks like a REX-9880 board. It requires an
1762 explicit IRQ setting in config. Make sure we have one,
1763 determining an appropriate value for the IRQ control
1764 register. */
1765 switch (dev->id_irq) {
1766 case IRQ3: sc->priv_info = 0x10; break;
1767 case IRQ5: sc->priv_info = 0x20; break;
1768 case IRQ6: sc->priv_info = 0x40; break;
1769 case IRQ12: sc->priv_info = 0x80; break;
1770 default:
1771 fe_irq_failure(sc->typestr,
1772 sc->sc_unit, dev->id_irq, "3/5/6/12");
1773 return 0;
1774 }
1775
1776 /* Setup hooks. We need a special initialization procedure. */
1777 sc->init = fe_init_rex;
1778
1779 /* REX-9880 has 64KB SRAM. */
1780 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB
1781 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM;
1782#if 1
1783 sc->proto_dlcr7 |= FE_D7_EOPPOL; /* XXX */
1784#endif
1785 /* The I/O address range is fragmented in the REX-9880.
1786 This is the number of regs at iobase. */
1787 return 16;
1788}
1789#else /* !PC98 */
1790/*
1791 * Probe and initialization for Fujitsu FMV-180 series boards
1792 */
1793
1794static void
1795fe_init_fmv (struct fe_softc *sc)
1796{
1797 /* Initialize ASIC. */
1798 outb( sc->ioaddr[ FE_FMV3 ], 0 );
1799 outb( sc->ioaddr[ FE_FMV10 ], 0 );
1800
1801#if 0
1802 /* "Refresh" hardware configuration. FIXME. */
1803 outb( sc->ioaddr[ FE_FMV2 ], inb( sc->ioaddr[ FE_FMV2 ] ) );
1804#endif
1805
1806 /* Turn the "master interrupt control" flag of ASIC on. */
1807 outb( sc->ioaddr[ FE_FMV3 ], FE_FMV3_IRQENB );
1808}
1809
1810static void
1811fe_msel_fmv184 (struct fe_softc *sc)
1812{
1813 u_char port;
1814
1815 /* FMV-184 has a special "register" to switch between AUI/BNC.
1816 Determine the value to write into the register, based on the
1817 user-specified media selection. */
1818 port = (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_2) ? 0x00 : 0x01;
1819
1820 /* The register is #5 on exntesion register bank...
1821 (Details of the register layout is not yet discovered.) */
1822 outb(sc->ioaddr[0x1B], 0x46); /* ??? */
1823 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */
1824 outb(sc->ioaddr[0x1F], 0xC8); /* ??? */
1825 outb(sc->ioaddr[0x1E], 0x05); /* select ex-reg #5. */
1826 outb(sc->ioaddr[0x1F], port); /* Switch the media. */
1827 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */
1828 outb(sc->ioaddr[0x1F], 0x00); /* ??? */
1829 outb(sc->ioaddr[0x1B], 0x00); /* ??? */
1830
1831 /* Make sure to select "external tranceiver" on MB86964. */
1832 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | FE_B13_PORT_AUI);
1833}
1834
1835static int
1836fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc )
1837{
1838 int n;
1839
1840 static u_short const irqmap [ 4 ] =
1841 { IRQ3, IRQ7, IRQ10, IRQ15 };
1842
1843 static struct fe_simple_probe_struct const probe_table [] = {
1844 { FE_DLCR2, 0x71, 0x00 },
1845 { FE_DLCR4, 0x08, 0x00 },
1846
1847 { FE_FMV0, 0x78, 0x50 }, /* ERRDY+PRRDY */
1848 { FE_FMV1, 0xB0, 0x00 }, /* FMV-183/4 has 0x48 bits. */
1849 { FE_FMV3, 0x7F, 0x00 },
1850
1851 { 0 }
1852 };
1853
1854 /* Board subtypes; it lists known FMV-180 variants. */
1855 struct subtype {
1856 u_short mcode;
1857 u_short mbitmap;
1858 u_short defmedia;
1859 char const * str;
1860 };
1861 static struct subtype const typelist [] = {
1862 { 0x0005, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181" },
1863 { 0x0105, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181A" },
1864 { 0x0003, MB_HM, MB_HM, "FMV-182" },
1865 { 0x0103, MB_HM, MB_HM, "FMV-182A" },
1866 { 0x0804, MB_HT, MB_HT, "FMV-183" },
1867 { 0x0C04, MB_HT, MB_HT, "FMV-183 (on-board)" },
1868 { 0x0803, MB_H2|MB_H5, MB_H2, "FMV-184" },
1869 { 0, MB_HA, MB_HA, "unknown FMV-180 (?)" },
1870 };
1871 struct subtype const * type;
1872
1873 /* Media indicator and "Hardware revision ID" */
1874 u_short mcode;
1875
1876 /* See if the specified address is possible for FMV-180
1877 series. 220, 240, 260, 280, 2A0, 2C0, 300, and 340 are
1878 allowed for all boards, and 200, 2E0, 320, 360, 380, 3A0,
1879 3C0, and 3E0 for PnP boards. */
1880 if ((sc->iobase & ~0x1E0) != 0x200) return 0;
1881
1882 /* Setup an I/O address mapping table and some others. */
1883 fe_softc_defaults(sc);
1884
1885 /* Simple probe. */
1886 if (!fe_simple_probe(sc, probe_table)) return 0;
1887
1888 /* Get our station address from EEPROM, and make sure it is
1889 Fujitsu's. */
1890 inblk(sc, FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
1891 if (!valid_Ether_p(sc->sc_enaddr, 0x00000E)) return 0;
1892
1893 /* Find the supported media and "hardware revision" to know
1894 the model identification. */
1895 mcode = (inb(sc->ioaddr[FE_FMV0]) & FE_FMV0_MEDIA)
1896 | ((inb(sc->ioaddr[FE_FMV1]) & FE_FMV1_REV) << 8);
1897
1898 /* Determine the card type. */
1899 for (type = typelist; type->mcode != 0; type++) {
1900 if (type->mcode == mcode) break;
1901 }
1902 if (type->mcode == 0) {
1903 /* Unknown card type... Hope the driver works. */
1904 sc->stability |= UNSTABLE_TYPE;
1905 if (bootverbose) {
1906 printf("fe%d: unknown config: %x-%x-%x-%x\n",
1907 sc->sc_unit,
1908 inb(sc->ioaddr[FE_FMV0]),
1909 inb(sc->ioaddr[FE_FMV1]),
1910 inb(sc->ioaddr[FE_FMV2]),
1911 inb(sc->ioaddr[FE_FMV3]));
1912 }
1913 }
1914
1915 /* Setup the board type and media information. */
1916 sc->typestr = type->str;
1917 sc->mbitmap = type->mbitmap;
1918 sc->defmedia = type->defmedia;
1919 sc->msel = fe_msel_965;
1920
1921 if (type->mbitmap == (MB_H2 | MB_H5)) {
1922 /* FMV184 requires a special media selection procedure. */
1923 sc->msel = fe_msel_fmv184;
1924 }
1925
1926 /*
1927 * An FMV-180 has been probed.
1928 * Determine which IRQ to be used.
1929 *
1930 * In this version, we give a priority to the kernel config file.
1931 * If the EEPROM and config don't match, say it to the user for
1932 * an attention.
1933 */
1934 n = ( inb( sc->ioaddr[ FE_FMV2 ] ) & FE_FMV2_IRS )
1935 >> FE_FMV2_IRS_SHIFT;
1936 if ( dev->id_irq == NO_IRQ ) {
1937 /* Just use the probed value. */
1938 dev->id_irq = irqmap[ n ];
1939 } else if ( dev->id_irq != irqmap[ n ] ) {
1940 /* Don't match. */
1941 sc->stability |= UNSTABLE_IRQ;
1942 }
1943
1944 /* We need an init hook to initialize ASIC before we start. */
1945 sc->init = fe_init_fmv;
1946
1947 /*
1948 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
1949 */
1950 return 32;
1951}
1952
1953/*
1954 * Fujitsu MB86965 JLI mode probe routines.
1955 *
1956 * 86965 has a special operating mode called JLI (mode 0), under which
1957 * the chip interfaces with ISA bus with a software-programmable
1958 * configuration. (The Fujitsu document calls the feature "Plug and
1959 * play," but it is not compatible with the ISA-PnP spec. designed by
1960 * Intel and Microsoft.) Ethernet cards designed to use JLI are
1961 * almost same, but there are two things which require board-specific
1962 * probe routines: EEPROM layout and IRQ pin connection.
1963 *
1964 * JLI provides a handy way to access EEPROM which should contains the
1965 * chip configuration information (such as I/O port address) as well
1966 * as Ethernet station (MAC) address. The chip configuration info. is
1967 * stored on a fixed location. However, the station address can be
1968 * located anywhere in the EEPROM; it is up to the board designer to
1969 * determine the location. (The manual just says "somewhere in the
1970 * EEPROM.") The fe driver must somehow find out the correct
1971 * location.
1972 *
1973 * Another problem resides in the IRQ pin connection. JLI provides a
1974 * user to choose an IRQ from up to four predefined IRQs. The 86965
1975 * chip has a register to select one out of the four possibilities.
1976 * However, the selection is against the four IRQ pins on the chip.
1977 * (So-called IRQ-A, -B, -C and -D.) It is (again) up to the board
1978 * designer to determine which pin to connect which IRQ line on the
1979 * ISA bus. We need a vendor (or model, for some vendor) specific IRQ
1980 * mapping table.
1981 *
1982 * The routine fe_probe_jli() provides all probe and initialization
1983 * processes which are common to all JLI implementation, and sub-probe
1984 * routines supply board-specific actions.
1985 *
1986 * JLI sub-probe routine has the following template:
1987 *
1988 * u_short const * func (struct fe_softc * sc, u_char const * eeprom);
1989 *
1990 * where eeprom is a pointer to an array of 32 byte data read from the
1991 * config EEPROM on the board. It retuns an IRQ mapping table for the
1992 * board, when the corresponding implementation is detected. It
1993 * returns a NULL otherwise.
1994 *
1995 * Primary purpose of the functin is to analize the config EEPROM,
1996 * determine if it matches with the pattern of that of supported card,
1997 * and extract necessary information from it. One of the information
1998 * expected to be extracted from EEPROM is the Ethernet station (MAC)
1999 * address, which must be set to the softc table of the interface by
2000 * the board-specific routine.
2001 */
2002
2003/* JLI sub-probe for Allied-Telesyn/Allied-Telesis AT1700/RE2000 series. */
2004static u_short const *
2005fe_probe_jli_ati (struct fe_softc * sc, u_char const * eeprom)
2006{
2007 int i;
2008 static u_short const irqmaps_ati [4][4] =
2009 {
2010 { IRQ3, IRQ4, IRQ5, IRQ9 },
2011 { IRQ10, IRQ11, IRQ12, IRQ15 },
2012 { IRQ3, IRQ11, IRQ5, IRQ15 },
2013 { IRQ10, IRQ11, IRQ14, IRQ15 },
2014 };
2015
2016 /* Make sure the EEPROM contains Allied-Telesis/Allied-Telesyn
2017 bit pattern. */
2018 if (eeprom[1] != 0x00) return NULL;
2019 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL;
2020 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL;
2021
2022 /* Get our station address from EEPROM, and make sure the
2023 EEPROM contains ATI's address. */
2024 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN);
2025 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL;
2026
2027 /*
2028 * The following model identification codes are stolen
2029 * from the NetBSD port of the fe driver. My reviewers
2030 * suggested minor revision.
2031 */
2032
2033 /* Determine the card type. */
2034 switch (eeprom[FE_ATI_EEP_MODEL]) {
2035 case FE_ATI_MODEL_AT1700T:
2036 sc->typestr = "AT-1700T/RE2001";
2037 sc->mbitmap = MB_HT;
2038 sc->defmedia = MB_HT;
2039 break;
2040 case FE_ATI_MODEL_AT1700BT:
2041 sc->typestr = "AT-1700BT/RE2003";
2042 sc->mbitmap = MB_HA | MB_HT | MB_H2;
2043 break;
2044 case FE_ATI_MODEL_AT1700FT:
2045 sc->typestr = "AT-1700FT/RE2009";
2046 sc->mbitmap = MB_HA | MB_HT | MB_HF;
2047 break;
2048 case FE_ATI_MODEL_AT1700AT:
2049 sc->typestr = "AT-1700AT/RE2005";
2050 sc->mbitmap = MB_HA | MB_HT | MB_H5;
2051 break;
2052 default:
2053 sc->typestr = "unknown AT-1700/RE2000";
2054 sc->stability |= UNSTABLE_TYPE | UNSTABLE_IRQ;
2055 break;
2056 }
2057
2058#if 0
2059 /* Should we extract default media from eeprom? Linux driver
2060 for AT1700 does it, although previous releases of FreeBSD
2061 don't. FIXME. */
2062 /* Determine the default media selection from the config
2063 EEPROM. The byte at offset EEP_MEDIA is believed to
2064 contain BMPR13 value to be set. We just ignore STP bit or
2065 squelch bit, since we don't support those. (It is
2066 intentional.) */
2067 switch (eeprom[FE_ATI_EEP_MEDIA] & FE_B13_PORT) {
2068 case FE_B13_AUTO:
2069 sc->defmedia = MB_HA;
2070 break;
2071 case FE_B13_TP:
2072 sc->defmedia = MB_HT;
2073 break;
2074 case FE_B13_AUI:
2075 sc->defmedia = sc->mbitmap & (MB_H2|MB_H5|MB_H5); /*XXX*/
2076 break;
2077 default:
2078 sc->defmedia = MB_HA;
2079 break;
2080 }
2081
2082 /* Make sure the default media is compatible with the supported
2083 ones. */
2084 if ((sc->defmedia & sc->mbitmap) == 0) {
2085 if (sc->defmedia == MB_HA) {
2086 sc->defmedia = MB_HT;
2087 } else {
2088 sc->defmedia = MB_HA;
2089 }
2090 }
2091#endif
2092
2093 /*
2094 * Try to determine IRQ settings.
2095 * Different models use different ranges of IRQs.
2096 */
2097 switch ((eeprom[FE_ATI_EEP_REVISION] & 0xf0)
2098 |(eeprom[FE_ATI_EEP_MAGIC] & 0x04)) {
2099 case 0x30: case 0x34: return irqmaps_ati[3];
2100 case 0x10: case 0x14:
2101 case 0x50: case 0x54: return irqmaps_ati[2];
2102 case 0x44: case 0x64: return irqmaps_ati[1];
2103 default: return irqmaps_ati[0];
2104 }
2105}
2106
2107/* JLI sub-probe and msel hook for ICL Ethernet. */
2108
2109static void
2110fe_msel_icl (struct fe_softc *sc)
2111{
2112 u_char d4;
2113
2114 /* Switch between UTP and "external tranceiver" as always. */
2115 fe_msel_965(sc);
2116
2117 /* The board needs one more bit (on DLCR4) be set appropriately. */
2118 if (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_5) {
2119 d4 = sc->proto_dlcr4 | FE_D4_CNTRL;
2120 } else {
2121 d4 = sc->proto_dlcr4 & ~FE_D4_CNTRL;
2122 }
2123 outb(sc->ioaddr[FE_DLCR4], d4);
2124}
2125
2126static u_short const *
2127fe_probe_jli_icl (struct fe_softc * sc, u_char const * eeprom)
2128{
2129 int i;
2130 u_short defmedia;
2131 u_char d6;
2132 static u_short const irqmap_icl [4] = { IRQ9, IRQ10, IRQ5, IRQ15 };
2133
2134 /* Make sure the EEPROM contains ICL bit pattern. */
2135 for (i = 24; i < 39; i++) {
2136 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL;
2137 }
2138 for (i = 112; i < 122; i++) {
2139 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL;
2140 }
2141
2142 /* Make sure the EEPROM contains ICL's permanent station
2143 address. If it isn't, probably this board is not an
2144 ICL's. */
2145 if (!valid_Ether_p(eeprom+122, 0x00004B)) return NULL;
2146
2147 /* Check if the "configured" Ethernet address in the EEPROM is
2148 valid. Use it if it is, or use the "permanent" address instead. */
2149 if (valid_Ether_p(eeprom+4, 0x020000)) {
2150 /* The configured address is valid. Use it. */
2151 bcopy(eeprom+4, sc->sc_enaddr, ETHER_ADDR_LEN);
2152 } else {
2153 /* The configured address is invalid. Use permanent. */
2154 bcopy(eeprom+122, sc->sc_enaddr, ETHER_ADDR_LEN);
2155 }
2156
2157 /* Determine model and supported media. */
2158 switch (eeprom[0x5E]) {
2159 case 0:
2160 sc->typestr = "EtherTeam16i/COMBO";
2161 sc->mbitmap = MB_HA | MB_HT | MB_H5 | MB_H2;
2162 break;
2163 case 1:
2164 sc->typestr = "EtherTeam16i/TP";
2165 sc->mbitmap = MB_HT;
2166 break;
2167 case 2:
2168 sc->typestr = "EtherTeam16i/ErgoPro";
2169 sc->mbitmap = MB_HA | MB_HT | MB_H5;
2170 break;
2171 case 4:
2172 sc->typestr = "EtherTeam16i/DUO";
2173 sc->mbitmap = MB_HA | MB_HT | MB_H2;
2174 break;
2175 default:
2176 sc->typestr = "EtherTeam16i";
2177 sc->stability |= UNSTABLE_TYPE;
2178 if (bootverbose) {
2179 printf("fe%d: unknown model code %02x for EtherTeam16i\n",
2180 sc->sc_unit, eeprom[0x5E]);
2181 }
2182 break;
2183 }
2184
2185 /* I'm not sure the following msel hook is required by all
2186 models or COMBO only... FIXME. */
2187 sc->msel = fe_msel_icl;
2188
2189 /* Make the configured media selection the default media. */
2190 switch (eeprom[0x28]) {
2191 case 0: defmedia = MB_HA; break;
2192 case 1: defmedia = MB_H5; break;
2193 case 2: defmedia = MB_HT; break;
2194 case 3: defmedia = MB_H2; break;
2195 default:
2196 if (bootverbose) {
2197 printf("fe%d: unknown default media: %02x\n",
2198 sc->sc_unit, eeprom[0x28]);
2199 }
2200 defmedia = MB_HA;
2201 break;
2202 }
2203
2204 /* Make sure the default media is compatible with the
2205 supported media. */
2206 if ((defmedia & sc->mbitmap) == 0) {
2207 if (bootverbose) {
2208 printf("fe%d: default media adjusted\n", sc->sc_unit);
2209 }
2210 defmedia = sc->mbitmap;
2211 }
2212
2213 /* Keep the determined default media. */
2214 sc->defmedia = defmedia;
2215
2216 /* ICL has "fat" models. We have to program 86965 to properly
2217 reflect the hardware. */
2218 d6 = sc->proto_dlcr6 & ~(FE_D6_BUFSIZ | FE_D6_BBW);
2219 switch ((eeprom[0x61] << 8) | eeprom[0x60]) {
2220 case 0x2008: d6 |= FE_D6_BUFSIZ_32KB | FE_D6_BBW_BYTE; break;
2221 case 0x4010: d6 |= FE_D6_BUFSIZ_64KB | FE_D6_BBW_WORD; break;
2222 default:
2223 /* We can't support it, since we don't know which bits
2224 to set in DLCR6. */
2225 printf("fe%d: unknown SRAM config for ICL\n", sc->sc_unit);
2226 return NULL;
2227 }
2228 sc->proto_dlcr6 = d6;
2229
2230 /* Returns the IRQ table for the ICL board. */
2231 return irqmap_icl;
2232}
2233
2234/* JLI sub-probe for RATOC REX-5586/5587. */
2235static u_short const *
2236fe_probe_jli_rex (struct fe_softc * sc, u_char const * eeprom)
2237{
2238 int i;
2239 static u_short const irqmap_rex [4] = { IRQ3, IRQ4, IRQ5, NO_IRQ };
2240
2241 /* Make sure the EEPROM contains RATOC's config pattern. */
2242 if (eeprom[1] != eeprom[0]) return NULL;
2243 for (i = 8; i < 32; i++) if (eeprom[i] != 0xFF) return NULL;
2244
2245 /* Get our station address from EEPROM. Note that RATOC
2246 stores it "byte-swapped" in each word. (I don't know why.)
2247 So, we just can't use bcopy().*/
2248 sc->sc_enaddr[0] = eeprom[3];
2249 sc->sc_enaddr[1] = eeprom[2];
2250 sc->sc_enaddr[2] = eeprom[5];
2251 sc->sc_enaddr[3] = eeprom[4];
2252 sc->sc_enaddr[4] = eeprom[7];
2253 sc->sc_enaddr[5] = eeprom[6];
2254
2255 /* Make sure the EEPROM contains RATOC's station address. */
2256 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0)) return NULL;
2257
2258 /* I don't know any sub-model identification. */
2259 sc->typestr = "REX-5586/5587";
2260
2261 /* Returns the IRQ for the RATOC board. */
2262 return irqmap_rex;
2263}
2264
2265/* JLI sub-probe for Unknown board. */
2266static u_short const *
2267fe_probe_jli_unk (struct fe_softc * sc, u_char const * eeprom)
2268{
2269 int i, n, romsize;
2270 static u_short const irqmap [4] = { NO_IRQ, NO_IRQ, NO_IRQ, NO_IRQ };
2271
2272 /* The generic JLI probe considered this board has an 86965
2273 in JLI mode, but any other board-specific routines could
2274 not find the matching implementation. So, we "guess" the
2275 location by looking for a bit pattern which looks like a
2276 MAC address. */
2277
2278 /* Determine how large the EEPROM is. */
2279 for (romsize = JLI_EEPROM_SIZE/2; romsize > 16; romsize >>= 1) {
2280 for (i = 0; i < romsize; i++) {
2281 if (eeprom[i] != eeprom[i+romsize]) break;
2282 }
2283 if (i < romsize) break;
2284 }
2285 romsize <<= 1;
2286
2287 /* Look for a bit pattern which looks like a MAC address. */
2288 for (n = 2; n <= romsize - ETHER_ADDR_LEN; n += 2) {
2289 if (!valid_Ether_p(eeprom + n, 0x000000)) continue;
2290 }
2291
2292 /* If no reasonable address was found, we can't go further. */
2293 if (n > romsize - ETHER_ADDR_LEN) return NULL;
2294
2295 /* Extract our (guessed) station address. */
2296 bcopy(eeprom+n, sc->sc_enaddr, ETHER_ADDR_LEN);
2297
2298 /* We are not sure what type of board it is... */
2299 sc->typestr = "(unknown JLI)";
2300 sc->stability |= UNSTABLE_TYPE | UNSTABLE_MAC;
2301
2302 /* Returns the totally unknown IRQ mapping table. */
2303 return irqmap;
2304}
2305
2306/*
2307 * Probe and initialization for all JLI implementations.
2308 */
2309
2310static int
2311fe_probe_jli (struct isa_device * dev, struct fe_softc * sc)
2312{
2313 int i, n;
2314 int irq;
2315 u_char eeprom [JLI_EEPROM_SIZE];
2316 u_short const * irqmap;
2317
2318 static u_short const baseaddr [8] =
2319 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
2320 static struct fe_simple_probe_struct const probe_table [] = {
2321 { FE_DLCR1, 0x20, 0x00 },
2322 { FE_DLCR2, 0x50, 0x00 },
2323 { FE_DLCR4, 0x08, 0x00 },
2324 { FE_DLCR5, 0x80, 0x00 },
2325#if 0
2326 { FE_BMPR16, 0x1B, 0x00 },
2327 { FE_BMPR17, 0x7F, 0x00 },
2328#endif
2329 { 0 }
2330 };
2331
2332 /*
2333 * See if the specified address is possible for MB86965A JLI mode.
2334 */
2335 for (i = 0; i < 8; i++) {
2336 if (baseaddr[i] == sc->iobase) break;
2337 }
2338 if (i == 8) return 0;
2339
2340 /* Fill the softc struct with reasonable default. */
2341 fe_softc_defaults(sc);
2342
2343 /*
2344 * We should test if MB86965A is on the base address now.
2345 * Unfortunately, it is very hard to probe it reliably, since
2346 * we have no way to reset the chip under software control.
2347 * On cold boot, we could check the "signature" bit patterns
2348 * described in the Fujitsu document. On warm boot, however,
2349 * we can predict almost nothing about register values.
2350 */
2351 if (!fe_simple_probe(sc, probe_table)) return 0;
2352
2353 /* Check if our I/O address matches config info on 86965. */
2354 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
2355 if (baseaddr[n] != sc->iobase) return 0;
2356
2357 /*
2358 * We are now almost sure we have an MB86965 at the given
2359 * address. So, read EEPROM through it. We have to write
2360 * into LSI registers to read from EEPROM. I want to avoid it
2361 * at this stage, but I cannot test the presence of the chip
2362 * any further without reading EEPROM. FIXME.
2363 */
2364 fe_read_eeprom_jli(sc, eeprom);
2365
2366 /* Make sure that config info in EEPROM and 86965 agree. */
2367 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) {
2368 return 0;
2369 }
2370
2371 /* Use 86965 media selection scheme, unless othewise
2372 specified. It is "AUTO always" and "select with BMPR13."
2373 This behaviour covers most of the 86965 based board (as
2374 minimum requirements.) It is backward compatible with
2375 previous versions, also. */
2376 sc->mbitmap = MB_HA;
2377 sc->defmedia = MB_HA;
2378 sc->msel = fe_msel_965;
2379
2380 /* Perform board-specific probe, one by one. Note that the
2381 order of probe is important and should not be changed
2382 arbitrarily. */
2383 if ((irqmap = fe_probe_jli_ati(sc, eeprom)) == NULL
2384 && (irqmap = fe_probe_jli_rex(sc, eeprom)) == NULL
2385 && (irqmap = fe_probe_jli_icl(sc, eeprom)) == NULL
2386 && (irqmap = fe_probe_jli_unk(sc, eeprom)) == NULL) return 0;
2387
2388 /* Find the IRQ read from EEPROM. */
2389 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
2390 irq = irqmap[n];
2391
2392 /* Try to determine IRQ setting. */
2393 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) {
2394 /* The device must be configured with an explicit IRQ. */
2395 printf("fe%d: IRQ auto-detection does not work\n",
2396 sc->sc_unit);
2397 return 0;
2398 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) {
2399 /* Just use the probed IRQ value. */
2400 dev->id_irq = irq;
2401 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) {
2402 /* No problem. Go ahead. */
2403 } else if (dev->id_irq == irq) {
2404 /* Good. Go ahead. */
2405 } else {
2406 /* User must be warned in this case. */
2407 sc->stability |= UNSTABLE_IRQ;
2408 }
2409
2410 /* Setup a hook, which resets te 86965 when the driver is being
2411 initialized. This may solve a nasty bug. FIXME. */
2412 sc->init = fe_init_jli;
2413
2414 /*
2415 * That's all. 86965 JLI occupies 32 I/O addresses, by the way.
2416 */
2417 return 32;
2418}
2419
2420/* Probe for TDK LAK-AX031, which is an SSi 78Q8377A based board. */
2421
2422static int
2423fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc)
2424{
2425 u_char eeprom [SSI_EEPROM_SIZE];
2426
2427 static struct fe_simple_probe_struct probe_table [] = {
2428 { FE_DLCR2, 0x08, 0x00 },
2429 { FE_DLCR4, 0x08, 0x00 },
2430 { 0 }
2431 };
2432
2433 /* See if the specified I/O address is possible for 78Q8377A. */
2434 if ((sc->iobase & ~0x3F0) != 0x000) return 0;
2435
2436 /* Fill the softc struct with default values. */
2437 fe_softc_defaults(sc);
2438
2439 /* See if the card is on its address. */
2440 if (!fe_simple_probe(sc, probe_table)) return 0;
2441
2442 /* We now have to read the config EEPROM. We should be very
2443 careful, since doing so destroys a register. (Remember, we
2444 are not yet sure we have a LAK-AX031 board here.) Don't
2445 remember to select BMPRs bofore reading EEPROM, since other
2446 register bank may be selected before the probe() is called. */
2447 fe_read_eeprom_ssi(sc, eeprom);
2448
2449 /* Make sure the Ethernet (MAC) station address is of TDK's. */
2450 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x008098)) return 0;
2451 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
2452
2453 /* This looks like a TDK-AX031 board. It requires an explicit
2454 IRQ setting in config, since we currently don't know how we
2455 can find the IRQ value assigned by ISA PnP manager. */
2456 if (dev->id_irq == NO_IRQ) {
2457 fe_irq_failure("LAK-AX031", sc->sc_unit, dev->id_irq, NULL);
2458 return 0;
2459 }
2460
2461 /* Fill softc struct accordingly. */
2462 sc->typestr = "LAK-AX031";
2463 sc->mbitmap = MB_HT;
2464 sc->defmedia = MB_HT;
2465
2466 /* We have 16 registers. */
2467 return 16;
2468}
2469
2470/*
2471 * Probe and initialization for TDK/LANX LAC-AX012/013 boards.
2472 */
2473static int
2474fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc)
2475{
2476 u_char eeprom [LNX_EEPROM_SIZE];
2477
2478 static struct fe_simple_probe_struct probe_table [] = {
2479 { FE_DLCR2, 0x58, 0x00 },
2480 { FE_DLCR4, 0x08, 0x00 },
2481 { 0 }
2482 };
2483
2484 /* See if the specified I/O address is possible for TDK/LANX boards. */
2485 /* 300, 320, 340, and 360 are allowed. */
2486 if ((sc->iobase & ~0x060) != 0x300) return 0;
2487
2488 /* Fill the softc struct with default values. */
2489 fe_softc_defaults(sc);
2490
2491 /* See if the card is on its address. */
2492 if (!fe_simple_probe(sc, probe_table)) return 0;
2493
2494 /* We now have to read the config EEPROM. We should be very
2495 careful, since doing so destroys a register. (Remember, we
2496 are not yet sure we have a LAC-AX012/AX013 board here.) */
2497 fe_read_eeprom_lnx(sc, eeprom);
2498
2499 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */
2500 if (!valid_Ether_p(eeprom, 0x008098)) return 0;
2501 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN);
2502
2503 /* This looks like a TDK/LANX board. It requires an
2504 explicit IRQ setting in config. Make sure we have one,
2505 determining an appropriate value for the IRQ control
2506 register. */
2507 switch (dev->id_irq) {
2508 case IRQ3: sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break;
2509 case IRQ4: sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break;
2510 case IRQ5: sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break;
2511 case IRQ9: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break;
2512 default:
2513 fe_irq_failure("LAC-AX012/AX013",
2514 sc->sc_unit, dev->id_irq, "3/4/5/9");
2515 return 0;
2516 }
2517
2518 /* Fill softc struct accordingly. */
2519 sc->typestr = "LAC-AX012/AX013";
2520 sc->init = fe_init_lnx;
2521
2522 /* We have 32 registers. */
2523 return 32;
2524}
2525
2526/*
2527 * Probe and initialization for Gateway Communications' old cards.
2528 */
2529static int
2530fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc )
2531{
2532 static struct fe_simple_probe_struct probe_table [] = {
2533 /* { FE_DLCR2, 0x70, 0x00 }, */
2534 { FE_DLCR2, 0x58, 0x00 },
2535 { FE_DLCR4, 0x08, 0x00 },
2536 { 0 }
2537 };
2538
2539 /* See if the specified I/O address is possible for Gateway boards. */
2540 if ((sc->iobase & ~0x1E0) != 0x200) return 0;
2541
2542 /* Setup an I/O address mapping table and some others. */
2543 fe_softc_defaults(sc);
2544
2545 /* See if the card is on its address. */
2546 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2547
2548 /* Get our station address from EEPROM. */
2549 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN );
2550
2551 /* Make sure it is Gateway Communication's. */
2552 if (!valid_Ether_p(sc->sc_enaddr, 0x000061)) return 0;
2553
2554 /* Gateway's board requires an explicit IRQ to work, since it
2555 is not possible to probe the setting of jumpers. */
2556 if (dev->id_irq == NO_IRQ) {
2557 fe_irq_failure("Gateway Ethernet", sc->sc_unit, NO_IRQ, NULL);
2558 return 0;
2559 }
2560
2561 /* Fill softc struct accordingly. */
2562 sc->typestr = "Gateway Ethernet (Fujitsu chipset)";
2563
2564 /* That's all. The card occupies 32 I/O addresses, as always. */
2565 return 32;
2566}
2567
2568/* Probe and initialization for Ungermann-Bass Network
2569 K.K. "Access/PC" boards. */
2570static int
2571fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc)
2572{
2573#if 0
2574 u_char sum;
2575#endif
2576 static struct fe_simple_probe_struct const probe_table [] = {
2577 { FE_DLCR2, 0x58, 0x00 },
2578 { FE_DLCR4, 0x08, 0x00 },
2579 { 0 }
2580 };
2581
2582 /* See if the specified I/O address is possible for AccessPC/ISA. */
2583 if ((sc->iobase & ~0x0E0) != 0x300) return 0;
2584
2585 /* Setup an I/O address mapping table and some others. */
2586 fe_softc_defaults(sc);
2587
2588 /* Simple probe. */
2589 if (!fe_simple_probe(sc, probe_table)) return 0;
2590
2591 /* Get our station address form ID ROM and make sure it is UBN's. */
2592 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
2593 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) return 0;
2594#if 0
2595 /* Calculate checksum. */
2596 sum = inb(sc->ioaddr[0x1e]);
2597 for (i = 0; i < ETHER_ADDR_LEN; i++) {
2598 sum ^= sc->sc_enaddr[i];
2599 }
2600 if (sum != 0) return 0;
2601#endif
2602 /* This looks like an AccessPC/ISA board. It requires an
2603 explicit IRQ setting in config. Make sure we have one,
2604 determining an appropriate value for the IRQ control
2605 register. */
2606 switch (dev->id_irq) {
2607 case IRQ3: sc->priv_info = 0x02; break;
2608 case IRQ4: sc->priv_info = 0x04; break;
2609 case IRQ5: sc->priv_info = 0x08; break;
2610 case IRQ10: sc->priv_info = 0x10; break;
2611 default:
2612 fe_irq_failure("Access/PC",
2613 sc->sc_unit, dev->id_irq, "3/4/5/10");
2614 return 0;
2615 }
2616
2617 /* Fill softc struct accordingly. */
2618 sc->typestr = "Access/PC";
2619 sc->init = fe_init_ubn;
2620
2621 /* We have 32 registers. */
2622 return 32;
2623}
2624#endif /* PC98 */
2625
2626#if NCARD > 0
2627/*
2628 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
2629 * Note that this is for 10302 only; MBH10304 is handled by fe_probe_tdk().
2630 */
2631
2632static void
2633fe_init_mbh ( struct fe_softc * sc )
2634{
2635 /* Minimal initialization of 86960. */
2636 DELAY( 200 );
2637 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
2638 DELAY( 200 );
2639
2640 /* Disable all interrupts. */
2641 outb( sc->ioaddr[ FE_DLCR2 ], 0 );
2642 outb( sc->ioaddr[ FE_DLCR3 ], 0 );
2643
2644 /* Enable master interrupt flag. */
2645 outb( sc->ioaddr[ FE_MBH0 ], FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE );
2646}
2647
2648static int
2649fe_probe_mbh ( struct isa_device * dev, struct fe_softc * sc )
2650{
2651 static struct fe_simple_probe_struct probe_table [] = {
2652 { FE_DLCR2, 0x58, 0x00 },
2653 { FE_DLCR4, 0x08, 0x00 },
2654 { FE_DLCR6, 0xFF, 0xB6 },
2655 { 0 }
2656 };
2657
2658#ifdef DIAGNOSTIC
2659 /* We need an explicit IRQ. */
2660 if (dev->id_irq == NO_IRQ) return 0;
2661#endif
2662
2663 /* Ethernet MAC address should *NOT* have been given by pccardd,
2664 if this is a true MBH10302; i.e., Ethernet address must be
2665 "all-zero" upon entry. */
2666 if (sc->sc_enaddr[0] || sc->sc_enaddr[1] || sc->sc_enaddr[2] ||
2667 sc->sc_enaddr[3] || sc->sc_enaddr[4] || sc->sc_enaddr[5]) {
2668 return 0;
2669 }
2670
2671 /* Fill the softc struct with default values. */
2672 fe_softc_defaults(sc);
2673
2674 /*
2675 * See if MBH10302 is on its address.
2676 * I'm not sure the following probe code works. FIXME.
2677 */
2678 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2679
2680 /* Get our station address from EEPROM. */
2681 inblk( sc, FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN );
2682
2683 /* Make sure we got a valid station address. */
2684 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
2685
2686 /* Determine the card type. */
2687 sc->typestr = "MBH10302 (PCMCIA)";
2688
2689 /* We seems to need our own IDENT bits... FIXME. */
2690 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
2691
2692 /* Setup hooks. We need a special initialization procedure. */
2693 sc->init = fe_init_mbh;
2694
2695 /*
2696 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
2697 */
2698 return 32;
2699}
2700
2701/*
2702 * Probe and initialization for TDK/CONTEC PCMCIA Ethernet interface.
2703 * by MASUI Kenji <masui@cs.titech.ac.jp>
2704 *
2705 * (Contec uses TDK Ethenet chip -- hosokawa)
2706 *
2707 * This version of fe_probe_tdk has been rewrote to handle
2708 * *generic* PC card implementation of Fujitsu MB8696x family. The
2709 * name _tdk is just for a historical reason. :-)
2710 */
2711static int
2712fe_probe_tdk ( struct isa_device * dev, struct fe_softc * sc )
2713{
2714 static struct fe_simple_probe_struct probe_table [] = {
2715 { FE_DLCR2, 0x50, 0x00 },
2716 { FE_DLCR4, 0x08, 0x00 },
2717 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
2718 { 0 }
2719 };
2720
2721 if ( dev->id_irq == NO_IRQ ) {
2722 return ( 0 );
2723 }
2724
2725 fe_softc_defaults(sc);
2726
2727 /*
2728 * See if C-NET(PC)C is on its address.
2729 */
2730
2731 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2732
2733 /* Determine the card type. */
2734 sc->typestr = "Generic MB8696x/78Q837x Ethernet (PCMCIA)";
2735
2736 /*
2737 * Initialize constants in the per-line structure.
2738 */
2739
2740 /* Make sure we got a valid station address. */
2741 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
2742
2743 /*
2744 * That's all. C-NET(PC)C occupies 16 I/O addresses.
2745 * XXX: Are there any card with 32 I/O addresses? FIXME.
2746 */
2747 return 16;
2748}
2749#endif /* NCARD > 0 */
2750
2751/*
2752 * Install interface into kernel networking data structures
2753 */
2754static int
2755fe_attach ( struct isa_device * dev )
2756{
2757#if NCARD > 0
2758 static int already_ifattach[NFE];
2759#endif
2760 struct fe_softc *sc = &fe_softc[dev->id_unit];
2761 int b;
2762
2763 dev->id_ointr = feintr;
2764
2765 /*
2766 * Initialize ifnet structure
2767 */
2768 sc->sc_if.if_softc = sc;
2769 sc->sc_if.if_unit = sc->sc_unit;
2770 sc->sc_if.if_name = "fe";
2771 sc->sc_if.if_output = ether_output;
2772 sc->sc_if.if_start = fe_start;
2773 sc->sc_if.if_ioctl = fe_ioctl;
2774 sc->sc_if.if_watchdog = fe_watchdog;
2775 sc->sc_if.if_init = fe_init;
2776 sc->sc_if.if_linkmib = &sc->mibdata;
2777 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata);
2778
2779#if 0 /* I'm not sure... */
2780 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
2781#endif
2782
2783 /*
2784 * Set fixed interface flags.
2785 */
2786 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2787
2788#if 1
2789 /*
2790 * Set maximum size of output queue, if it has not been set.
2791 * It is done here as this driver may be started after the
2792 * system initialization (i.e., the interface is PCMCIA.)
2793 *
2794 * I'm not sure this is really necessary, but, even if it is,
2795 * it should be done somewhere else, e.g., in if_attach(),
2796 * since it must be a common workaround for all network drivers.
2797 * FIXME.
2798 */
2799 if ( sc->sc_if.if_snd.ifq_maxlen == 0 ) {
2800 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen;
2801 }
2802#endif
2803
2804#if FE_SINGLE_TRANSMISSION
2805 /* Override txb config to allocate minimum. */
2806 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
2807 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
2808#endif
2809
2810 /* Modify hardware config if it is requested. */
2811 if ( dev->id_flags & FE_FLAGS_OVERRIDE_DLCR6 ) {
2812 sc->proto_dlcr6 = dev->id_flags & FE_FLAGS_DLCR6_VALUE;
2813 }
2814
2815 /* Find TX buffer size, based on the hardware dependent proto. */
2816 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
2817 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
2818 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
2819 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
2820 default:
2821 /* Oops, we can't work with single buffer configuration. */
2822 if (bootverbose) {
2823 printf("fe%d: strange TXBSIZ config; fixing\n",
2824 sc->sc_unit);
2825 }
2826 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
2827 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
2828 sc->txb_size = 2048;
2829 break;
2830 }
2831
2832 /* Initialize the if_media interface. */
2833 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat );
2834 for (b = 0; bit2media[b] != 0; b++) {
2835 if (sc->mbitmap & (1 << b)) {
2836 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
2837 }
2838 }
2839 for (b = 0; bit2media[b] != 0; b++) {
2840 if (sc->defmedia & (1 << b)) {
2841 ifmedia_set(&sc->media, bit2media[b]);
2842 break;
2843 }
2844 }
2845#if 0 /* Turned off; this is called later, when the interface UPs. */
2846 fe_medchange(sc);
2847#endif
2848
2849 /* Attach and stop the interface. */
2850#if NCARD > 0
2851 if (already_ifattach[dev->id_unit] != 1) {
|
2910 return 1;
2911}
2912
2913/*
2914 * Reset interface, after some (hardware) trouble is deteced.
2915 */
2916static void
2917fe_reset (struct fe_softc *sc)
2918{
2919 /* Record how many packets are lost by this accident. */
2920 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count;
2921 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
2922
2923 /* Put the interface into known initial state. */
2924 fe_stop(sc);
2925 if (sc->sc_if.if_flags & IFF_UP) fe_init(sc);
2926}
2927
2928/*
2929 * Stop everything on the interface.
2930 *
2931 * All buffered packets, both transmitting and receiving,
2932 * if any, will be lost by stopping the interface.
2933 */
2934static void
2935fe_stop (struct fe_softc *sc)
2936{
2937 int s;
2938
2939 s = splimp();
2940
2941 /* Disable interrupts. */
2942 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 );
2943 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 );
2944
2945 /* Stop interface hardware. */
2946 DELAY( 200 );
2947 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
2948 DELAY( 200 );
2949
2950 /* Clear all interrupt status. */
2951 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF );
2952 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF );
2953
2954 /* Put the chip in stand-by mode. */
2955 DELAY( 200 );
2956 outb( sc->ioaddr[ FE_DLCR7 ], sc->proto_dlcr7 | FE_D7_POWER_DOWN );
2957 DELAY( 200 );
2958
2959 /* Reset transmitter variables and interface flags. */
2960 sc->sc_if.if_flags &= ~( IFF_OACTIVE | IFF_RUNNING );
2961 sc->sc_if.if_timer = 0;
2962 sc->txb_free = sc->txb_size;
2963 sc->txb_count = 0;
2964 sc->txb_sched = 0;
2965
2966 /* MAR loading can be delayed. */
2967 sc->filter_change = 0;
2968
2969 /* Call a device-specific hook. */
2970 if ( sc->stop ) sc->stop( sc );
2971
2972 (void) splx(s);
2973}
2974
2975/*
2976 * Device timeout/watchdog routine. Entered if the device neglects to
2977 * generate an interrupt after a transmit has been started on it.
2978 */
2979static void
2980fe_watchdog ( struct ifnet *ifp )
2981{
2982 struct fe_softc *sc = (struct fe_softc *)ifp;
2983
2984 /* A "debug" message. */
2985 printf("fe%d: transmission timeout (%d+%d)%s\n",
2986 ifp->if_unit, sc->txb_sched, sc->txb_count,
2987 (ifp->if_flags & IFF_UP) ? "" : " when down");
2988 if ( sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0 ) {
2989 printf("fe%d: wrong IRQ setting in config?\n", ifp->if_unit);
2990 }
2991 fe_reset( sc );
2992}
2993
2994/*
2995 * Initialize device.
2996 */
2997static void
2998fe_init (void * xsc)
2999{
3000 struct fe_softc *sc = xsc;
3001 int s;
3002
3003 /* We need an address. */
3004 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
3005#ifdef DIAGNOSTIC
3006 printf("fe%d: init() without any address\n", sc->sc_unit);
3007#endif
3008 return;
3009 }
3010
3011 /* Start initializing 86960. */
3012 s = splimp();
3013
3014 /* Call a hook before we start initializing the chip. */
3015 if ( sc->init ) sc->init( sc );
3016
3017 /*
3018 * Make sure to disable the chip, also.
3019 * This may also help re-programming the chip after
3020 * hot insertion of PCMCIAs.
3021 */
3022 DELAY( 200 );
3023 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
3024 DELAY( 200 );
3025
3026 /* Power up the chip and select register bank for DLCRs. */
3027 DELAY( 200 );
3028 outb( sc->ioaddr[ FE_DLCR7 ],
3029 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP );
3030 DELAY( 200 );
3031
3032 /* Feed the station address. */
3033 outblk( sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN );
3034
3035 /* Clear multicast address filter to receive nothing. */
3036 outb( sc->ioaddr[ FE_DLCR7 ],
3037 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP );
3038 outblk( sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN );
3039
3040 /* Select the BMPR bank for runtime register access. */
3041 outb( sc->ioaddr[ FE_DLCR7 ],
3042 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP );
3043
3044 /* Initialize registers. */
3045 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */
3046 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
3047 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 );
3048 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 );
3049 outb( sc->ioaddr[ FE_DLCR4 ], sc->proto_dlcr4 );
3050 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 );
3051 outb( sc->ioaddr[ FE_BMPR10 ], 0x00 );
3052 outb( sc->ioaddr[ FE_BMPR11 ], FE_B11_CTRL_SKIP | FE_B11_MODE1 );
3053 outb( sc->ioaddr[ FE_BMPR12 ], 0x00 );
3054 outb( sc->ioaddr[ FE_BMPR13 ], sc->proto_bmpr13 );
3055 outb( sc->ioaddr[ FE_BMPR14 ], 0x00 );
3056 outb( sc->ioaddr[ FE_BMPR15 ], 0x00 );
3057
3058 /* Enable interrupts. */
3059 outb( sc->ioaddr[ FE_DLCR2 ], FE_TMASK );
3060 outb( sc->ioaddr[ FE_DLCR3 ], FE_RMASK );
3061
3062 /* Select requested media, just before enabling DLC. */
3063 if (sc->msel) sc->msel(sc);
3064
3065 /* Enable transmitter and receiver. */
3066 DELAY( 200 );
3067 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE );
3068 DELAY( 200 );
3069
3070#ifdef DIAGNOSTIC
3071 /*
3072 * Make sure to empty the receive buffer.
3073 *
3074 * This may be redundant, but *if* the receive buffer were full
3075 * at this point, then the driver would hang. I have experienced
3076 * some strange hang-up just after UP. I hope the following
3077 * code solve the problem.
3078 *
3079 * I have changed the order of hardware initialization.
3080 * I think the receive buffer cannot have any packets at this
3081 * point in this version. The following code *must* be
3082 * redundant now. FIXME.
3083 *
3084 * I've heard a rumore that on some PC card implementation of
3085 * 8696x, the receive buffer can have some data at this point.
3086 * The following message helps discovering the fact. FIXME.
3087 */
3088 if ( !( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) ) {
3089 printf("fe%d: receive buffer has some data after reset\n",
3090 sc->sc_unit);
3091 fe_emptybuffer( sc );
3092 }
3093
3094 /* Do we need this here? Actually, no. I must be paranoia. */
3095 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */
3096 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
3097#endif
3098
3099 /* Set 'running' flag, because we are now running. */
3100 sc->sc_if.if_flags |= IFF_RUNNING;
3101
3102 /*
3103 * At this point, the interface is running properly,
3104 * except that it receives *no* packets. we then call
3105 * fe_setmode() to tell the chip what packets to be
3106 * received, based on the if_flags and multicast group
3107 * list. It completes the initialization process.
3108 */
3109 fe_setmode( sc );
3110
3111#if 0
3112 /* ...and attempt to start output queued packets. */
3113 /* TURNED OFF, because the semi-auto media prober wants to UP
3114 the interface keeping it idle. The upper layer will soon
3115 start the interface anyway, and there are no significant
3116 delay. */
3117 fe_start( &sc->sc_if );
3118#endif
3119
3120 (void) splx(s);
3121}
3122
3123/*
3124 * This routine actually starts the transmission on the interface
3125 */
3126static void
3127fe_xmit ( struct fe_softc * sc )
3128{
3129 /*
3130 * Set a timer just in case we never hear from the board again.
3131 * We use longer timeout for multiple packet transmission.
3132 * I'm not sure this timer value is appropriate. FIXME.
3133 */
3134 sc->sc_if.if_timer = 1 + sc->txb_count;
3135
3136 /* Update txb variables. */
3137 sc->txb_sched = sc->txb_count;
3138 sc->txb_count = 0;
3139 sc->txb_free = sc->txb_size;
3140 sc->tx_excolls = 0;
3141
3142 /* Start transmitter, passing packets in TX buffer. */
3143 outb( sc->ioaddr[ FE_BMPR10 ], sc->txb_sched | FE_B10_START );
3144}
3145
3146/*
3147 * Start output on interface.
3148 * We make two assumptions here:
3149 * 1) that the current priority is set to splimp _before_ this code
3150 * is called *and* is returned to the appropriate priority after
3151 * return
3152 * 2) that the IFF_OACTIVE flag is checked before this code is called
3153 * (i.e. that the output part of the interface is idle)
3154 */
3155void
3156fe_start ( struct ifnet *ifp )
3157{
3158 struct fe_softc *sc = ifp->if_softc;
3159 struct mbuf *m;
3160
3161#ifdef DIAGNOSTIC
3162 /* Just a sanity check. */
3163 if ( ( sc->txb_count == 0 ) != ( sc->txb_free == sc->txb_size ) ) {
3164 /*
3165 * Txb_count and txb_free co-works to manage the
3166 * transmission buffer. Txb_count keeps track of the
3167 * used potion of the buffer, while txb_free does unused
3168 * potion. So, as long as the driver runs properly,
3169 * txb_count is zero if and only if txb_free is same
3170 * as txb_size (which represents whole buffer.)
3171 */
3172 printf("fe%d: inconsistent txb variables (%d, %d)\n",
3173 sc->sc_unit, sc->txb_count, sc->txb_free);
3174 /*
3175 * So, what should I do, then?
3176 *
3177 * We now know txb_count and txb_free contradicts. We
3178 * cannot, however, tell which is wrong. More
3179 * over, we cannot peek 86960 transmission buffer or
3180 * reset the transmission buffer. (In fact, we can
3181 * reset the entire interface. I don't want to do it.)
3182 *
3183 * If txb_count is incorrect, leaving it as-is will cause
3184 * sending of garbage after next interrupt. We have to
3185 * avoid it. Hence, we reset the txb_count here. If
3186 * txb_free was incorrect, resetting txb_count just loose
3187 * some packets. We can live with it.
3188 */
3189 sc->txb_count = 0;
3190 }
3191#endif
3192
3193 /*
3194 * First, see if there are buffered packets and an idle
3195 * transmitter - should never happen at this point.
3196 */
3197 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
3198 printf("fe%d: transmitter idle with %d buffered packets\n",
3199 sc->sc_unit, sc->txb_count);
3200 fe_xmit( sc );
3201 }
3202
3203 /*
3204 * Stop accepting more transmission packets temporarily, when
3205 * a filter change request is delayed. Updating the MARs on
3206 * 86960 flushes the transmission buffer, so it is delayed
3207 * until all buffered transmission packets have been sent
3208 * out.
3209 */
3210 if ( sc->filter_change ) {
3211 /*
3212 * Filter change request is delayed only when the DLC is
3213 * working. DLC soon raise an interrupt after finishing
3214 * the work.
3215 */
3216 goto indicate_active;
3217 }
3218
3219 for (;;) {
3220
3221 /*
3222 * See if there is room to put another packet in the buffer.
3223 * We *could* do better job by peeking the send queue to
3224 * know the length of the next packet. Current version just
3225 * tests against the worst case (i.e., longest packet). FIXME.
3226 *
3227 * When adding the packet-peek feature, don't forget adding a
3228 * test on txb_count against QUEUEING_MAX.
3229 * There is a little chance the packet count exceeds
3230 * the limit. Assume transmission buffer is 8KB (2x8KB
3231 * configuration) and an application sends a bunch of small
3232 * (i.e., minimum packet sized) packets rapidly. An 8KB
3233 * buffer can hold 130 blocks of 62 bytes long...
3234 */
3235 if ( sc->txb_free
3236 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN ) {
3237 /* No room. */
3238 goto indicate_active;
3239 }
3240
3241#if FE_SINGLE_TRANSMISSION
3242 if ( sc->txb_count > 0 ) {
3243 /* Just one packet per a transmission buffer. */
3244 goto indicate_active;
3245 }
3246#endif
3247
3248 /*
3249 * Get the next mbuf chain for a packet to send.
3250 */
3251 IF_DEQUEUE( &sc->sc_if.if_snd, m );
3252 if ( m == NULL ) {
3253 /* No more packets to send. */
3254 goto indicate_inactive;
3255 }
3256
3257 /*
3258 * Copy the mbuf chain into the transmission buffer.
3259 * txb_* variables are updated as necessary.
3260 */
3261 fe_write_mbufs( sc, m );
3262
3263 /* Start transmitter if it's idle. */
3264 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
3265 fe_xmit( sc );
3266 }
3267
3268 /*
3269 * Tap off here if there is a bpf listener,
3270 * and the device is *not* in promiscuous mode.
3271 * (86960 receives self-generated packets if
3272 * and only if it is in "receive everything"
3273 * mode.)
3274 */
3275 if ( sc->sc_if.if_bpf
3276 && !( sc->sc_if.if_flags & IFF_PROMISC ) ) {
3277 bpf_mtap( &sc->sc_if, m );
3278 }
3279
3280 m_freem( m );
3281 }
3282
3283 indicate_inactive:
3284 /*
3285 * We are using the !OACTIVE flag to indicate to
3286 * the outside world that we can accept an
3287 * additional packet rather than that the
3288 * transmitter is _actually_ active. Indeed, the
3289 * transmitter may be active, but if we haven't
3290 * filled all the buffers with data then we still
3291 * want to accept more.
3292 */
3293 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3294 return;
3295
3296 indicate_active:
3297 /*
3298 * The transmitter is active, and there are no room for
3299 * more outgoing packets in the transmission buffer.
3300 */
3301 sc->sc_if.if_flags |= IFF_OACTIVE;
3302 return;
3303}
3304
3305/*
3306 * Drop (skip) a packet from receive buffer in 86960 memory.
3307 */
3308static void
3309fe_droppacket ( struct fe_softc * sc, int len )
3310{
3311 int i;
3312
3313 /*
3314 * 86960 manual says that we have to read 8 bytes from the buffer
3315 * before skip the packets and that there must be more than 8 bytes
3316 * remaining in the buffer when issue a skip command.
3317 * Remember, we have already read 4 bytes before come here.
3318 */
3319 if ( len > 12 ) {
3320 /* Read 4 more bytes, and skip the rest of the packet. */
3321#ifdef FE_8BIT_SUPPORT
3322 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3323 {
3324 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3325 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3326 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3327 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3328 }
3329 else
3330#endif
3331 {
3332 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3333 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3334 }
3335 outb( sc->ioaddr[ FE_BMPR14 ], FE_B14_SKIP );
3336 } else {
3337 /* We should not come here unless receiving RUNTs. */
3338#ifdef FE_8BIT_SUPPORT
3339 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3340 {
3341 for ( i = 0; i < len; i++ ) {
3342 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3343 }
3344 }
3345 else
3346#endif
3347 {
3348 for ( i = 0; i < len; i += 2 ) {
3349 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3350 }
3351 }
3352 }
3353}
3354
3355#ifdef DIAGNOSTIC
3356/*
3357 * Empty receiving buffer.
3358 */
3359static void
3360fe_emptybuffer ( struct fe_softc * sc )
3361{
3362 int i;
3363 u_char saved_dlcr5;
3364
3365#ifdef FE_DEBUG
3366 printf("fe%d: emptying receive buffer\n", sc->sc_unit);
3367#endif
3368
3369 /*
3370 * Stop receiving packets, temporarily.
3371 */
3372 saved_dlcr5 = inb( sc->ioaddr[ FE_DLCR5 ] );
3373 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 );
3374 DELAY(1300);
3375
3376 /*
3377 * When we come here, the receive buffer management may
3378 * have been broken. So, we cannot use skip operation.
3379 * Just discard everything in the buffer.
3380 */
3381#ifdef FE_8BIT_SUPPORT
3382 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3383 {
3384 for ( i = 0; i < 65536; i++ ) {
3385 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break;
3386 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3387 }
3388 }
3389 else
3390#endif
3391 {
3392 for ( i = 0; i < 65536; i += 2 ) {
3393 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break;
3394 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3395 }
3396 }
3397
3398 /*
3399 * Double check.
3400 */
3401 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) {
3402 printf("fe%d: could not empty receive buffer\n", sc->sc_unit);
3403 /* Hmm. What should I do if this happens? FIXME. */
3404 }
3405
3406 /*
3407 * Restart receiving packets.
3408 */
3409 outb( sc->ioaddr[ FE_DLCR5 ], saved_dlcr5 );
3410}
3411#endif
3412
3413/*
3414 * Transmission interrupt handler
3415 * The control flow of this function looks silly. FIXME.
3416 */
3417static void
3418fe_tint ( struct fe_softc * sc, u_char tstat )
3419{
3420 int left;
3421 int col;
3422
3423 /*
3424 * Handle "excessive collision" interrupt.
3425 */
3426 if ( tstat & FE_D0_COLL16 ) {
3427
3428 /*
3429 * Find how many packets (including this collided one)
3430 * are left unsent in transmission buffer.
3431 */
3432 left = inb( sc->ioaddr[ FE_BMPR10 ] );
3433 printf("fe%d: excessive collision (%d/%d)\n",
3434 sc->sc_unit, left, sc->txb_sched);
3435
3436 /*
3437 * Clear the collision flag (in 86960) here
3438 * to avoid confusing statistics.
3439 */
3440 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID );
3441
3442 /*
3443 * Restart transmitter, skipping the
3444 * collided packet.
3445 *
3446 * We *must* skip the packet to keep network running
3447 * properly. Excessive collision error is an
3448 * indication of the network overload. If we
3449 * tried sending the same packet after excessive
3450 * collision, the network would be filled with
3451 * out-of-time packets. Packets belonging
3452 * to reliable transport (such as TCP) are resent
3453 * by some upper layer.
3454 */
3455 outb( sc->ioaddr[ FE_BMPR11 ],
3456 FE_B11_CTRL_SKIP | FE_B11_MODE1 );
3457
3458 /* Update statistics. */
3459 sc->tx_excolls++;
3460 }
3461
3462 /*
3463 * Handle "transmission complete" interrupt.
3464 */
3465 if ( tstat & FE_D0_TXDONE ) {
3466
3467 /*
3468 * Add in total number of collisions on last
3469 * transmission. We also clear "collision occurred" flag
3470 * here.
3471 *
3472 * 86960 has a design flaw on collision count on multiple
3473 * packet transmission. When we send two or more packets
3474 * with one start command (that's what we do when the
3475 * transmission queue is crowded), 86960 informs us number
3476 * of collisions occurred on the last packet on the
3477 * transmission only. Number of collisions on previous
3478 * packets are lost. I have told that the fact is clearly
3479 * stated in the Fujitsu document.
3480 *
3481 * I considered not to mind it seriously. Collision
3482 * count is not so important, anyway. Any comments? FIXME.
3483 */
3484
3485 if ( inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_D0_COLLID ) {
3486
3487 /* Clear collision flag. */
3488 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID );
3489
3490 /* Extract collision count from 86960. */
3491 col = inb( sc->ioaddr[ FE_DLCR4 ] );
3492 col = ( col & FE_D4_COL ) >> FE_D4_COL_SHIFT;
3493 if ( col == 0 ) {
3494 /*
3495 * Status register indicates collisions,
3496 * while the collision count is zero.
3497 * This can happen after multiple packet
3498 * transmission, indicating that one or more
3499 * previous packet(s) had been collided.
3500 *
3501 * Since the accurate number of collisions
3502 * has been lost, we just guess it as 1;
3503 * Am I too optimistic? FIXME.
3504 */
3505 col = 1;
3506 }
3507 sc->sc_if.if_collisions += col;
3508 if ( col == 1 ) {
3509 sc->mibdata.dot3StatsSingleCollisionFrames++;
3510 } else {
3511 sc->mibdata.dot3StatsMultipleCollisionFrames++;
3512 }
3513 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
3514 }
3515
3516 /*
3517 * Update transmission statistics.
3518 * Be sure to reflect number of excessive collisions.
3519 */
3520 col = sc->tx_excolls;
3521 sc->sc_if.if_opackets += sc->txb_sched - col;
3522 sc->sc_if.if_oerrors += col;
3523 sc->sc_if.if_collisions += col * 16;
3524 sc->mibdata.dot3StatsExcessiveCollisions += col;
3525 sc->mibdata.dot3StatsCollFrequencies[15] += col;
3526 sc->txb_sched = 0;
3527
3528 /*
3529 * The transmitter is no more active.
3530 * Reset output active flag and watchdog timer.
3531 */
3532 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3533 sc->sc_if.if_timer = 0;
3534
3535 /*
3536 * If more data is ready to transmit in the buffer, start
3537 * transmitting them. Otherwise keep transmitter idle,
3538 * even if more data is queued. This gives receive
3539 * process a slight priority.
3540 */
3541 if ( sc->txb_count > 0 ) fe_xmit( sc );
3542 }
3543}
3544
3545/*
3546 * Ethernet interface receiver interrupt.
3547 */
3548static void
3549fe_rint ( struct fe_softc * sc, u_char rstat )
3550{
3551 u_short len;
3552 u_char status;
3553 int i;
3554
3555 /*
3556 * Update statistics if this interrupt is caused by an error.
3557 * Note that, when the system was not sufficiently fast, the
3558 * receive interrupt might not be acknowledged immediately. If
3559 * one or more errornous frames were received before this routine
3560 * was scheduled, they are ignored, and the following error stats
3561 * give less than real values.
3562 */
3563 if ( rstat & ( FE_D1_OVRFLO | FE_D1_CRCERR
3564 | FE_D1_ALGERR | FE_D1_SRTPKT ) ) {
3565 if ( rstat & FE_D1_OVRFLO )
3566 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3567 if ( rstat & FE_D1_CRCERR )
3568 sc->mibdata.dot3StatsFCSErrors++;
3569 if ( rstat & FE_D1_ALGERR )
3570 sc->mibdata.dot3StatsAlignmentErrors++;
3571#if 0
3572 /* The reference MAC receiver defined in 802.3
3573 silently ignores short frames (RUNTs) without
3574 notifying upper layer. RFC 1650 (dot3 MIB) is
3575 based on the 802.3, and it has no stats entry for
3576 RUNTs... */
3577 if ( rstat & FE_D1_SRTPKT )
3578 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
3579#endif
3580 sc->sc_if.if_ierrors++;
3581 }
3582
3583 /*
3584 * MB86960 has a flag indicating "receive queue empty."
3585 * We just loop, checking the flag, to pull out all received
3586 * packets.
3587 *
3588 * We limit the number of iterations to avoid infinite-loop.
3589 * The upper bound is set to unrealistic high value.
3590 */
3591 for ( i = 0; i < FE_MAX_RECV_COUNT * 2; i++ ) {
3592
3593 /* Stop the iteration if 86960 indicates no packets. */
3594 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) return;
3595
3596 /*
3597 * Extract a receive status byte.
3598 * As our 86960 is in 16 bit bus access mode, we have to
3599 * use inw() to get the status byte. The significant
3600 * value is returned in lower 8 bits.
3601 */
3602#ifdef FE_8BIT_SUPPORT
3603 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3604 {
3605 status = inb( sc->ioaddr[ FE_BMPR8 ] );
3606 ( void ) inb( sc->ioaddr[ FE_BMPR8 ] );
3607 }
3608 else
3609#endif
3610 {
3611 status = ( u_char )inw( sc->ioaddr[ FE_BMPR8 ] );
3612 }
3613
3614 /*
3615 * Extract the packet length.
3616 * It is a sum of a header (14 bytes) and a payload.
3617 * CRC has been stripped off by the 86960.
3618 */
3619#ifdef FE_8BIT_SUPPORT
3620 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3621 {
3622 len = inb( sc->ioaddr[ FE_BMPR8 ] );
3623 len |= ( inb( sc->ioaddr[ FE_BMPR8 ] ) << 8 );
3624 }
3625 else
3626#endif
3627 {
3628 len = inw( sc->ioaddr[ FE_BMPR8 ] );
3629 }
3630
3631 /*
3632 * AS our 86960 is programed to ignore errored frame,
3633 * we must not see any error indication in the
3634 * receive buffer. So, any error condition is a
3635 * serious error, e.g., out-of-sync of the receive
3636 * buffer pointers.
3637 */
3638 if ( ( status & 0xF0 ) != 0x20
3639 || len > ETHER_MAX_LEN - ETHER_CRC_LEN
3640 || len < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
3641 printf("fe%d: RX buffer out-of-sync\n", sc->sc_unit);
3642 sc->sc_if.if_ierrors++;
3643 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3644 fe_reset(sc);
3645 return;
3646 }
3647
3648 /*
3649 * Go get a packet.
3650 */
3651 if ( fe_get_packet( sc, len ) < 0 ) {
3652 /*
3653 * Negative return from fe_get_packet()
3654 * indicates no available mbuf. We stop
3655 * receiving packets, even if there are more
3656 * in the buffer. We hope we can get more
3657 * mbuf next time.
3658 */
3659 sc->sc_if.if_ierrors++;
3660 sc->mibdata.dot3StatsMissedFrames++;
3661 fe_droppacket( sc, len );
3662 return;
3663 }
3664
3665 /* Successfully received a packet. Update stat. */
3666 sc->sc_if.if_ipackets++;
3667 }
3668
3669 /* Maximum number of frames has been received. Something
3670 strange is happening here... */
3671 printf("fe%d: unusual receive flood\n", sc->sc_unit);
3672 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3673 fe_reset(sc);
3674}
3675
3676/*
3677 * Ethernet interface interrupt processor
3678 */
3679static void
3680feintr ( int unit )
3681{
3682 struct fe_softc *sc = &fe_softc[unit];
3683 u_char tstat, rstat;
3684 int loop_count = FE_MAX_LOOP;
3685
3686 /* Loop until there are no more new interrupt conditions. */
3687 while (loop_count-- > 0) {
3688 /*
3689 * Get interrupt conditions, masking unneeded flags.
3690 */
3691 tstat = inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_TMASK;
3692 rstat = inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_RMASK;
3693 if ( tstat == 0 && rstat == 0 ) return;
3694
3695 /*
3696 * Reset the conditions we are acknowledging.
3697 */
3698 outb( sc->ioaddr[ FE_DLCR0 ], tstat );
3699 outb( sc->ioaddr[ FE_DLCR1 ], rstat );
3700
3701 /*
3702 * Handle transmitter interrupts.
3703 */
3704 if ( tstat ) {
3705 fe_tint( sc, tstat );
3706 }
3707
3708 /*
3709 * Handle receiver interrupts
3710 */
3711 if ( rstat ) {
3712 fe_rint( sc, rstat );
3713 }
3714
3715 /*
3716 * Update the multicast address filter if it is
3717 * needed and possible. We do it now, because
3718 * we can make sure the transmission buffer is empty,
3719 * and there is a good chance that the receive queue
3720 * is empty. It will minimize the possibility of
3721 * packet loss.
3722 */
3723 if ( sc->filter_change
3724 && sc->txb_count == 0 && sc->txb_sched == 0 ) {
3725 fe_loadmar(sc);
3726 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3727 }
3728
3729 /*
3730 * If it looks like the transmitter can take more data,
3731 * attempt to start output on the interface. This is done
3732 * after handling the receiver interrupt to give the
3733 * receive operation priority.
3734 *
3735 * BTW, I'm not sure in what case the OACTIVE is on at
3736 * this point. Is the following test redundant?
3737 *
3738 * No. This routine polls for both transmitter and
3739 * receiver interrupts. 86960 can raise a receiver
3740 * interrupt when the transmission buffer is full.
3741 */
3742 if ( ( sc->sc_if.if_flags & IFF_OACTIVE ) == 0 ) {
3743 fe_start( &sc->sc_if );
3744 }
3745
3746 }
3747
3748 printf("fe%d: too many loops\n", sc->sc_unit);
3749 return;
3750}
3751
3752/*
3753 * Process an ioctl request. This code needs some work - it looks
3754 * pretty ugly.
3755 */
3756static int
3757fe_ioctl ( struct ifnet * ifp, u_long command, caddr_t data )
3758{
3759 struct fe_softc *sc = ifp->if_softc;
3760 struct ifreq *ifr = (struct ifreq *)data;
3761 int s, error = 0;
3762
3763 s = splimp();
3764
3765 switch (command) {
3766
3767 case SIOCSIFADDR:
3768 case SIOCGIFADDR:
3769 case SIOCSIFMTU:
3770 /* Just an ordinary action. */
3771 error = ether_ioctl(ifp, command, data);
3772 break;
3773
3774 case SIOCSIFFLAGS:
3775 /*
3776 * Switch interface state between "running" and
3777 * "stopped", reflecting the UP flag.
3778 */
3779 if ( sc->sc_if.if_flags & IFF_UP ) {
3780 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) == 0 ) {
3781 fe_init(sc);
3782 }
3783 } else {
3784 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) != 0 ) {
3785 fe_stop(sc);
3786 }
3787 }
3788
3789 /*
3790 * Promiscuous and/or multicast flags may have changed,
3791 * so reprogram the multicast filter and/or receive mode.
3792 */
3793 fe_setmode( sc );
3794
3795 /* Done. */
3796 break;
3797
3798 case SIOCADDMULTI:
3799 case SIOCDELMULTI:
3800 /*
3801 * Multicast list has changed; set the hardware filter
3802 * accordingly.
3803 */
3804 fe_setmode( sc );
3805 break;
3806
3807 case SIOCSIFMEDIA:
3808 case SIOCGIFMEDIA:
3809 /* Let if_media to handle these commands and to call
3810 us back. */
3811 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
3812 break;
3813
3814 default:
3815 error = EINVAL;
3816 break;
3817 }
3818
3819 (void) splx(s);
3820 return (error);
3821}
3822
3823/*
3824 * Retrieve packet from receive buffer and send to the next level up via
3825 * ether_input().
3826 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
3827 */
3828static int
3829fe_get_packet ( struct fe_softc * sc, u_short len )
3830{
3831 struct ether_header *eh;
3832 struct mbuf *m;
3833
3834 /*
3835 * NFS wants the data be aligned to the word (4 byte)
3836 * boundary. Ethernet header has 14 bytes. There is a
3837 * 2-byte gap.
3838 */
3839#define NFS_MAGIC_OFFSET 2
3840
3841 /*
3842 * This function assumes that an Ethernet packet fits in an
3843 * mbuf (with a cluster attached when necessary.) On FreeBSD
3844 * 2.0 for x86, which is the primary target of this driver, an
3845 * mbuf cluster has 4096 bytes, and we are happy. On ancient
3846 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
3847 * however. If the following #error message were printed upon
3848 * compile, you need to rewrite this function.
3849 */
3850#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
3851#error "Too small MCLBYTES to use fe driver."
3852#endif
3853
3854 /*
3855 * Our strategy has one more problem. There is a policy on
3856 * mbuf cluster allocation. It says that we must have at
3857 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
3858 * allocate a cluster. For a packet of a size between
3859 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
3860 * On the other hand, the current code is short, simple,
3861 * and fast, however. It does no harmful thing, just waists
3862 * some memory. Any comments? FIXME.
3863 */
3864
3865 /* Allocate an mbuf with packet header info. */
3866 MGETHDR(m, M_DONTWAIT, MT_DATA);
3867 if ( m == NULL ) return -1;
3868
3869 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
3870 if ( len > MHLEN - NFS_MAGIC_OFFSET ) {
3871 MCLGET( m, M_DONTWAIT );
3872 if ( !( m->m_flags & M_EXT ) ) {
3873 m_freem( m );
3874 return -1;
3875 }
3876 }
3877
3878 /* Initialize packet header info. */
3879 m->m_pkthdr.rcvif = &sc->sc_if;
3880 m->m_pkthdr.len = len;
3881
3882 /* Set the length of this packet. */
3883 m->m_len = len;
3884
3885 /* The following silliness is to make NFS happy */
3886 m->m_data += NFS_MAGIC_OFFSET;
3887
3888 /* Get (actually just point to) the header part. */
3889 eh = mtod(m, struct ether_header *);
3890
3891 /* Get a packet. */
3892#ifdef FE_8BIT_SUPPORT
3893 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3894 {
3895 insb( sc->ioaddr[ FE_BMPR8 ], eh, len );
3896 }
3897 else
3898#endif
3899 {
3900 insw( sc->ioaddr[ FE_BMPR8 ], eh, ( len + 1 ) >> 1 );
3901 }
3902
3903 /* Strip off the Ethernet header. */
3904 m->m_pkthdr.len -= sizeof ( struct ether_header );
3905 m->m_len -= sizeof ( struct ether_header );
3906 m->m_data += sizeof ( struct ether_header );
3907
3908 /* Feed the packet to upper layer. */
3909 ether_input( &sc->sc_if, eh, m );
3910 return 0;
3911}
3912
3913/*
3914 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
3915 * Returns number of bytes actually written, including length word.
3916 *
3917 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
3918 * Packets shorter than Ethernet minimum are legal, and we pad them
3919 * before sending out. An exception is "partial" packets which are
3920 * shorter than mandatory Ethernet header.
3921 */
3922static void
3923fe_write_mbufs ( struct fe_softc *sc, struct mbuf *m )
3924{
3925 u_short addr_bmpr8 = sc->ioaddr[ FE_BMPR8 ];
3926 u_short length, len;
3927 struct mbuf *mp;
3928 u_char *data;
3929 u_short savebyte; /* WARNING: Architecture dependent! */
3930#define NO_PENDING_BYTE 0xFFFF
3931
3932 static u_char padding [ ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN ];
3933
3934#ifdef DIAGNOSTIC
3935 /* First, count up the total number of bytes to copy */
3936 length = 0;
3937 for ( mp = m; mp != NULL; mp = mp->m_next ) {
3938 length += mp->m_len;
3939 }
3940 /* Check if this matches the one in the packet header. */
3941 if ( length != m->m_pkthdr.len ) {
3942 printf("fe%d: packet length mismatch? (%d/%d)\n", sc->sc_unit,
3943 length, m->m_pkthdr.len);
3944 }
3945#else
3946 /* Just use the length value in the packet header. */
3947 length = m->m_pkthdr.len;
3948#endif
3949
3950#ifdef DIAGNOSTIC
3951 /*
3952 * Should never send big packets. If such a packet is passed,
3953 * it should be a bug of upper layer. We just ignore it.
3954 * ... Partial (too short) packets, neither.
3955 */
3956 if ( length < ETHER_HDR_LEN
3957 || length > ETHER_MAX_LEN - ETHER_CRC_LEN ) {
3958 printf("fe%d: got an out-of-spec packet (%u bytes) to send\n",
3959 sc->sc_unit, length);
3960 sc->sc_if.if_oerrors++;
3961 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
3962 return;
3963 }
3964#endif
3965
3966 /*
3967 * Put the length word for this frame.
3968 * Does 86960 accept odd length? -- Yes.
3969 * Do we need to pad the length to minimum size by ourselves?
3970 * -- Generally yes. But for (or will be) the last
3971 * packet in the transmission buffer, we can skip the
3972 * padding process. It may gain performance slightly. FIXME.
3973 */
3974#ifdef FE_8BIT_SUPPORT
3975 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3976 {
3977 len = max( length, ETHER_MIN_LEN - ETHER_CRC_LEN );
3978 outb( addr_bmpr8, len & 0x00ff );
3979 outb( addr_bmpr8, ( len & 0xff00 ) >> 8 );
3980 }
3981 else
3982#endif
3983 {
3984 outw( addr_bmpr8, max( length, ETHER_MIN_LEN - ETHER_CRC_LEN ) );
3985 }
3986
3987 /*
3988 * Update buffer status now.
3989 * Truncate the length up to an even number, since we use outw().
3990 */
3991#ifdef FE_8BIT_SUPPORT
3992 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
3993#endif
3994 {
3995 length = ( length + 1 ) & ~1;
3996 }
3997 sc->txb_free -= FE_DATA_LEN_LEN + max( length, ETHER_MIN_LEN - ETHER_CRC_LEN);
3998 sc->txb_count++;
3999
4000 /*
4001 * Transfer the data from mbuf chain to the transmission buffer.
4002 * MB86960 seems to require that data be transferred as words, and
4003 * only words. So that we require some extra code to patch
4004 * over odd-length mbufs.
4005 */
4006#ifdef FE_8BIT_SUPPORT
4007 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
4008 {
4009 /* 8-bit cards are easy. */
4010 for ( mp = m; mp != 0; mp = mp->m_next ) {
4011 if ( mp->m_len ) {
4012 outsb( addr_bmpr8, mtod(mp, caddr_t), mp->m_len );
4013 }
4014 }
4015 }
4016 else
4017#endif
4018 {
4019 /* 16-bit cards are a pain. */
4020 savebyte = NO_PENDING_BYTE;
4021 for ( mp = m; mp != 0; mp = mp->m_next ) {
4022
4023 /* Ignore empty mbuf. */
4024 len = mp->m_len;
4025 if ( len == 0 ) continue;
4026
4027 /* Find the actual data to send. */
4028 data = mtod(mp, caddr_t);
4029
4030 /* Finish the last byte. */
4031 if ( savebyte != NO_PENDING_BYTE ) {
4032 outw( addr_bmpr8, savebyte | ( *data << 8 ) );
4033 data++;
4034 len--;
4035 savebyte = NO_PENDING_BYTE;
4036 }
4037
4038 /* output contiguous words */
4039 if (len > 1) {
4040 outsw( addr_bmpr8, data, len >> 1);
4041 data += len & ~1;
4042 len &= 1;
4043 }
4044
4045 /* Save a remaining byte, if there is one. */
4046 if ( len > 0 ) {
4047 savebyte = *data;
4048 }
4049 }
4050
4051 /* Spit the last byte, if the length is odd. */
4052 if ( savebyte != NO_PENDING_BYTE ) {
4053 outw( addr_bmpr8, savebyte );
4054 }
4055 }
4056
4057 /* Pad to the Ethernet minimum length, if the packet is too short. */
4058 if ( length < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
4059#ifdef FE_8BIT_SUPPORT
4060 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
4061 {
4062 outsb( addr_bmpr8, padding, ETHER_MIN_LEN - ETHER_CRC_LEN - length );
4063 }
4064 else
4065#endif
4066 {
4067 outsw( addr_bmpr8, padding, ( ETHER_MIN_LEN - ETHER_CRC_LEN - length ) >> 1);
4068 }
4069 }
4070}
4071
4072/*
4073 * Compute hash value for an Ethernet address
4074 */
4075static int
4076fe_hash ( u_char * ep )
4077{
4078#define FE_HASH_MAGIC_NUMBER 0xEDB88320L
4079
4080 u_long hash = 0xFFFFFFFFL;
4081 int i, j;
4082 u_char b;
4083 u_long m;
4084
4085 for ( i = ETHER_ADDR_LEN; --i >= 0; ) {
4086 b = *ep++;
4087 for ( j = 8; --j >= 0; ) {
4088 m = hash;
4089 hash >>= 1;
4090 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER;
4091 b >>= 1;
4092 }
4093 }
4094 return ( ( int )( hash >> 26 ) );
4095}
4096
4097/*
4098 * Compute the multicast address filter from the
4099 * list of multicast addresses we need to listen to.
4100 */
4101static struct fe_filter
4102fe_mcaf ( struct fe_softc *sc )
4103{
4104 int index;
4105 struct fe_filter filter;
4106 struct ifmultiaddr *ifma;
4107
4108 filter = fe_filter_nothing;
4109 for (ifma = sc->arpcom.ac_if.if_multiaddrs.lh_first; ifma;
4110 ifma = ifma->ifma_link.le_next) {
4111 if (ifma->ifma_addr->sa_family != AF_LINK)
4112 continue;
4113 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
4114#ifdef FE_DEBUG
4115 printf("fe%d: hash(%6D) == %d\n",
4116 sc->sc_unit, enm->enm_addrlo , ":", index);
4117#endif
4118
4119 filter.data[index >> 3] |= 1 << (index & 7);
4120 }
4121 return ( filter );
4122}
4123
4124/*
4125 * Calculate a new "multicast packet filter" and put the 86960
4126 * receiver in appropriate mode.
4127 */
4128static void
4129fe_setmode ( struct fe_softc *sc )
4130{
4131 int flags = sc->sc_if.if_flags;
4132
4133 /*
4134 * If the interface is not running, we postpone the update
4135 * process for receive modes and multicast address filter
4136 * until the interface is restarted. It reduces some
4137 * complicated job on maintaining chip states. (Earlier versions
4138 * of this driver had a bug on that point...)
4139 *
4140 * To complete the trick, fe_init() calls fe_setmode() after
4141 * restarting the interface.
4142 */
4143 if ( !( flags & IFF_RUNNING ) ) return;
4144
4145 /*
4146 * Promiscuous mode is handled separately.
4147 */
4148 if ( flags & IFF_PROMISC ) {
4149 /*
4150 * Program 86960 to receive all packets on the segment
4151 * including those directed to other stations.
4152 * Multicast filter stored in MARs are ignored
4153 * under this setting, so we don't need to update it.
4154 *
4155 * Promiscuous mode in FreeBSD 2 is used solely by
4156 * BPF, and BPF only listens to valid (no error) packets.
4157 * So, we ignore erroneous ones even in this mode.
4158 * (Older versions of fe driver mistook the point.)
4159 */
4160 outb( sc->ioaddr[ FE_DLCR5 ],
4161 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1 );
4162 sc->filter_change = 0;
4163 return;
4164 }
4165
4166 /*
4167 * Turn the chip to the normal (non-promiscuous) mode.
4168 */
4169 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 | FE_D5_AFM1 );
4170
4171 /*
4172 * Find the new multicast filter value.
4173 */
4174 if ( flags & IFF_ALLMULTI ) {
4175 sc->filter = fe_filter_all;
4176 } else {
4177 sc->filter = fe_mcaf( sc );
4178 }
4179 sc->filter_change = 1;
4180
4181 /*
4182 * We have to update the multicast filter in the 86960, A.S.A.P.
4183 *
4184 * Note that the DLC (Data Link Control unit, i.e. transmitter
4185 * and receiver) must be stopped when feeding the filter, and
4186 * DLC trashes all packets in both transmission and receive
4187 * buffers when stopped.
4188 *
4189 * To reduce the packet loss, we delay the filter update
4190 * process until buffers are empty.
4191 */
4192 if ( sc->txb_sched == 0 && sc->txb_count == 0
4193 && !( inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_D1_PKTRDY ) ) {
4194 /*
4195 * Buffers are (apparently) empty. Load
4196 * the new filter value into MARs now.
4197 */
4198 fe_loadmar(sc);
4199 } else {
4200 /*
4201 * Buffers are not empty. Mark that we have to update
4202 * the MARs. The new filter will be loaded by feintr()
4203 * later.
4204 */
4205 }
4206}
4207
4208/*
4209 * Load a new multicast address filter into MARs.
4210 *
4211 * The caller must have splimp'ed before fe_loadmar.
4212 * This function starts the DLC upon return. So it can be called only
4213 * when the chip is working, i.e., from the driver's point of view, when
4214 * a device is RUNNING. (I mistook the point in previous versions.)
4215 */
4216static void
4217fe_loadmar ( struct fe_softc * sc )
4218{
4219 /* Stop the DLC (transmitter and receiver). */
4220 DELAY( 200 );
4221 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
4222 DELAY( 200 );
4223
4224 /* Select register bank 1 for MARs. */
4225 outb( sc->ioaddr[ FE_DLCR7 ],
4226 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP );
4227
4228 /* Copy filter value into the registers. */
4229 outblk( sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN );
4230
4231 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
4232 outb( sc->ioaddr[ FE_DLCR7 ],
4233 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP );
4234
4235 /* Restart the DLC. */
4236 DELAY( 200 );
4237 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE );
4238 DELAY( 200 );
4239
4240 /* We have just updated the filter. */
4241 sc->filter_change = 0;
4242}
4243
4244/* Change the media selection. */
4245static int
4246fe_medchange (struct ifnet *ifp)
4247{
4248 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
4249
4250#ifdef DIAGNOSTIC
4251 /* If_media should not pass any request for a media which this
4252 interface doesn't support. */
4253 int b;
4254
4255 for (b = 0; bit2media[b] != 0; b++) {
4256 if (bit2media[b] == sc->media.ifm_media) break;
4257 }
4258 if (((1 << b) & sc->mbitmap) == 0) {
4259 printf("fe%d: got an unsupported media request (0x%x)\n",
4260 sc->sc_unit, sc->media.ifm_media);
4261 return EINVAL;
4262 }
4263#endif
4264
4265 /* We don't actually change media when the interface is down.
4266 fe_init() will do the job, instead. Should we also wait
4267 until the transmission buffer being empty? Changing the
4268 media when we are sending a frame will cause two garbages
4269 on wires, one on old media and another on new. FIXME */
4270 if (sc->sc_if.if_flags & IFF_UP) {
4271 if (sc->msel) sc->msel(sc);
4272 }
4273
4274 return 0;
4275}
4276
4277/* I don't know how I can support media status callback... FIXME. */
4278static void
4279fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
4280{
4281 (void)ifp;
4282 (void)ifmr;
4283}
| 2907 return 1;
2908}
2909
2910/*
2911 * Reset interface, after some (hardware) trouble is deteced.
2912 */
2913static void
2914fe_reset (struct fe_softc *sc)
2915{
2916 /* Record how many packets are lost by this accident. */
2917 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count;
2918 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
2919
2920 /* Put the interface into known initial state. */
2921 fe_stop(sc);
2922 if (sc->sc_if.if_flags & IFF_UP) fe_init(sc);
2923}
2924
2925/*
2926 * Stop everything on the interface.
2927 *
2928 * All buffered packets, both transmitting and receiving,
2929 * if any, will be lost by stopping the interface.
2930 */
2931static void
2932fe_stop (struct fe_softc *sc)
2933{
2934 int s;
2935
2936 s = splimp();
2937
2938 /* Disable interrupts. */
2939 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 );
2940 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 );
2941
2942 /* Stop interface hardware. */
2943 DELAY( 200 );
2944 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
2945 DELAY( 200 );
2946
2947 /* Clear all interrupt status. */
2948 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF );
2949 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF );
2950
2951 /* Put the chip in stand-by mode. */
2952 DELAY( 200 );
2953 outb( sc->ioaddr[ FE_DLCR7 ], sc->proto_dlcr7 | FE_D7_POWER_DOWN );
2954 DELAY( 200 );
2955
2956 /* Reset transmitter variables and interface flags. */
2957 sc->sc_if.if_flags &= ~( IFF_OACTIVE | IFF_RUNNING );
2958 sc->sc_if.if_timer = 0;
2959 sc->txb_free = sc->txb_size;
2960 sc->txb_count = 0;
2961 sc->txb_sched = 0;
2962
2963 /* MAR loading can be delayed. */
2964 sc->filter_change = 0;
2965
2966 /* Call a device-specific hook. */
2967 if ( sc->stop ) sc->stop( sc );
2968
2969 (void) splx(s);
2970}
2971
2972/*
2973 * Device timeout/watchdog routine. Entered if the device neglects to
2974 * generate an interrupt after a transmit has been started on it.
2975 */
2976static void
2977fe_watchdog ( struct ifnet *ifp )
2978{
2979 struct fe_softc *sc = (struct fe_softc *)ifp;
2980
2981 /* A "debug" message. */
2982 printf("fe%d: transmission timeout (%d+%d)%s\n",
2983 ifp->if_unit, sc->txb_sched, sc->txb_count,
2984 (ifp->if_flags & IFF_UP) ? "" : " when down");
2985 if ( sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0 ) {
2986 printf("fe%d: wrong IRQ setting in config?\n", ifp->if_unit);
2987 }
2988 fe_reset( sc );
2989}
2990
2991/*
2992 * Initialize device.
2993 */
2994static void
2995fe_init (void * xsc)
2996{
2997 struct fe_softc *sc = xsc;
2998 int s;
2999
3000 /* We need an address. */
3001 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
3002#ifdef DIAGNOSTIC
3003 printf("fe%d: init() without any address\n", sc->sc_unit);
3004#endif
3005 return;
3006 }
3007
3008 /* Start initializing 86960. */
3009 s = splimp();
3010
3011 /* Call a hook before we start initializing the chip. */
3012 if ( sc->init ) sc->init( sc );
3013
3014 /*
3015 * Make sure to disable the chip, also.
3016 * This may also help re-programming the chip after
3017 * hot insertion of PCMCIAs.
3018 */
3019 DELAY( 200 );
3020 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
3021 DELAY( 200 );
3022
3023 /* Power up the chip and select register bank for DLCRs. */
3024 DELAY( 200 );
3025 outb( sc->ioaddr[ FE_DLCR7 ],
3026 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP );
3027 DELAY( 200 );
3028
3029 /* Feed the station address. */
3030 outblk( sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN );
3031
3032 /* Clear multicast address filter to receive nothing. */
3033 outb( sc->ioaddr[ FE_DLCR7 ],
3034 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP );
3035 outblk( sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN );
3036
3037 /* Select the BMPR bank for runtime register access. */
3038 outb( sc->ioaddr[ FE_DLCR7 ],
3039 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP );
3040
3041 /* Initialize registers. */
3042 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */
3043 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
3044 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 );
3045 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 );
3046 outb( sc->ioaddr[ FE_DLCR4 ], sc->proto_dlcr4 );
3047 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 );
3048 outb( sc->ioaddr[ FE_BMPR10 ], 0x00 );
3049 outb( sc->ioaddr[ FE_BMPR11 ], FE_B11_CTRL_SKIP | FE_B11_MODE1 );
3050 outb( sc->ioaddr[ FE_BMPR12 ], 0x00 );
3051 outb( sc->ioaddr[ FE_BMPR13 ], sc->proto_bmpr13 );
3052 outb( sc->ioaddr[ FE_BMPR14 ], 0x00 );
3053 outb( sc->ioaddr[ FE_BMPR15 ], 0x00 );
3054
3055 /* Enable interrupts. */
3056 outb( sc->ioaddr[ FE_DLCR2 ], FE_TMASK );
3057 outb( sc->ioaddr[ FE_DLCR3 ], FE_RMASK );
3058
3059 /* Select requested media, just before enabling DLC. */
3060 if (sc->msel) sc->msel(sc);
3061
3062 /* Enable transmitter and receiver. */
3063 DELAY( 200 );
3064 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE );
3065 DELAY( 200 );
3066
3067#ifdef DIAGNOSTIC
3068 /*
3069 * Make sure to empty the receive buffer.
3070 *
3071 * This may be redundant, but *if* the receive buffer were full
3072 * at this point, then the driver would hang. I have experienced
3073 * some strange hang-up just after UP. I hope the following
3074 * code solve the problem.
3075 *
3076 * I have changed the order of hardware initialization.
3077 * I think the receive buffer cannot have any packets at this
3078 * point in this version. The following code *must* be
3079 * redundant now. FIXME.
3080 *
3081 * I've heard a rumore that on some PC card implementation of
3082 * 8696x, the receive buffer can have some data at this point.
3083 * The following message helps discovering the fact. FIXME.
3084 */
3085 if ( !( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) ) {
3086 printf("fe%d: receive buffer has some data after reset\n",
3087 sc->sc_unit);
3088 fe_emptybuffer( sc );
3089 }
3090
3091 /* Do we need this here? Actually, no. I must be paranoia. */
3092 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */
3093 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
3094#endif
3095
3096 /* Set 'running' flag, because we are now running. */
3097 sc->sc_if.if_flags |= IFF_RUNNING;
3098
3099 /*
3100 * At this point, the interface is running properly,
3101 * except that it receives *no* packets. we then call
3102 * fe_setmode() to tell the chip what packets to be
3103 * received, based on the if_flags and multicast group
3104 * list. It completes the initialization process.
3105 */
3106 fe_setmode( sc );
3107
3108#if 0
3109 /* ...and attempt to start output queued packets. */
3110 /* TURNED OFF, because the semi-auto media prober wants to UP
3111 the interface keeping it idle. The upper layer will soon
3112 start the interface anyway, and there are no significant
3113 delay. */
3114 fe_start( &sc->sc_if );
3115#endif
3116
3117 (void) splx(s);
3118}
3119
3120/*
3121 * This routine actually starts the transmission on the interface
3122 */
3123static void
3124fe_xmit ( struct fe_softc * sc )
3125{
3126 /*
3127 * Set a timer just in case we never hear from the board again.
3128 * We use longer timeout for multiple packet transmission.
3129 * I'm not sure this timer value is appropriate. FIXME.
3130 */
3131 sc->sc_if.if_timer = 1 + sc->txb_count;
3132
3133 /* Update txb variables. */
3134 sc->txb_sched = sc->txb_count;
3135 sc->txb_count = 0;
3136 sc->txb_free = sc->txb_size;
3137 sc->tx_excolls = 0;
3138
3139 /* Start transmitter, passing packets in TX buffer. */
3140 outb( sc->ioaddr[ FE_BMPR10 ], sc->txb_sched | FE_B10_START );
3141}
3142
3143/*
3144 * Start output on interface.
3145 * We make two assumptions here:
3146 * 1) that the current priority is set to splimp _before_ this code
3147 * is called *and* is returned to the appropriate priority after
3148 * return
3149 * 2) that the IFF_OACTIVE flag is checked before this code is called
3150 * (i.e. that the output part of the interface is idle)
3151 */
3152void
3153fe_start ( struct ifnet *ifp )
3154{
3155 struct fe_softc *sc = ifp->if_softc;
3156 struct mbuf *m;
3157
3158#ifdef DIAGNOSTIC
3159 /* Just a sanity check. */
3160 if ( ( sc->txb_count == 0 ) != ( sc->txb_free == sc->txb_size ) ) {
3161 /*
3162 * Txb_count and txb_free co-works to manage the
3163 * transmission buffer. Txb_count keeps track of the
3164 * used potion of the buffer, while txb_free does unused
3165 * potion. So, as long as the driver runs properly,
3166 * txb_count is zero if and only if txb_free is same
3167 * as txb_size (which represents whole buffer.)
3168 */
3169 printf("fe%d: inconsistent txb variables (%d, %d)\n",
3170 sc->sc_unit, sc->txb_count, sc->txb_free);
3171 /*
3172 * So, what should I do, then?
3173 *
3174 * We now know txb_count and txb_free contradicts. We
3175 * cannot, however, tell which is wrong. More
3176 * over, we cannot peek 86960 transmission buffer or
3177 * reset the transmission buffer. (In fact, we can
3178 * reset the entire interface. I don't want to do it.)
3179 *
3180 * If txb_count is incorrect, leaving it as-is will cause
3181 * sending of garbage after next interrupt. We have to
3182 * avoid it. Hence, we reset the txb_count here. If
3183 * txb_free was incorrect, resetting txb_count just loose
3184 * some packets. We can live with it.
3185 */
3186 sc->txb_count = 0;
3187 }
3188#endif
3189
3190 /*
3191 * First, see if there are buffered packets and an idle
3192 * transmitter - should never happen at this point.
3193 */
3194 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
3195 printf("fe%d: transmitter idle with %d buffered packets\n",
3196 sc->sc_unit, sc->txb_count);
3197 fe_xmit( sc );
3198 }
3199
3200 /*
3201 * Stop accepting more transmission packets temporarily, when
3202 * a filter change request is delayed. Updating the MARs on
3203 * 86960 flushes the transmission buffer, so it is delayed
3204 * until all buffered transmission packets have been sent
3205 * out.
3206 */
3207 if ( sc->filter_change ) {
3208 /*
3209 * Filter change request is delayed only when the DLC is
3210 * working. DLC soon raise an interrupt after finishing
3211 * the work.
3212 */
3213 goto indicate_active;
3214 }
3215
3216 for (;;) {
3217
3218 /*
3219 * See if there is room to put another packet in the buffer.
3220 * We *could* do better job by peeking the send queue to
3221 * know the length of the next packet. Current version just
3222 * tests against the worst case (i.e., longest packet). FIXME.
3223 *
3224 * When adding the packet-peek feature, don't forget adding a
3225 * test on txb_count against QUEUEING_MAX.
3226 * There is a little chance the packet count exceeds
3227 * the limit. Assume transmission buffer is 8KB (2x8KB
3228 * configuration) and an application sends a bunch of small
3229 * (i.e., minimum packet sized) packets rapidly. An 8KB
3230 * buffer can hold 130 blocks of 62 bytes long...
3231 */
3232 if ( sc->txb_free
3233 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN ) {
3234 /* No room. */
3235 goto indicate_active;
3236 }
3237
3238#if FE_SINGLE_TRANSMISSION
3239 if ( sc->txb_count > 0 ) {
3240 /* Just one packet per a transmission buffer. */
3241 goto indicate_active;
3242 }
3243#endif
3244
3245 /*
3246 * Get the next mbuf chain for a packet to send.
3247 */
3248 IF_DEQUEUE( &sc->sc_if.if_snd, m );
3249 if ( m == NULL ) {
3250 /* No more packets to send. */
3251 goto indicate_inactive;
3252 }
3253
3254 /*
3255 * Copy the mbuf chain into the transmission buffer.
3256 * txb_* variables are updated as necessary.
3257 */
3258 fe_write_mbufs( sc, m );
3259
3260 /* Start transmitter if it's idle. */
3261 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
3262 fe_xmit( sc );
3263 }
3264
3265 /*
3266 * Tap off here if there is a bpf listener,
3267 * and the device is *not* in promiscuous mode.
3268 * (86960 receives self-generated packets if
3269 * and only if it is in "receive everything"
3270 * mode.)
3271 */
3272 if ( sc->sc_if.if_bpf
3273 && !( sc->sc_if.if_flags & IFF_PROMISC ) ) {
3274 bpf_mtap( &sc->sc_if, m );
3275 }
3276
3277 m_freem( m );
3278 }
3279
3280 indicate_inactive:
3281 /*
3282 * We are using the !OACTIVE flag to indicate to
3283 * the outside world that we can accept an
3284 * additional packet rather than that the
3285 * transmitter is _actually_ active. Indeed, the
3286 * transmitter may be active, but if we haven't
3287 * filled all the buffers with data then we still
3288 * want to accept more.
3289 */
3290 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3291 return;
3292
3293 indicate_active:
3294 /*
3295 * The transmitter is active, and there are no room for
3296 * more outgoing packets in the transmission buffer.
3297 */
3298 sc->sc_if.if_flags |= IFF_OACTIVE;
3299 return;
3300}
3301
3302/*
3303 * Drop (skip) a packet from receive buffer in 86960 memory.
3304 */
3305static void
3306fe_droppacket ( struct fe_softc * sc, int len )
3307{
3308 int i;
3309
3310 /*
3311 * 86960 manual says that we have to read 8 bytes from the buffer
3312 * before skip the packets and that there must be more than 8 bytes
3313 * remaining in the buffer when issue a skip command.
3314 * Remember, we have already read 4 bytes before come here.
3315 */
3316 if ( len > 12 ) {
3317 /* Read 4 more bytes, and skip the rest of the packet. */
3318#ifdef FE_8BIT_SUPPORT
3319 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3320 {
3321 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3322 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3323 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3324 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3325 }
3326 else
3327#endif
3328 {
3329 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3330 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3331 }
3332 outb( sc->ioaddr[ FE_BMPR14 ], FE_B14_SKIP );
3333 } else {
3334 /* We should not come here unless receiving RUNTs. */
3335#ifdef FE_8BIT_SUPPORT
3336 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3337 {
3338 for ( i = 0; i < len; i++ ) {
3339 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3340 }
3341 }
3342 else
3343#endif
3344 {
3345 for ( i = 0; i < len; i += 2 ) {
3346 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3347 }
3348 }
3349 }
3350}
3351
3352#ifdef DIAGNOSTIC
3353/*
3354 * Empty receiving buffer.
3355 */
3356static void
3357fe_emptybuffer ( struct fe_softc * sc )
3358{
3359 int i;
3360 u_char saved_dlcr5;
3361
3362#ifdef FE_DEBUG
3363 printf("fe%d: emptying receive buffer\n", sc->sc_unit);
3364#endif
3365
3366 /*
3367 * Stop receiving packets, temporarily.
3368 */
3369 saved_dlcr5 = inb( sc->ioaddr[ FE_DLCR5 ] );
3370 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 );
3371 DELAY(1300);
3372
3373 /*
3374 * When we come here, the receive buffer management may
3375 * have been broken. So, we cannot use skip operation.
3376 * Just discard everything in the buffer.
3377 */
3378#ifdef FE_8BIT_SUPPORT
3379 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3380 {
3381 for ( i = 0; i < 65536; i++ ) {
3382 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break;
3383 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3384 }
3385 }
3386 else
3387#endif
3388 {
3389 for ( i = 0; i < 65536; i += 2 ) {
3390 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break;
3391 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3392 }
3393 }
3394
3395 /*
3396 * Double check.
3397 */
3398 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) {
3399 printf("fe%d: could not empty receive buffer\n", sc->sc_unit);
3400 /* Hmm. What should I do if this happens? FIXME. */
3401 }
3402
3403 /*
3404 * Restart receiving packets.
3405 */
3406 outb( sc->ioaddr[ FE_DLCR5 ], saved_dlcr5 );
3407}
3408#endif
3409
3410/*
3411 * Transmission interrupt handler
3412 * The control flow of this function looks silly. FIXME.
3413 */
3414static void
3415fe_tint ( struct fe_softc * sc, u_char tstat )
3416{
3417 int left;
3418 int col;
3419
3420 /*
3421 * Handle "excessive collision" interrupt.
3422 */
3423 if ( tstat & FE_D0_COLL16 ) {
3424
3425 /*
3426 * Find how many packets (including this collided one)
3427 * are left unsent in transmission buffer.
3428 */
3429 left = inb( sc->ioaddr[ FE_BMPR10 ] );
3430 printf("fe%d: excessive collision (%d/%d)\n",
3431 sc->sc_unit, left, sc->txb_sched);
3432
3433 /*
3434 * Clear the collision flag (in 86960) here
3435 * to avoid confusing statistics.
3436 */
3437 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID );
3438
3439 /*
3440 * Restart transmitter, skipping the
3441 * collided packet.
3442 *
3443 * We *must* skip the packet to keep network running
3444 * properly. Excessive collision error is an
3445 * indication of the network overload. If we
3446 * tried sending the same packet after excessive
3447 * collision, the network would be filled with
3448 * out-of-time packets. Packets belonging
3449 * to reliable transport (such as TCP) are resent
3450 * by some upper layer.
3451 */
3452 outb( sc->ioaddr[ FE_BMPR11 ],
3453 FE_B11_CTRL_SKIP | FE_B11_MODE1 );
3454
3455 /* Update statistics. */
3456 sc->tx_excolls++;
3457 }
3458
3459 /*
3460 * Handle "transmission complete" interrupt.
3461 */
3462 if ( tstat & FE_D0_TXDONE ) {
3463
3464 /*
3465 * Add in total number of collisions on last
3466 * transmission. We also clear "collision occurred" flag
3467 * here.
3468 *
3469 * 86960 has a design flaw on collision count on multiple
3470 * packet transmission. When we send two or more packets
3471 * with one start command (that's what we do when the
3472 * transmission queue is crowded), 86960 informs us number
3473 * of collisions occurred on the last packet on the
3474 * transmission only. Number of collisions on previous
3475 * packets are lost. I have told that the fact is clearly
3476 * stated in the Fujitsu document.
3477 *
3478 * I considered not to mind it seriously. Collision
3479 * count is not so important, anyway. Any comments? FIXME.
3480 */
3481
3482 if ( inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_D0_COLLID ) {
3483
3484 /* Clear collision flag. */
3485 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID );
3486
3487 /* Extract collision count from 86960. */
3488 col = inb( sc->ioaddr[ FE_DLCR4 ] );
3489 col = ( col & FE_D4_COL ) >> FE_D4_COL_SHIFT;
3490 if ( col == 0 ) {
3491 /*
3492 * Status register indicates collisions,
3493 * while the collision count is zero.
3494 * This can happen after multiple packet
3495 * transmission, indicating that one or more
3496 * previous packet(s) had been collided.
3497 *
3498 * Since the accurate number of collisions
3499 * has been lost, we just guess it as 1;
3500 * Am I too optimistic? FIXME.
3501 */
3502 col = 1;
3503 }
3504 sc->sc_if.if_collisions += col;
3505 if ( col == 1 ) {
3506 sc->mibdata.dot3StatsSingleCollisionFrames++;
3507 } else {
3508 sc->mibdata.dot3StatsMultipleCollisionFrames++;
3509 }
3510 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
3511 }
3512
3513 /*
3514 * Update transmission statistics.
3515 * Be sure to reflect number of excessive collisions.
3516 */
3517 col = sc->tx_excolls;
3518 sc->sc_if.if_opackets += sc->txb_sched - col;
3519 sc->sc_if.if_oerrors += col;
3520 sc->sc_if.if_collisions += col * 16;
3521 sc->mibdata.dot3StatsExcessiveCollisions += col;
3522 sc->mibdata.dot3StatsCollFrequencies[15] += col;
3523 sc->txb_sched = 0;
3524
3525 /*
3526 * The transmitter is no more active.
3527 * Reset output active flag and watchdog timer.
3528 */
3529 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3530 sc->sc_if.if_timer = 0;
3531
3532 /*
3533 * If more data is ready to transmit in the buffer, start
3534 * transmitting them. Otherwise keep transmitter idle,
3535 * even if more data is queued. This gives receive
3536 * process a slight priority.
3537 */
3538 if ( sc->txb_count > 0 ) fe_xmit( sc );
3539 }
3540}
3541
3542/*
3543 * Ethernet interface receiver interrupt.
3544 */
3545static void
3546fe_rint ( struct fe_softc * sc, u_char rstat )
3547{
3548 u_short len;
3549 u_char status;
3550 int i;
3551
3552 /*
3553 * Update statistics if this interrupt is caused by an error.
3554 * Note that, when the system was not sufficiently fast, the
3555 * receive interrupt might not be acknowledged immediately. If
3556 * one or more errornous frames were received before this routine
3557 * was scheduled, they are ignored, and the following error stats
3558 * give less than real values.
3559 */
3560 if ( rstat & ( FE_D1_OVRFLO | FE_D1_CRCERR
3561 | FE_D1_ALGERR | FE_D1_SRTPKT ) ) {
3562 if ( rstat & FE_D1_OVRFLO )
3563 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3564 if ( rstat & FE_D1_CRCERR )
3565 sc->mibdata.dot3StatsFCSErrors++;
3566 if ( rstat & FE_D1_ALGERR )
3567 sc->mibdata.dot3StatsAlignmentErrors++;
3568#if 0
3569 /* The reference MAC receiver defined in 802.3
3570 silently ignores short frames (RUNTs) without
3571 notifying upper layer. RFC 1650 (dot3 MIB) is
3572 based on the 802.3, and it has no stats entry for
3573 RUNTs... */
3574 if ( rstat & FE_D1_SRTPKT )
3575 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
3576#endif
3577 sc->sc_if.if_ierrors++;
3578 }
3579
3580 /*
3581 * MB86960 has a flag indicating "receive queue empty."
3582 * We just loop, checking the flag, to pull out all received
3583 * packets.
3584 *
3585 * We limit the number of iterations to avoid infinite-loop.
3586 * The upper bound is set to unrealistic high value.
3587 */
3588 for ( i = 0; i < FE_MAX_RECV_COUNT * 2; i++ ) {
3589
3590 /* Stop the iteration if 86960 indicates no packets. */
3591 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) return;
3592
3593 /*
3594 * Extract a receive status byte.
3595 * As our 86960 is in 16 bit bus access mode, we have to
3596 * use inw() to get the status byte. The significant
3597 * value is returned in lower 8 bits.
3598 */
3599#ifdef FE_8BIT_SUPPORT
3600 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3601 {
3602 status = inb( sc->ioaddr[ FE_BMPR8 ] );
3603 ( void ) inb( sc->ioaddr[ FE_BMPR8 ] );
3604 }
3605 else
3606#endif
3607 {
3608 status = ( u_char )inw( sc->ioaddr[ FE_BMPR8 ] );
3609 }
3610
3611 /*
3612 * Extract the packet length.
3613 * It is a sum of a header (14 bytes) and a payload.
3614 * CRC has been stripped off by the 86960.
3615 */
3616#ifdef FE_8BIT_SUPPORT
3617 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3618 {
3619 len = inb( sc->ioaddr[ FE_BMPR8 ] );
3620 len |= ( inb( sc->ioaddr[ FE_BMPR8 ] ) << 8 );
3621 }
3622 else
3623#endif
3624 {
3625 len = inw( sc->ioaddr[ FE_BMPR8 ] );
3626 }
3627
3628 /*
3629 * AS our 86960 is programed to ignore errored frame,
3630 * we must not see any error indication in the
3631 * receive buffer. So, any error condition is a
3632 * serious error, e.g., out-of-sync of the receive
3633 * buffer pointers.
3634 */
3635 if ( ( status & 0xF0 ) != 0x20
3636 || len > ETHER_MAX_LEN - ETHER_CRC_LEN
3637 || len < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
3638 printf("fe%d: RX buffer out-of-sync\n", sc->sc_unit);
3639 sc->sc_if.if_ierrors++;
3640 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3641 fe_reset(sc);
3642 return;
3643 }
3644
3645 /*
3646 * Go get a packet.
3647 */
3648 if ( fe_get_packet( sc, len ) < 0 ) {
3649 /*
3650 * Negative return from fe_get_packet()
3651 * indicates no available mbuf. We stop
3652 * receiving packets, even if there are more
3653 * in the buffer. We hope we can get more
3654 * mbuf next time.
3655 */
3656 sc->sc_if.if_ierrors++;
3657 sc->mibdata.dot3StatsMissedFrames++;
3658 fe_droppacket( sc, len );
3659 return;
3660 }
3661
3662 /* Successfully received a packet. Update stat. */
3663 sc->sc_if.if_ipackets++;
3664 }
3665
3666 /* Maximum number of frames has been received. Something
3667 strange is happening here... */
3668 printf("fe%d: unusual receive flood\n", sc->sc_unit);
3669 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3670 fe_reset(sc);
3671}
3672
3673/*
3674 * Ethernet interface interrupt processor
3675 */
3676static void
3677feintr ( int unit )
3678{
3679 struct fe_softc *sc = &fe_softc[unit];
3680 u_char tstat, rstat;
3681 int loop_count = FE_MAX_LOOP;
3682
3683 /* Loop until there are no more new interrupt conditions. */
3684 while (loop_count-- > 0) {
3685 /*
3686 * Get interrupt conditions, masking unneeded flags.
3687 */
3688 tstat = inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_TMASK;
3689 rstat = inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_RMASK;
3690 if ( tstat == 0 && rstat == 0 ) return;
3691
3692 /*
3693 * Reset the conditions we are acknowledging.
3694 */
3695 outb( sc->ioaddr[ FE_DLCR0 ], tstat );
3696 outb( sc->ioaddr[ FE_DLCR1 ], rstat );
3697
3698 /*
3699 * Handle transmitter interrupts.
3700 */
3701 if ( tstat ) {
3702 fe_tint( sc, tstat );
3703 }
3704
3705 /*
3706 * Handle receiver interrupts
3707 */
3708 if ( rstat ) {
3709 fe_rint( sc, rstat );
3710 }
3711
3712 /*
3713 * Update the multicast address filter if it is
3714 * needed and possible. We do it now, because
3715 * we can make sure the transmission buffer is empty,
3716 * and there is a good chance that the receive queue
3717 * is empty. It will minimize the possibility of
3718 * packet loss.
3719 */
3720 if ( sc->filter_change
3721 && sc->txb_count == 0 && sc->txb_sched == 0 ) {
3722 fe_loadmar(sc);
3723 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3724 }
3725
3726 /*
3727 * If it looks like the transmitter can take more data,
3728 * attempt to start output on the interface. This is done
3729 * after handling the receiver interrupt to give the
3730 * receive operation priority.
3731 *
3732 * BTW, I'm not sure in what case the OACTIVE is on at
3733 * this point. Is the following test redundant?
3734 *
3735 * No. This routine polls for both transmitter and
3736 * receiver interrupts. 86960 can raise a receiver
3737 * interrupt when the transmission buffer is full.
3738 */
3739 if ( ( sc->sc_if.if_flags & IFF_OACTIVE ) == 0 ) {
3740 fe_start( &sc->sc_if );
3741 }
3742
3743 }
3744
3745 printf("fe%d: too many loops\n", sc->sc_unit);
3746 return;
3747}
3748
3749/*
3750 * Process an ioctl request. This code needs some work - it looks
3751 * pretty ugly.
3752 */
3753static int
3754fe_ioctl ( struct ifnet * ifp, u_long command, caddr_t data )
3755{
3756 struct fe_softc *sc = ifp->if_softc;
3757 struct ifreq *ifr = (struct ifreq *)data;
3758 int s, error = 0;
3759
3760 s = splimp();
3761
3762 switch (command) {
3763
3764 case SIOCSIFADDR:
3765 case SIOCGIFADDR:
3766 case SIOCSIFMTU:
3767 /* Just an ordinary action. */
3768 error = ether_ioctl(ifp, command, data);
3769 break;
3770
3771 case SIOCSIFFLAGS:
3772 /*
3773 * Switch interface state between "running" and
3774 * "stopped", reflecting the UP flag.
3775 */
3776 if ( sc->sc_if.if_flags & IFF_UP ) {
3777 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) == 0 ) {
3778 fe_init(sc);
3779 }
3780 } else {
3781 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) != 0 ) {
3782 fe_stop(sc);
3783 }
3784 }
3785
3786 /*
3787 * Promiscuous and/or multicast flags may have changed,
3788 * so reprogram the multicast filter and/or receive mode.
3789 */
3790 fe_setmode( sc );
3791
3792 /* Done. */
3793 break;
3794
3795 case SIOCADDMULTI:
3796 case SIOCDELMULTI:
3797 /*
3798 * Multicast list has changed; set the hardware filter
3799 * accordingly.
3800 */
3801 fe_setmode( sc );
3802 break;
3803
3804 case SIOCSIFMEDIA:
3805 case SIOCGIFMEDIA:
3806 /* Let if_media to handle these commands and to call
3807 us back. */
3808 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
3809 break;
3810
3811 default:
3812 error = EINVAL;
3813 break;
3814 }
3815
3816 (void) splx(s);
3817 return (error);
3818}
3819
3820/*
3821 * Retrieve packet from receive buffer and send to the next level up via
3822 * ether_input().
3823 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
3824 */
3825static int
3826fe_get_packet ( struct fe_softc * sc, u_short len )
3827{
3828 struct ether_header *eh;
3829 struct mbuf *m;
3830
3831 /*
3832 * NFS wants the data be aligned to the word (4 byte)
3833 * boundary. Ethernet header has 14 bytes. There is a
3834 * 2-byte gap.
3835 */
3836#define NFS_MAGIC_OFFSET 2
3837
3838 /*
3839 * This function assumes that an Ethernet packet fits in an
3840 * mbuf (with a cluster attached when necessary.) On FreeBSD
3841 * 2.0 for x86, which is the primary target of this driver, an
3842 * mbuf cluster has 4096 bytes, and we are happy. On ancient
3843 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
3844 * however. If the following #error message were printed upon
3845 * compile, you need to rewrite this function.
3846 */
3847#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
3848#error "Too small MCLBYTES to use fe driver."
3849#endif
3850
3851 /*
3852 * Our strategy has one more problem. There is a policy on
3853 * mbuf cluster allocation. It says that we must have at
3854 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
3855 * allocate a cluster. For a packet of a size between
3856 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
3857 * On the other hand, the current code is short, simple,
3858 * and fast, however. It does no harmful thing, just waists
3859 * some memory. Any comments? FIXME.
3860 */
3861
3862 /* Allocate an mbuf with packet header info. */
3863 MGETHDR(m, M_DONTWAIT, MT_DATA);
3864 if ( m == NULL ) return -1;
3865
3866 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
3867 if ( len > MHLEN - NFS_MAGIC_OFFSET ) {
3868 MCLGET( m, M_DONTWAIT );
3869 if ( !( m->m_flags & M_EXT ) ) {
3870 m_freem( m );
3871 return -1;
3872 }
3873 }
3874
3875 /* Initialize packet header info. */
3876 m->m_pkthdr.rcvif = &sc->sc_if;
3877 m->m_pkthdr.len = len;
3878
3879 /* Set the length of this packet. */
3880 m->m_len = len;
3881
3882 /* The following silliness is to make NFS happy */
3883 m->m_data += NFS_MAGIC_OFFSET;
3884
3885 /* Get (actually just point to) the header part. */
3886 eh = mtod(m, struct ether_header *);
3887
3888 /* Get a packet. */
3889#ifdef FE_8BIT_SUPPORT
3890 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3891 {
3892 insb( sc->ioaddr[ FE_BMPR8 ], eh, len );
3893 }
3894 else
3895#endif
3896 {
3897 insw( sc->ioaddr[ FE_BMPR8 ], eh, ( len + 1 ) >> 1 );
3898 }
3899
3900 /* Strip off the Ethernet header. */
3901 m->m_pkthdr.len -= sizeof ( struct ether_header );
3902 m->m_len -= sizeof ( struct ether_header );
3903 m->m_data += sizeof ( struct ether_header );
3904
3905 /* Feed the packet to upper layer. */
3906 ether_input( &sc->sc_if, eh, m );
3907 return 0;
3908}
3909
3910/*
3911 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
3912 * Returns number of bytes actually written, including length word.
3913 *
3914 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
3915 * Packets shorter than Ethernet minimum are legal, and we pad them
3916 * before sending out. An exception is "partial" packets which are
3917 * shorter than mandatory Ethernet header.
3918 */
3919static void
3920fe_write_mbufs ( struct fe_softc *sc, struct mbuf *m )
3921{
3922 u_short addr_bmpr8 = sc->ioaddr[ FE_BMPR8 ];
3923 u_short length, len;
3924 struct mbuf *mp;
3925 u_char *data;
3926 u_short savebyte; /* WARNING: Architecture dependent! */
3927#define NO_PENDING_BYTE 0xFFFF
3928
3929 static u_char padding [ ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN ];
3930
3931#ifdef DIAGNOSTIC
3932 /* First, count up the total number of bytes to copy */
3933 length = 0;
3934 for ( mp = m; mp != NULL; mp = mp->m_next ) {
3935 length += mp->m_len;
3936 }
3937 /* Check if this matches the one in the packet header. */
3938 if ( length != m->m_pkthdr.len ) {
3939 printf("fe%d: packet length mismatch? (%d/%d)\n", sc->sc_unit,
3940 length, m->m_pkthdr.len);
3941 }
3942#else
3943 /* Just use the length value in the packet header. */
3944 length = m->m_pkthdr.len;
3945#endif
3946
3947#ifdef DIAGNOSTIC
3948 /*
3949 * Should never send big packets. If such a packet is passed,
3950 * it should be a bug of upper layer. We just ignore it.
3951 * ... Partial (too short) packets, neither.
3952 */
3953 if ( length < ETHER_HDR_LEN
3954 || length > ETHER_MAX_LEN - ETHER_CRC_LEN ) {
3955 printf("fe%d: got an out-of-spec packet (%u bytes) to send\n",
3956 sc->sc_unit, length);
3957 sc->sc_if.if_oerrors++;
3958 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
3959 return;
3960 }
3961#endif
3962
3963 /*
3964 * Put the length word for this frame.
3965 * Does 86960 accept odd length? -- Yes.
3966 * Do we need to pad the length to minimum size by ourselves?
3967 * -- Generally yes. But for (or will be) the last
3968 * packet in the transmission buffer, we can skip the
3969 * padding process. It may gain performance slightly. FIXME.
3970 */
3971#ifdef FE_8BIT_SUPPORT
3972 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3973 {
3974 len = max( length, ETHER_MIN_LEN - ETHER_CRC_LEN );
3975 outb( addr_bmpr8, len & 0x00ff );
3976 outb( addr_bmpr8, ( len & 0xff00 ) >> 8 );
3977 }
3978 else
3979#endif
3980 {
3981 outw( addr_bmpr8, max( length, ETHER_MIN_LEN - ETHER_CRC_LEN ) );
3982 }
3983
3984 /*
3985 * Update buffer status now.
3986 * Truncate the length up to an even number, since we use outw().
3987 */
3988#ifdef FE_8BIT_SUPPORT
3989 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
3990#endif
3991 {
3992 length = ( length + 1 ) & ~1;
3993 }
3994 sc->txb_free -= FE_DATA_LEN_LEN + max( length, ETHER_MIN_LEN - ETHER_CRC_LEN);
3995 sc->txb_count++;
3996
3997 /*
3998 * Transfer the data from mbuf chain to the transmission buffer.
3999 * MB86960 seems to require that data be transferred as words, and
4000 * only words. So that we require some extra code to patch
4001 * over odd-length mbufs.
4002 */
4003#ifdef FE_8BIT_SUPPORT
4004 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
4005 {
4006 /* 8-bit cards are easy. */
4007 for ( mp = m; mp != 0; mp = mp->m_next ) {
4008 if ( mp->m_len ) {
4009 outsb( addr_bmpr8, mtod(mp, caddr_t), mp->m_len );
4010 }
4011 }
4012 }
4013 else
4014#endif
4015 {
4016 /* 16-bit cards are a pain. */
4017 savebyte = NO_PENDING_BYTE;
4018 for ( mp = m; mp != 0; mp = mp->m_next ) {
4019
4020 /* Ignore empty mbuf. */
4021 len = mp->m_len;
4022 if ( len == 0 ) continue;
4023
4024 /* Find the actual data to send. */
4025 data = mtod(mp, caddr_t);
4026
4027 /* Finish the last byte. */
4028 if ( savebyte != NO_PENDING_BYTE ) {
4029 outw( addr_bmpr8, savebyte | ( *data << 8 ) );
4030 data++;
4031 len--;
4032 savebyte = NO_PENDING_BYTE;
4033 }
4034
4035 /* output contiguous words */
4036 if (len > 1) {
4037 outsw( addr_bmpr8, data, len >> 1);
4038 data += len & ~1;
4039 len &= 1;
4040 }
4041
4042 /* Save a remaining byte, if there is one. */
4043 if ( len > 0 ) {
4044 savebyte = *data;
4045 }
4046 }
4047
4048 /* Spit the last byte, if the length is odd. */
4049 if ( savebyte != NO_PENDING_BYTE ) {
4050 outw( addr_bmpr8, savebyte );
4051 }
4052 }
4053
4054 /* Pad to the Ethernet minimum length, if the packet is too short. */
4055 if ( length < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
4056#ifdef FE_8BIT_SUPPORT
4057 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
4058 {
4059 outsb( addr_bmpr8, padding, ETHER_MIN_LEN - ETHER_CRC_LEN - length );
4060 }
4061 else
4062#endif
4063 {
4064 outsw( addr_bmpr8, padding, ( ETHER_MIN_LEN - ETHER_CRC_LEN - length ) >> 1);
4065 }
4066 }
4067}
4068
4069/*
4070 * Compute hash value for an Ethernet address
4071 */
4072static int
4073fe_hash ( u_char * ep )
4074{
4075#define FE_HASH_MAGIC_NUMBER 0xEDB88320L
4076
4077 u_long hash = 0xFFFFFFFFL;
4078 int i, j;
4079 u_char b;
4080 u_long m;
4081
4082 for ( i = ETHER_ADDR_LEN; --i >= 0; ) {
4083 b = *ep++;
4084 for ( j = 8; --j >= 0; ) {
4085 m = hash;
4086 hash >>= 1;
4087 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER;
4088 b >>= 1;
4089 }
4090 }
4091 return ( ( int )( hash >> 26 ) );
4092}
4093
4094/*
4095 * Compute the multicast address filter from the
4096 * list of multicast addresses we need to listen to.
4097 */
4098static struct fe_filter
4099fe_mcaf ( struct fe_softc *sc )
4100{
4101 int index;
4102 struct fe_filter filter;
4103 struct ifmultiaddr *ifma;
4104
4105 filter = fe_filter_nothing;
4106 for (ifma = sc->arpcom.ac_if.if_multiaddrs.lh_first; ifma;
4107 ifma = ifma->ifma_link.le_next) {
4108 if (ifma->ifma_addr->sa_family != AF_LINK)
4109 continue;
4110 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
4111#ifdef FE_DEBUG
4112 printf("fe%d: hash(%6D) == %d\n",
4113 sc->sc_unit, enm->enm_addrlo , ":", index);
4114#endif
4115
4116 filter.data[index >> 3] |= 1 << (index & 7);
4117 }
4118 return ( filter );
4119}
4120
4121/*
4122 * Calculate a new "multicast packet filter" and put the 86960
4123 * receiver in appropriate mode.
4124 */
4125static void
4126fe_setmode ( struct fe_softc *sc )
4127{
4128 int flags = sc->sc_if.if_flags;
4129
4130 /*
4131 * If the interface is not running, we postpone the update
4132 * process for receive modes and multicast address filter
4133 * until the interface is restarted. It reduces some
4134 * complicated job on maintaining chip states. (Earlier versions
4135 * of this driver had a bug on that point...)
4136 *
4137 * To complete the trick, fe_init() calls fe_setmode() after
4138 * restarting the interface.
4139 */
4140 if ( !( flags & IFF_RUNNING ) ) return;
4141
4142 /*
4143 * Promiscuous mode is handled separately.
4144 */
4145 if ( flags & IFF_PROMISC ) {
4146 /*
4147 * Program 86960 to receive all packets on the segment
4148 * including those directed to other stations.
4149 * Multicast filter stored in MARs are ignored
4150 * under this setting, so we don't need to update it.
4151 *
4152 * Promiscuous mode in FreeBSD 2 is used solely by
4153 * BPF, and BPF only listens to valid (no error) packets.
4154 * So, we ignore erroneous ones even in this mode.
4155 * (Older versions of fe driver mistook the point.)
4156 */
4157 outb( sc->ioaddr[ FE_DLCR5 ],
4158 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1 );
4159 sc->filter_change = 0;
4160 return;
4161 }
4162
4163 /*
4164 * Turn the chip to the normal (non-promiscuous) mode.
4165 */
4166 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 | FE_D5_AFM1 );
4167
4168 /*
4169 * Find the new multicast filter value.
4170 */
4171 if ( flags & IFF_ALLMULTI ) {
4172 sc->filter = fe_filter_all;
4173 } else {
4174 sc->filter = fe_mcaf( sc );
4175 }
4176 sc->filter_change = 1;
4177
4178 /*
4179 * We have to update the multicast filter in the 86960, A.S.A.P.
4180 *
4181 * Note that the DLC (Data Link Control unit, i.e. transmitter
4182 * and receiver) must be stopped when feeding the filter, and
4183 * DLC trashes all packets in both transmission and receive
4184 * buffers when stopped.
4185 *
4186 * To reduce the packet loss, we delay the filter update
4187 * process until buffers are empty.
4188 */
4189 if ( sc->txb_sched == 0 && sc->txb_count == 0
4190 && !( inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_D1_PKTRDY ) ) {
4191 /*
4192 * Buffers are (apparently) empty. Load
4193 * the new filter value into MARs now.
4194 */
4195 fe_loadmar(sc);
4196 } else {
4197 /*
4198 * Buffers are not empty. Mark that we have to update
4199 * the MARs. The new filter will be loaded by feintr()
4200 * later.
4201 */
4202 }
4203}
4204
4205/*
4206 * Load a new multicast address filter into MARs.
4207 *
4208 * The caller must have splimp'ed before fe_loadmar.
4209 * This function starts the DLC upon return. So it can be called only
4210 * when the chip is working, i.e., from the driver's point of view, when
4211 * a device is RUNNING. (I mistook the point in previous versions.)
4212 */
4213static void
4214fe_loadmar ( struct fe_softc * sc )
4215{
4216 /* Stop the DLC (transmitter and receiver). */
4217 DELAY( 200 );
4218 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
4219 DELAY( 200 );
4220
4221 /* Select register bank 1 for MARs. */
4222 outb( sc->ioaddr[ FE_DLCR7 ],
4223 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP );
4224
4225 /* Copy filter value into the registers. */
4226 outblk( sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN );
4227
4228 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
4229 outb( sc->ioaddr[ FE_DLCR7 ],
4230 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP );
4231
4232 /* Restart the DLC. */
4233 DELAY( 200 );
4234 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE );
4235 DELAY( 200 );
4236
4237 /* We have just updated the filter. */
4238 sc->filter_change = 0;
4239}
4240
4241/* Change the media selection. */
4242static int
4243fe_medchange (struct ifnet *ifp)
4244{
4245 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
4246
4247#ifdef DIAGNOSTIC
4248 /* If_media should not pass any request for a media which this
4249 interface doesn't support. */
4250 int b;
4251
4252 for (b = 0; bit2media[b] != 0; b++) {
4253 if (bit2media[b] == sc->media.ifm_media) break;
4254 }
4255 if (((1 << b) & sc->mbitmap) == 0) {
4256 printf("fe%d: got an unsupported media request (0x%x)\n",
4257 sc->sc_unit, sc->media.ifm_media);
4258 return EINVAL;
4259 }
4260#endif
4261
4262 /* We don't actually change media when the interface is down.
4263 fe_init() will do the job, instead. Should we also wait
4264 until the transmission buffer being empty? Changing the
4265 media when we are sending a frame will cause two garbages
4266 on wires, one on old media and another on new. FIXME */
4267 if (sc->sc_if.if_flags & IFF_UP) {
4268 if (sc->msel) sc->msel(sc);
4269 }
4270
4271 return 0;
4272}
4273
4274/* I don't know how I can support media status callback... FIXME. */
4275static void
4276fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
4277{
4278 (void)ifp;
4279 (void)ifmr;
4280}
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