| if_ex.c (179775) | if_ex.c (182088) |
|---|---|
| 1/*- 2 * Copyright (c) 1996, Javier Mart�n Rueda (jmrueda@diatel.upm.es) 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * SUCH DAMAGE. 26 * 27 * 28 * MAINTAINER: Matthew N. Dodd <winter@jurai.net> 29 * <mdodd@FreeBSD.org> 30 */ 31 32#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1996, Javier Mart�n Rueda (jmrueda@diatel.upm.es) 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 * SUCH DAMAGE. 26 * 27 * 28 * MAINTAINER: Matthew N. Dodd <winter@jurai.net> 29 * <mdodd@FreeBSD.org> 30 */ 31 32#include <sys/cdefs.h> |
| 33__FBSDID("$FreeBSD: head/sys/dev/ex/if_ex.c 179775 2008-06-13 12:14:22Z jhb $"); | 33__FBSDID("$FreeBSD: head/sys/dev/ex/if_ex.c 182088 2008-08-24 00:22:42Z imp $"); |
| 34 35/* 36 * Intel EtherExpress Pro/10, Pro/10+ Ethernet driver 37 * 38 * Revision history: 39 * 40 * dd-mmm-yyyy: Multicast support ported from NetBSD's if_iy driver. 41 * 30-Oct-1996: first beta version. Inet and BPF supported, but no multicast. --- 278 unchanged lines hidden (view full) --- 320 321 sc->tx_timeout = 0; 322 323 /* 324 * Load the ethernet address into the card. 325 */ 326 CSR_WRITE_1(sc, CMD_REG, Bank2_Sel); 327 temp_reg = CSR_READ_1(sc, EEPROM_REG); | 34 35/* 36 * Intel EtherExpress Pro/10, Pro/10+ Ethernet driver 37 * 38 * Revision history: 39 * 40 * dd-mmm-yyyy: Multicast support ported from NetBSD's if_iy driver. 41 * 30-Oct-1996: first beta version. Inet and BPF supported, but no multicast. --- 278 unchanged lines hidden (view full) --- 320 321 sc->tx_timeout = 0; 322 323 /* 324 * Load the ethernet address into the card. 325 */ 326 CSR_WRITE_1(sc, CMD_REG, Bank2_Sel); 327 temp_reg = CSR_READ_1(sc, EEPROM_REG); |
| 328 if (temp_reg & Trnoff_Enable) { | 328 if (temp_reg & Trnoff_Enable) |
| 329 CSR_WRITE_1(sc, EEPROM_REG, temp_reg & ~Trnoff_Enable); | 329 CSR_WRITE_1(sc, EEPROM_REG, temp_reg & ~Trnoff_Enable); |
| 330 } 331 for (i = 0; i < ETHER_ADDR_LEN; i++) { | 330 for (i = 0; i < ETHER_ADDR_LEN; i++) |
| 332 CSR_WRITE_1(sc, I_ADDR_REG0 + i, IF_LLADDR(sc->ifp)[i]); | 331 CSR_WRITE_1(sc, I_ADDR_REG0 + i, IF_LLADDR(sc->ifp)[i]); |
| 333 } | 332 |
| 334 /* 335 * - Setup transmit chaining and discard bad received frames. 336 * - Match broadcast. 337 * - Clear test mode. 338 * - Set receiving mode. | 333 /* 334 * - Setup transmit chaining and discard bad received frames. 335 * - Match broadcast. 336 * - Clear test mode. 337 * - Set receiving mode. |
| 339 * - Set IRQ number. | |
| 340 */ 341 CSR_WRITE_1(sc, REG1, CSR_READ_1(sc, REG1) | Tx_Chn_Int_Md | Tx_Chn_ErStp | Disc_Bad_Fr); 342 CSR_WRITE_1(sc, REG2, CSR_READ_1(sc, REG2) | No_SA_Ins | RX_CRC_InMem); 343 CSR_WRITE_1(sc, REG3, CSR_READ_1(sc, REG3) & 0x3f /* XXX constants. */ ); | 338 */ 339 CSR_WRITE_1(sc, REG1, CSR_READ_1(sc, REG1) | Tx_Chn_Int_Md | Tx_Chn_ErStp | Disc_Bad_Fr); 340 CSR_WRITE_1(sc, REG2, CSR_READ_1(sc, REG2) | No_SA_Ins | RX_CRC_InMem); 341 CSR_WRITE_1(sc, REG3, CSR_READ_1(sc, REG3) & 0x3f /* XXX constants. */ ); |
| 342 /* 343 * - Set IRQ number, if this part has it. ISA devices have this, 344 * while PC Card devices don't seem to. Either way, we have to 345 * switch to Bank1 as the rest of this code relies on that. 346 */ |
|
| 344 CSR_WRITE_1(sc, CMD_REG, Bank1_Sel); | 347 CSR_WRITE_1(sc, CMD_REG, Bank1_Sel); |
| 345 CSR_WRITE_1(sc, INT_NO_REG, (CSR_READ_1(sc, INT_NO_REG) & 0xf8) | sc->irq2ee[sc->irq_no]); | 348 if (sc->flags & HAS_INT_NO_REG) 349 CSR_WRITE_1(sc, INT_NO_REG, 350 (CSR_READ_1(sc, INT_NO_REG) & 0xf8) | 351 sc->irq2ee[sc->irq_no]); |
| 346 347 /* 348 * Divide the available memory in the card into rcv and xmt buffers. 349 * By default, I use the first 3/4 of the memory for the rcv buffer, 350 * and the remaining 1/4 of the memory for the xmt buffer. 351 */ 352 sc->rx_mem_size = sc->mem_size * 3 / 4; 353 sc->tx_mem_size = sc->mem_size - sc->rx_mem_size; --- 723 unchanged lines hidden --- | 352 353 /* 354 * Divide the available memory in the card into rcv and xmt buffers. 355 * By default, I use the first 3/4 of the memory for the rcv buffer, 356 * and the remaining 1/4 of the memory for the xmt buffer. 357 */ 358 sc->rx_mem_size = sc->mem_size * 3 / 4; 359 sc->tx_mem_size = sc->mem_size - sc->rx_mem_size; --- 723 unchanged lines hidden --- |