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sdiff udiff text old ( 302408 ) new ( 315330 )
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rtl8366rb.c (302408) rtl8366rb.c (315330)
1/*-
1/*-
2 * Copyright (c) 2015-2016 Hiroki Mori.
2 * Copyright (c) 2011-2012 Stefan Bethke.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.

--- 8 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
3 * Copyright (c) 2011-2012 Stefan Bethke.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.

--- 8 unchanged lines hidden (view full) ---

19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
26 * $FreeBSD: stable/11/sys/dev/etherswitch/rtl8366/rtl8366rb.c 268564 2014-07-12 06:23:42Z rpaulo $
27 * $FreeBSD: stable/11/sys/dev/etherswitch/rtl8366/rtl8366rb.c 315330 2017-03-15 21:03:51Z mizhka $
27 */
28
28 */
29
30#include "opt_etherswitch.h"
31
29#include <sys/param.h>
30#include <sys/bus.h>
31#include <sys/errno.h>
32#include <sys/kernel.h>
33#include <sys/lock.h>
34#include <sys/malloc.h>
35#include <sys/module.h>
36#include <sys/mutex.h>

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60#include "etherswitch_if.h"
61
62
63struct rtl8366rb_softc {
64 struct mtx sc_mtx; /* serialize access to softc */
65 int smi_acquired; /* serialize access to SMI/I2C bus */
66 struct mtx callout_mtx; /* serialize callout */
67 device_t dev;
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/errno.h>
35#include <sys/kernel.h>
36#include <sys/lock.h>
37#include <sys/malloc.h>
38#include <sys/module.h>
39#include <sys/mutex.h>

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63#include "etherswitch_if.h"
64
65
66struct rtl8366rb_softc {
67 struct mtx sc_mtx; /* serialize access to softc */
68 int smi_acquired; /* serialize access to SMI/I2C bus */
69 struct mtx callout_mtx; /* serialize callout */
70 device_t dev;
68 int vid[RTL8366RB_NUM_VLANS];
69 char *ifname[RTL8366RB_NUM_PHYS];
70 device_t miibus[RTL8366RB_NUM_PHYS];
71 struct ifnet *ifp[RTL8366RB_NUM_PHYS];
71 int vid[RTL8366_NUM_VLANS];
72 char *ifname[RTL8366_NUM_PHYS];
73 device_t miibus[RTL8366_NUM_PHYS];
74 struct ifnet *ifp[RTL8366_NUM_PHYS];
72 struct callout callout_tick;
75 struct callout callout_tick;
76 etherswitch_info_t info;
77 int chip_type; /* 0 = RTL8366RB, 1 = RTL8366SR */
73};
74
78};
79
75static etherswitch_info_t etherswitch_info = {
76 .es_nports = RTL8366RB_NUM_PORTS,
77 .es_nvlangroups = RTL8366RB_NUM_VLANS,
78 .es_name = "Realtek RTL8366RB",
79 .es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q,
80};
81
82#define RTL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
83#define RTL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
84#define RTL_LOCK_ASSERT(_sc, _what) mtx_assert(&(_s)c->sc_mtx, (_what))
85#define RTL_TRYLOCK(_sc) mtx_trylock(&(_sc)->sc_mtx)
86
87#define RTL_WAITOK 0
88#define RTL_NOWAIT 1
89

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128rtl8366rb_identify(driver_t *driver, device_t parent)
129{
130 device_t child;
131 struct iicbus_ivar *devi;
132
133 if (device_find_child(parent, "rtl8366rb", -1) == NULL) {
134 child = BUS_ADD_CHILD(parent, 0, "rtl8366rb", -1);
135 devi = IICBUS_IVAR(child);
80#define RTL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
81#define RTL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
82#define RTL_LOCK_ASSERT(_sc, _what) mtx_assert(&(_s)c->sc_mtx, (_what))
83#define RTL_TRYLOCK(_sc) mtx_trylock(&(_sc)->sc_mtx)
84
85#define RTL_WAITOK 0
86#define RTL_NOWAIT 1
87

--- 38 unchanged lines hidden (view full) ---

126rtl8366rb_identify(driver_t *driver, device_t parent)
127{
128 device_t child;
129 struct iicbus_ivar *devi;
130
131 if (device_find_child(parent, "rtl8366rb", -1) == NULL) {
132 child = BUS_ADD_CHILD(parent, 0, "rtl8366rb", -1);
133 devi = IICBUS_IVAR(child);
136 devi->addr = RTL8366RB_IIC_ADDR;
134 devi->addr = RTL8366_IIC_ADDR;
137 }
138}
139
140static int
141rtl8366rb_probe(device_t dev)
142{
135 }
136}
137
138static int
139rtl8366rb_probe(device_t dev)
140{
141 struct rtl8366rb_softc *sc;
142
143 sc = device_get_softc(dev);
144
145 bzero(sc, sizeof(*sc));
143 if (smi_probe(dev) != 0)
144 return (ENXIO);
146 if (smi_probe(dev) != 0)
147 return (ENXIO);
145 device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
148 if(sc->chip_type == 0)
149 device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
150 else
151 device_set_desc(dev, "RTL8366SR Ethernet Switch Controller");
146 return (BUS_PROBE_DEFAULT);
147}
148
149static void
150rtl8366rb_init(device_t dev)
151{
152 return (BUS_PROBE_DEFAULT);
153}
154
155static void
156rtl8366rb_init(device_t dev)
157{
152 int i;
153 struct rtl8366rb_softc *sc;
158 struct rtl8366rb_softc *sc;
159 int i;
154
160
161 sc = device_get_softc(dev);
162
155 /* Initialisation for TL-WR1043ND */
163 /* Initialisation for TL-WR1043ND */
156 smi_rmw(dev, RTL8366RB_RCR,
157 RTL8366RB_RCR_HARD_RESET,
158 RTL8366RB_RCR_HARD_RESET, RTL_WAITOK);
164#ifdef RTL8366_SOFT_RESET
165 smi_rmw(dev, RTL8366_RCR,
166 RTL8366_RCR_SOFT_RESET,
167 RTL8366_RCR_SOFT_RESET, RTL_WAITOK);
168#else
169 smi_rmw(dev, RTL8366_RCR,
170 RTL8366_RCR_HARD_RESET,
171 RTL8366_RCR_HARD_RESET, RTL_WAITOK);
172#endif
173 /* hard reset not return ack */
159 DELAY(100000);
160 /* Enable 16 VLAN mode */
174 DELAY(100000);
175 /* Enable 16 VLAN mode */
161 smi_rmw(dev, RTL8366RB_SGCR,
162 RTL8366RB_SGCR_EN_VLAN | RTL8366RB_SGCR_EN_VLAN_4KTB,
163 RTL8366RB_SGCR_EN_VLAN, RTL_WAITOK);
176 smi_rmw(dev, RTL8366_SGCR,
177 RTL8366_SGCR_EN_VLAN | RTL8366_SGCR_EN_VLAN_4KTB,
178 RTL8366_SGCR_EN_VLAN, RTL_WAITOK);
164 /* Initialize our vlan table. */
179 /* Initialize our vlan table. */
165 sc = device_get_softc(dev);
166 for (i = 0; i <= 1; i++)
167 sc->vid[i] = (i + 1) | ETHERSWITCH_VID_VALID;
168 /* Remove port 0 from VLAN 1. */
180 for (i = 0; i <= 1; i++)
181 sc->vid[i] = (i + 1) | ETHERSWITCH_VID_VALID;
182 /* Remove port 0 from VLAN 1. */
169 smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 0),
183 smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 0),
170 (1 << 0), 0, RTL_WAITOK);
171 /* Add port 0 untagged and port 5 tagged to VLAN 2. */
184 (1 << 0), 0, RTL_WAITOK);
185 /* Add port 0 untagged and port 5 tagged to VLAN 2. */
172 smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 1),
173 ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT)
174 | ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT),
175 ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT
176 | ((1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT)),
186 smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 1),
187 ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT)
188 | ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT),
189 ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT
190 | ((1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT)),
177 RTL_WAITOK);
178 /* Set PVID 2 for port 0. */
191 RTL_WAITOK);
192 /* Set PVID 2 for port 0. */
179 smi_rmw(dev, RTL8366RB_PVCR_REG(0),
180 RTL8366RB_PVCR_VAL(0, RTL8366RB_PVCR_PORT_MASK),
181 RTL8366RB_PVCR_VAL(0, 1), RTL_WAITOK);
193 smi_rmw(dev, RTL8366_PVCR_REG(0),
194 RTL8366_PVCR_VAL(0, RTL8366_PVCR_PORT_MASK),
195 RTL8366_PVCR_VAL(0, 1), RTL_WAITOK);
182}
183
184static int
185rtl8366rb_attach(device_t dev)
186{
196}
197
198static int
199rtl8366rb_attach(device_t dev)
200{
187 uint16_t rev = 0;
188 struct rtl8366rb_softc *sc;
201 struct rtl8366rb_softc *sc;
202 uint16_t rev = 0;
189 char name[IFNAMSIZ];
190 int err = 0;
191 int i;
192
193 sc = device_get_softc(dev);
203 char name[IFNAMSIZ];
204 int err = 0;
205 int i;
206
207 sc = device_get_softc(dev);
194 bzero(sc, sizeof(*sc));
208
195 sc->dev = dev;
196 mtx_init(&sc->sc_mtx, "rtl8366rb", NULL, MTX_DEF);
197 sc->smi_acquired = 0;
198 mtx_init(&sc->callout_mtx, "rtl8366rbcallout", NULL, MTX_DEF);
199
200 rtl8366rb_init(dev);
209 sc->dev = dev;
210 mtx_init(&sc->sc_mtx, "rtl8366rb", NULL, MTX_DEF);
211 sc->smi_acquired = 0;
212 mtx_init(&sc->callout_mtx, "rtl8366rbcallout", NULL, MTX_DEF);
213
214 rtl8366rb_init(dev);
201 smi_read(dev, RTL8366RB_CVCR, &rev, RTL_WAITOK);
215 smi_read(dev, RTL8366_CVCR, &rev, RTL_WAITOK);
202 device_printf(dev, "rev. %d\n", rev & 0x000f);
203
216 device_printf(dev, "rev. %d\n", rev & 0x000f);
217
218 sc->info.es_nports = RTL8366_NUM_PORTS;
219 sc->info.es_nvlangroups = RTL8366_NUM_VLANS;
220 sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q;
221 if(sc->chip_type == 0)
222 sprintf(sc->info.es_name, "Realtek RTL8366RB");
223 else
224 sprintf(sc->info.es_name, "Realtek RTL8366SR");
225
204 /* attach miibus and phys */
205 /* PHYs need an interface, so we generate a dummy one */
226 /* attach miibus and phys */
227 /* PHYs need an interface, so we generate a dummy one */
206 for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
228 for (i = 0; i < RTL8366_NUM_PHYS; i++) {
207 sc->ifp[i] = if_alloc(IFT_ETHER);
208 sc->ifp[i]->if_softc = sc;
209 sc->ifp[i]->if_flags |= IFF_UP | IFF_BROADCAST | IFF_DRV_RUNNING
210 | IFF_SIMPLEX;
211 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(dev));
212 sc->ifname[i] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
213 bcopy(name, sc->ifname[i], strlen(name)+1);
214 if_initname(sc->ifp[i], sc->ifname[i], i);

--- 16 unchanged lines hidden (view full) ---

231 rtl8366rb_tick(sc);
232
233 return (err);
234}
235
236static int
237rtl8366rb_detach(device_t dev)
238{
229 sc->ifp[i] = if_alloc(IFT_ETHER);
230 sc->ifp[i]->if_softc = sc;
231 sc->ifp[i]->if_flags |= IFF_UP | IFF_BROADCAST | IFF_DRV_RUNNING
232 | IFF_SIMPLEX;
233 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(dev));
234 sc->ifname[i] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
235 bcopy(name, sc->ifname[i], strlen(name)+1);
236 if_initname(sc->ifp[i], sc->ifname[i], i);

--- 16 unchanged lines hidden (view full) ---

253 rtl8366rb_tick(sc);
254
255 return (err);
256}
257
258static int
259rtl8366rb_detach(device_t dev)
260{
239 struct rtl8366rb_softc *sc = device_get_softc(dev);
261 struct rtl8366rb_softc *sc;
240 int i;
241
262 int i;
263
242 for (i=0; i < RTL8366RB_NUM_PHYS; i++) {
264 sc = device_get_softc(dev);
265
266 for (i=0; i < RTL8366_NUM_PHYS; i++) {
243 if (sc->miibus[i])
244 device_delete_child(dev, sc->miibus[i]);
245 if (sc->ifp[i] != NULL)
246 if_free(sc->ifp[i]);
247 free(sc->ifname[i], M_DEVBUF);
248 }
249 bus_generic_detach(dev);
250 callout_drain(&sc->callout_tick);
251 mtx_destroy(&sc->callout_mtx);
252 mtx_destroy(&sc->sc_mtx);
253
254 return (0);
255}
256
257static void
258rtl8366rb_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
259{
260 *media_active = IFM_ETHER;
261 *media_status = IFM_AVALID;
267 if (sc->miibus[i])
268 device_delete_child(dev, sc->miibus[i]);
269 if (sc->ifp[i] != NULL)
270 if_free(sc->ifp[i]);
271 free(sc->ifname[i], M_DEVBUF);
272 }
273 bus_generic_detach(dev);
274 callout_drain(&sc->callout_tick);
275 mtx_destroy(&sc->callout_mtx);
276 mtx_destroy(&sc->sc_mtx);
277
278 return (0);
279}
280
281static void
282rtl8366rb_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
283{
284 *media_active = IFM_ETHER;
285 *media_status = IFM_AVALID;
262 if ((portstatus & RTL8366RB_PLSR_LINK) != 0)
286 if ((portstatus & RTL8366_PLSR_LINK) != 0)
263 *media_status |= IFM_ACTIVE;
264 else {
265 *media_active |= IFM_NONE;
266 return;
267 }
287 *media_status |= IFM_ACTIVE;
288 else {
289 *media_active |= IFM_NONE;
290 return;
291 }
268 switch (portstatus & RTL8366RB_PLSR_SPEED_MASK) {
269 case RTL8366RB_PLSR_SPEED_10:
292 switch (portstatus & RTL8366_PLSR_SPEED_MASK) {
293 case RTL8366_PLSR_SPEED_10:
270 *media_active |= IFM_10_T;
271 break;
294 *media_active |= IFM_10_T;
295 break;
272 case RTL8366RB_PLSR_SPEED_100:
296 case RTL8366_PLSR_SPEED_100:
273 *media_active |= IFM_100_TX;
274 break;
297 *media_active |= IFM_100_TX;
298 break;
275 case RTL8366RB_PLSR_SPEED_1000:
299 case RTL8366_PLSR_SPEED_1000:
276 *media_active |= IFM_1000_T;
277 break;
278 }
300 *media_active |= IFM_1000_T;
301 break;
302 }
279 if ((portstatus & RTL8366RB_PLSR_FULLDUPLEX) != 0)
303 if ((portstatus & RTL8366_PLSR_FULLDUPLEX) != 0)
280 *media_active |= IFM_FDX;
281 else
282 *media_active |= IFM_HDX;
304 *media_active |= IFM_FDX;
305 else
306 *media_active |= IFM_HDX;
283 if ((portstatus & RTL8366RB_PLSR_TXPAUSE) != 0)
307 if ((portstatus & RTL8366_PLSR_TXPAUSE) != 0)
284 *media_active |= IFM_ETH_TXPAUSE;
308 *media_active |= IFM_ETH_TXPAUSE;
285 if ((portstatus & RTL8366RB_PLSR_RXPAUSE) != 0)
309 if ((portstatus & RTL8366_PLSR_RXPAUSE) != 0)
286 *media_active |= IFM_ETH_RXPAUSE;
287}
288
289static void
290rtl833rb_miipollstat(struct rtl8366rb_softc *sc)
291{
292 int i;
293 struct mii_data *mii;
294 struct mii_softc *miisc;
295 uint16_t value;
296 int portstatus;
297
310 *media_active |= IFM_ETH_RXPAUSE;
311}
312
313static void
314rtl833rb_miipollstat(struct rtl8366rb_softc *sc)
315{
316 int i;
317 struct mii_data *mii;
318 struct mii_softc *miisc;
319 uint16_t value;
320 int portstatus;
321
298 for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
322 for (i = 0; i < RTL8366_NUM_PHYS; i++) {
299 mii = device_get_softc(sc->miibus[i]);
300 if ((i % 2) == 0) {
323 mii = device_get_softc(sc->miibus[i]);
324 if ((i % 2) == 0) {
301 if (smi_read(sc->dev, RTL8366RB_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
325 if (smi_read(sc->dev, RTL8366_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
302 DEBUG_INCRVAR(callout_blocked);
303 return;
304 }
305 portstatus = value & 0xff;
306 } else {
307 portstatus = (value >> 8) & 0xff;
308 }
309 rtl8366rb_update_ifmedia(portstatus, &mii->mii_media_status, &mii->mii_media_active);
310 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
311 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != miisc->mii_inst)
312 continue;
313 mii_phy_update(miisc, MII_POLLSTAT);
314 }
315 }
316}
317
318static void
319rtl8366rb_tick(void *arg)
320{
326 DEBUG_INCRVAR(callout_blocked);
327 return;
328 }
329 portstatus = value & 0xff;
330 } else {
331 portstatus = (value >> 8) & 0xff;
332 }
333 rtl8366rb_update_ifmedia(portstatus, &mii->mii_media_status, &mii->mii_media_active);
334 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
335 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != miisc->mii_inst)
336 continue;
337 mii_phy_update(miisc, MII_POLLSTAT);
338 }
339 }
340}
341
342static void
343rtl8366rb_tick(void *arg)
344{
321 struct rtl8366rb_softc *sc = arg;
345 struct rtl8366rb_softc *sc;
322
346
347 sc = arg;
348
323 rtl833rb_miipollstat(sc);
324 callout_reset(&sc->callout_tick, hz, rtl8366rb_tick, sc);
325}
326
327static int
328smi_probe(device_t dev)
329{
349 rtl833rb_miipollstat(sc);
350 callout_reset(&sc->callout_tick, hz, rtl8366rb_tick, sc);
351}
352
353static int
354smi_probe(device_t dev)
355{
356 struct rtl8366rb_softc *sc;
330 device_t iicbus, iicha;
357 device_t iicbus, iicha;
331 int err, i;
358 int err, i, j;
332 uint16_t chipid;
333 char bytes[2];
334 int xferd;
335
359 uint16_t chipid;
360 char bytes[2];
361 int xferd;
362
336 bytes[0] = RTL8366RB_CIR & 0xff;
337 bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
363 sc = device_get_softc(dev);
364
338 iicbus = device_get_parent(dev);
339 iicha = device_get_parent(iicbus);
365 iicbus = device_get_parent(dev);
366 iicha = device_get_parent(iicbus);
340 iicbus_reset(iicbus, IIC_FASTEST, RTL8366RB_IIC_ADDR, NULL);
341 for (i=3; i--; ) {
342 IICBUS_STOP(iicha);
343 /*
344 * we go directly to the host adapter because iicbus.c
345 * only issues a stop on a bus that was successfully started.
346 */
367
368 for(i = 0; i < 2; ++i) {
369 iicbus_reset(iicbus, IIC_FASTEST, RTL8366_IIC_ADDR, NULL);
370 for (j=3; j--; ) {
371 IICBUS_STOP(iicha);
372 /*
373 * we go directly to the host adapter because iicbus.c
374 * only issues a stop on a bus that was successfully started.
375 */
376 }
377 err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
378 if (err != 0)
379 goto out;
380 err = iicbus_start(iicbus, RTL8366_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
381 if (err != 0)
382 goto out;
383 if(i == 0) {
384 bytes[0] = RTL8366RB_CIR & 0xff;
385 bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
386 } else {
387 bytes[0] = RTL8366SR_CIR & 0xff;
388 bytes[1] = (RTL8366SR_CIR >> 8) & 0xff;
389 }
390 err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
391 if (err != 0)
392 goto out;
393 err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
394 if (err != 0)
395 goto out;
396 chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
397 if (i == 0 && chipid == RTL8366RB_CIR_ID8366RB) {
398 DPRINTF(dev, "chip id 0x%04x\n", chipid);
399 sc->chip_type = 0;
400 err = 0;
401 break;
402 }
403 if (i == 1 && chipid == RTL8366SR_CIR_ID8366SR) {
404 DPRINTF(dev, "chip id 0x%04x\n", chipid);
405 sc->chip_type = 1;
406 err = 0;
407 break;
408 }
409 if(i == 0) {
410 iicbus_stop(iicbus);
411 iicbus_release_bus(iicbus, dev);
412 }
347 }
413 }
348 err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
349 if (err != 0)
350 goto out;
351 err = iicbus_start(iicbus, RTL8366RB_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
352 if (err != 0)
353 goto out;
354 err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
355 if (err != 0)
356 goto out;
357 err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
358 if (err != 0)
359 goto out;
360 chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
361 DPRINTF(dev, "chip id 0x%04x\n", chipid);
362 if (chipid != RTL8366RB_CIR_ID8366RB)
414 if(i == 2)
363 err = ENXIO;
364out:
365 iicbus_stop(iicbus);
366 iicbus_release_bus(iicbus, dev);
367 return (err == 0 ? 0 : ENXIO);
368}
369
370static int

--- 30 unchanged lines hidden (view full) ---

401 sc->smi_acquired = 0;
402 RTL_UNLOCK(sc);
403 return (0);
404}
405
406static int
407smi_select(device_t dev, int op, int sleep)
408{
415 err = ENXIO;
416out:
417 iicbus_stop(iicbus);
418 iicbus_release_bus(iicbus, dev);
419 return (err == 0 ? 0 : ENXIO);
420}
421
422static int

--- 30 unchanged lines hidden (view full) ---

453 sc->smi_acquired = 0;
454 RTL_UNLOCK(sc);
455 return (0);
456}
457
458static int
459smi_select(device_t dev, int op, int sleep)
460{
461 struct rtl8366rb_softc *sc;
409 int err, i;
462 int err, i;
410 device_t iicbus = device_get_parent(dev);
411 struct iicbus_ivar *devi = IICBUS_IVAR(dev);
412 int slave = devi->addr;
463 device_t iicbus;
464 struct iicbus_ivar *devi;
465 int slave;
413
466
467 sc = device_get_softc(dev);
468
469 iicbus = device_get_parent(dev);
470 devi = IICBUS_IVAR(dev);
471 slave = devi->addr;
472
414 RTL_SMI_ACQUIRED_ASSERT((struct rtl8366rb_softc *)device_get_softc(dev));
473 RTL_SMI_ACQUIRED_ASSERT((struct rtl8366rb_softc *)device_get_softc(dev));
474
475 if(sc->chip_type == 1) { // RTL8366SR work around
476 // this is same work around at probe
477 for (int i=3; i--; )
478 IICBUS_STOP(device_get_parent(device_get_parent(dev)));
479 }
415 /*
416 * The chip does not use clock stretching when it is busy,
417 * instead ignoring the command. Retry a few times.
418 */
419 for (i = RTL_IICBUS_RETRIES; i--; ) {
420 err = iicbus_start(iicbus, slave | op, RTL_IICBUS_TIMEOUT);
421 if (err != IIC_ENOACK)
422 break;

--- 5 unchanged lines hidden (view full) ---

428 }
429 return (err);
430}
431
432static int
433smi_read_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t *data, int sleep)
434{
435 int err;
480 /*
481 * The chip does not use clock stretching when it is busy,
482 * instead ignoring the command. Retry a few times.
483 */
484 for (i = RTL_IICBUS_RETRIES; i--; ) {
485 err = iicbus_start(iicbus, slave | op, RTL_IICBUS_TIMEOUT);
486 if (err != IIC_ENOACK)
487 break;

--- 5 unchanged lines hidden (view full) ---

493 }
494 return (err);
495}
496
497static int
498smi_read_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t *data, int sleep)
499{
500 int err;
436 device_t iicbus = device_get_parent(sc->dev);
501 device_t iicbus;
437 char bytes[2];
438 int xferd;
439
502 char bytes[2];
503 int xferd;
504
505 iicbus = device_get_parent(sc->dev);
506
440 RTL_SMI_ACQUIRED_ASSERT(sc);
441 bytes[0] = addr & 0xff;
442 bytes[1] = (addr >> 8) & 0xff;
443 err = smi_select(sc->dev, RTL_IICBUS_READ, sleep);
444 if (err != 0)
445 goto out;
446 err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
447 if (err != 0)

--- 7 unchanged lines hidden (view full) ---

455 iicbus_stop(iicbus);
456 return (err);
457}
458
459static int
460smi_write_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t data, int sleep)
461{
462 int err;
507 RTL_SMI_ACQUIRED_ASSERT(sc);
508 bytes[0] = addr & 0xff;
509 bytes[1] = (addr >> 8) & 0xff;
510 err = smi_select(sc->dev, RTL_IICBUS_READ, sleep);
511 if (err != 0)
512 goto out;
513 err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
514 if (err != 0)

--- 7 unchanged lines hidden (view full) ---

522 iicbus_stop(iicbus);
523 return (err);
524}
525
526static int
527smi_write_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t data, int sleep)
528{
529 int err;
463 device_t iicbus = device_get_parent(sc->dev);
530 device_t iicbus;
464 char bytes[4];
465 int xferd;
466
531 char bytes[4];
532 int xferd;
533
534 iicbus = device_get_parent(sc->dev);
535
467 RTL_SMI_ACQUIRED_ASSERT(sc);
468 bytes[0] = addr & 0xff;
469 bytes[1] = (addr >> 8) & 0xff;
470 bytes[2] = data & 0xff;
471 bytes[3] = (data >> 8) & 0xff;
472
473 err = smi_select(sc->dev, RTL_IICBUS_WRITE, sleep);
474 if (err == 0)
475 err = iicbus_write(iicbus, bytes, 4, &xferd, RTL_IICBUS_TIMEOUT);
476 iicbus_stop(iicbus);
477
478 return (err);
479}
480
481static int
482smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep)
483{
536 RTL_SMI_ACQUIRED_ASSERT(sc);
537 bytes[0] = addr & 0xff;
538 bytes[1] = (addr >> 8) & 0xff;
539 bytes[2] = data & 0xff;
540 bytes[3] = (data >> 8) & 0xff;
541
542 err = smi_select(sc->dev, RTL_IICBUS_WRITE, sleep);
543 if (err == 0)
544 err = iicbus_write(iicbus, bytes, 4, &xferd, RTL_IICBUS_TIMEOUT);
545 iicbus_stop(iicbus);
546
547 return (err);
548}
549
550static int
551smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep)
552{
484 struct rtl8366rb_softc *sc = device_get_softc(dev);
553 struct rtl8366rb_softc *sc;
485 int err;
486
554 int err;
555
556 sc = device_get_softc(dev);
557
487 err = smi_acquire(sc, sleep);
488 if (err != 0)
489 return (EBUSY);
490 err = smi_read_locked(sc, addr, data, sleep);
491 smi_release(sc, sleep);
492 DEVERR(dev, err, "smi_read()=%d: addr=%04x\n", addr);
493 return (err == 0 ? 0 : EIO);
494}
495
496static int
497smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep)
498{
558 err = smi_acquire(sc, sleep);
559 if (err != 0)
560 return (EBUSY);
561 err = smi_read_locked(sc, addr, data, sleep);
562 smi_release(sc, sleep);
563 DEVERR(dev, err, "smi_read()=%d: addr=%04x\n", addr);
564 return (err == 0 ? 0 : EIO);
565}
566
567static int
568smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep)
569{
499 struct rtl8366rb_softc *sc = device_get_softc(dev);
570 struct rtl8366rb_softc *sc;
500 int err;
501
571 int err;
572
573 sc = device_get_softc(dev);
574
502 err = smi_acquire(sc, sleep);
503 if (err != 0)
504 return (EBUSY);
505 err = smi_write_locked(sc, addr, data, sleep);
506 smi_release(sc, sleep);
507 DEVERR(dev, err, "smi_write()=%d: addr=%04x\n", addr);
508 return (err == 0 ? 0 : EIO);
509}
510
511static int
512smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep)
513{
575 err = smi_acquire(sc, sleep);
576 if (err != 0)
577 return (EBUSY);
578 err = smi_write_locked(sc, addr, data, sleep);
579 smi_release(sc, sleep);
580 DEVERR(dev, err, "smi_write()=%d: addr=%04x\n", addr);
581 return (err == 0 ? 0 : EIO);
582}
583
584static int
585smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep)
586{
514 struct rtl8366rb_softc *sc = device_get_softc(dev);
587 struct rtl8366rb_softc *sc;
515 int err;
516 uint16_t oldv, newv;
517
588 int err;
589 uint16_t oldv, newv;
590
591 sc = device_get_softc(dev);
592
518 err = smi_acquire(sc, sleep);
519 if (err != 0)
520 return (EBUSY);
521 if (err == 0) {
522 err = smi_read_locked(sc, addr, &oldv, sleep);
523 if (err == 0) {
524 newv = oldv & ~mask;
525 newv |= data & mask;

--- 4 unchanged lines hidden (view full) ---

530 smi_release(sc, sleep);
531 DEVERR(dev, err, "smi_rmw()=%d: addr=%04x\n", addr);
532 return (err == 0 ? 0 : EIO);
533}
534
535static etherswitch_info_t *
536rtl_getinfo(device_t dev)
537{
593 err = smi_acquire(sc, sleep);
594 if (err != 0)
595 return (EBUSY);
596 if (err == 0) {
597 err = smi_read_locked(sc, addr, &oldv, sleep);
598 if (err == 0) {
599 newv = oldv & ~mask;
600 newv |= data & mask;

--- 4 unchanged lines hidden (view full) ---

605 smi_release(sc, sleep);
606 DEVERR(dev, err, "smi_rmw()=%d: addr=%04x\n", addr);
607 return (err == 0 ? 0 : EIO);
608}
609
610static etherswitch_info_t *
611rtl_getinfo(device_t dev)
612{
538 return (&etherswitch_info);
613 struct rtl8366rb_softc *sc;
614
615 sc = device_get_softc(dev);
616
617 return (&sc->info);
539}
540
541static int
542rtl_readreg(device_t dev, int reg)
543{
618}
619
620static int
621rtl_readreg(device_t dev, int reg)
622{
544 uint16_t data = 0;
623 uint16_t data;
545
624
625 data = 0;
626
546 smi_read(dev, reg, &data, RTL_WAITOK);
547 return (data);
548}
549
550static int
551rtl_writereg(device_t dev, int reg, int value)
552{
553 return (smi_write(dev, reg, value, RTL_WAITOK));
554}
555
556static int
557rtl_getport(device_t dev, etherswitch_port_t *p)
558{
559 struct rtl8366rb_softc *sc;
560 struct ifmedia *ifm;
561 struct mii_data *mii;
627 smi_read(dev, reg, &data, RTL_WAITOK);
628 return (data);
629}
630
631static int
632rtl_writereg(device_t dev, int reg, int value)
633{
634 return (smi_write(dev, reg, value, RTL_WAITOK));
635}
636
637static int
638rtl_getport(device_t dev, etherswitch_port_t *p)
639{
640 struct rtl8366rb_softc *sc;
641 struct ifmedia *ifm;
642 struct mii_data *mii;
562 struct ifmediareq *ifmr = &p->es_ifmr;
643 struct ifmediareq *ifmr;
563 uint16_t v;
564 int err, vlangroup;
565
644 uint16_t v;
645 int err, vlangroup;
646
566 if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS)
567 return (ENXIO);
568 sc = device_get_softc(dev);
647 sc = device_get_softc(dev);
569 vlangroup = RTL8366RB_PVCR_GET(p->es_port,
570 rtl_readreg(dev, RTL8366RB_PVCR_REG(p->es_port)));
648
649 ifmr = &p->es_ifmr;
650
651 if (p->es_port < 0 || p->es_port >= RTL8366_NUM_PORTS)
652 return (ENXIO);
653 vlangroup = RTL8366_PVCR_GET(p->es_port,
654 rtl_readreg(dev, RTL8366_PVCR_REG(p->es_port)));
571 p->es_pvid = sc->vid[vlangroup] & ETHERSWITCH_VID_MASK;
572
655 p->es_pvid = sc->vid[vlangroup] & ETHERSWITCH_VID_MASK;
656
573 if (p->es_port < RTL8366RB_NUM_PHYS) {
657 if (p->es_port < RTL8366_NUM_PHYS) {
574 mii = device_get_softc(sc->miibus[p->es_port]);
575 ifm = &mii->mii_media;
576 err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCGIFMEDIA);
577 if (err)
578 return (err);
579 } else {
580 /* fill in fixed values for CPU port */
581 p->es_flags |= ETHERSWITCH_PORT_CPU;
658 mii = device_get_softc(sc->miibus[p->es_port]);
659 ifm = &mii->mii_media;
660 err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCGIFMEDIA);
661 if (err)
662 return (err);
663 } else {
664 /* fill in fixed values for CPU port */
665 p->es_flags |= ETHERSWITCH_PORT_CPU;
582 smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK);
583 v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2));
666 smi_read(dev, RTL8366_PLSR_BASE + (RTL8366_NUM_PHYS)/2, &v, RTL_WAITOK);
667 v = v >> (8 * ((RTL8366_NUM_PHYS) % 2));
584 rtl8366rb_update_ifmedia(v, &ifmr->ifm_status, &ifmr->ifm_active);
585 ifmr->ifm_current = ifmr->ifm_active;
586 ifmr->ifm_mask = 0;
587 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
588 /* Return our static media list. */
589 if (ifmr->ifm_count > 0) {
590 ifmr->ifm_count = 1;
591 ifmr->ifm_ulist[0] = IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
592 IFM_FDX, 0);
593 } else
594 ifmr->ifm_count = 0;
595 }
596 return (0);
597}
598
599static int
600rtl_setport(device_t dev, etherswitch_port_t *p)
601{
668 rtl8366rb_update_ifmedia(v, &ifmr->ifm_status, &ifmr->ifm_active);
669 ifmr->ifm_current = ifmr->ifm_active;
670 ifmr->ifm_mask = 0;
671 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
672 /* Return our static media list. */
673 if (ifmr->ifm_count > 0) {
674 ifmr->ifm_count = 1;
675 ifmr->ifm_ulist[0] = IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
676 IFM_FDX, 0);
677 } else
678 ifmr->ifm_count = 0;
679 }
680 return (0);
681}
682
683static int
684rtl_setport(device_t dev, etherswitch_port_t *p)
685{
602 int i, err, vlangroup;
603 struct rtl8366rb_softc *sc;
686 struct rtl8366rb_softc *sc;
687 int i, err, vlangroup;
604 struct ifmedia *ifm;
605 struct mii_data *mii;
606
688 struct ifmedia *ifm;
689 struct mii_data *mii;
690
607 if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS)
608 return (ENXIO);
609 sc = device_get_softc(dev);
691 sc = device_get_softc(dev);
692
693 if (p->es_port < 0 || p->es_port >= RTL8366_NUM_PORTS)
694 return (ENXIO);
610 vlangroup = -1;
695 vlangroup = -1;
611 for (i = 0; i < RTL8366RB_NUM_VLANS; i++) {
696 for (i = 0; i < RTL8366_NUM_VLANS; i++) {
612 if ((sc->vid[i] & ETHERSWITCH_VID_MASK) == p->es_pvid) {
613 vlangroup = i;
614 break;
615 }
616 }
617 if (vlangroup == -1)
618 return (ENXIO);
697 if ((sc->vid[i] & ETHERSWITCH_VID_MASK) == p->es_pvid) {
698 vlangroup = i;
699 break;
700 }
701 }
702 if (vlangroup == -1)
703 return (ENXIO);
619 err = smi_rmw(dev, RTL8366RB_PVCR_REG(p->es_port),
620 RTL8366RB_PVCR_VAL(p->es_port, RTL8366RB_PVCR_PORT_MASK),
621 RTL8366RB_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
704 err = smi_rmw(dev, RTL8366_PVCR_REG(p->es_port),
705 RTL8366_PVCR_VAL(p->es_port, RTL8366_PVCR_PORT_MASK),
706 RTL8366_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
622 if (err)
623 return (err);
707 if (err)
708 return (err);
624 if (p->es_port == RTL8366RB_CPU_PORT)
709 if (p->es_port == RTL8366_CPU_PORT)
625 return (0);
626 mii = device_get_softc(sc->miibus[p->es_port]);
627 ifm = &mii->mii_media;
628 err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA);
629 return (err);
630}
631
632static int
633rtl_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
634{
635 struct rtl8366rb_softc *sc;
636 uint16_t vmcr[3];
637 int i;
638
710 return (0);
711 mii = device_get_softc(sc->miibus[p->es_port]);
712 ifm = &mii->mii_media;
713 err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA);
714 return (err);
715}
716
717static int
718rtl_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
719{
720 struct rtl8366rb_softc *sc;
721 uint16_t vmcr[3];
722 int i;
723
639 for (i=0; i<3; i++)
640 vmcr[i] = rtl_readreg(dev, RTL8366RB_VMCR(i, vg->es_vlangroup));
641
642 sc = device_get_softc(dev);
724 sc = device_get_softc(dev);
725
726 for (i=0; i<RTL8366_VMCR_MULT; i++)
727 vmcr[i] = rtl_readreg(dev, RTL8366_VMCR(i, vg->es_vlangroup));
728
643 vg->es_vid = sc->vid[vg->es_vlangroup];
729 vg->es_vid = sc->vid[vg->es_vlangroup];
644 vg->es_member_ports = RTL8366RB_VMCR_MEMBER(vmcr);
645 vg->es_untagged_ports = RTL8366RB_VMCR_UNTAG(vmcr);
646 vg->es_fid = RTL8366RB_VMCR_FID(vmcr);
730 vg->es_member_ports = RTL8366_VMCR_MEMBER(vmcr);
731 vg->es_untagged_ports = RTL8366_VMCR_UNTAG(vmcr);
732 vg->es_fid = RTL8366_VMCR_FID(vmcr);
647 return (0);
648}
649
650static int
651rtl_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
652{
653 struct rtl8366rb_softc *sc;
733 return (0);
734}
735
736static int
737rtl_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
738{
739 struct rtl8366rb_softc *sc;
654 int g = vg->es_vlangroup;
740 int g;
655
656 sc = device_get_softc(dev);
741
742 sc = device_get_softc(dev);
743
744 g = vg->es_vlangroup;
745
657 sc->vid[g] = vg->es_vid;
658 /* VLAN group disabled ? */
659 if (vg->es_member_ports == 0 && vg->es_untagged_ports == 0 && vg->es_vid == 0)
660 return (0);
661 sc->vid[g] |= ETHERSWITCH_VID_VALID;
746 sc->vid[g] = vg->es_vid;
747 /* VLAN group disabled ? */
748 if (vg->es_member_ports == 0 && vg->es_untagged_ports == 0 && vg->es_vid == 0)
749 return (0);
750 sc->vid[g] |= ETHERSWITCH_VID_VALID;
662 rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_DOT1Q_REG, g),
663 (vg->es_vid << RTL8366RB_VMCR_DOT1Q_VID_SHIFT) & RTL8366RB_VMCR_DOT1Q_VID_MASK);
664 rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, g),
665 ((vg->es_member_ports << RTL8366RB_VMCR_MU_MEMBER_SHIFT) & RTL8366RB_VMCR_MU_MEMBER_MASK) |
666 ((vg->es_untagged_ports << RTL8366RB_VMCR_MU_UNTAG_SHIFT) & RTL8366RB_VMCR_MU_UNTAG_MASK));
667 rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_FID_REG, g),
668 vg->es_fid);
751 rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_DOT1Q_REG, g),
752 (vg->es_vid << RTL8366_VMCR_DOT1Q_VID_SHIFT) & RTL8366_VMCR_DOT1Q_VID_MASK);
753 if(sc->chip_type == 0) {
754 rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
755 ((vg->es_member_ports << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
756 ((vg->es_untagged_ports << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK));
757 rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_FID_REG, g),
758 vg->es_fid);
759 } else {
760 rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
761 ((vg->es_member_ports << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
762 ((vg->es_untagged_ports << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK) |
763 ((vg->es_fid << RTL8366_VMCR_FID_FID_SHIFT) & RTL8366_VMCR_FID_FID_MASK));
764 }
669 return (0);
670}
671
672static int
673rtl_getconf(device_t dev, etherswitch_conf_t *conf)
674{
675
676 /* Return the VLAN mode. */
677 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
678 conf->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
679
680 return (0);
681}
682
683static int
684rtl_readphy(device_t dev, int phy, int reg)
685{
765 return (0);
766}
767
768static int
769rtl_getconf(device_t dev, etherswitch_conf_t *conf)
770{
771
772 /* Return the VLAN mode. */
773 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
774 conf->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
775
776 return (0);
777}
778
779static int
780rtl_readphy(device_t dev, int phy, int reg)
781{
686 struct rtl8366rb_softc *sc = device_get_softc(dev);
687 uint16_t data = 0;
782 struct rtl8366rb_softc *sc;
783 uint16_t data;
688 int err, i, sleep;
689
784 int err, i, sleep;
785
690 if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
786 sc = device_get_softc(dev);
787
788 data = 0;
789
790 if (phy < 0 || phy >= RTL8366_NUM_PHYS)
691 return (ENXIO);
791 return (ENXIO);
692 if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
792 if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
693 return (ENXIO);
694 sleep = RTL_WAITOK;
695 err = smi_acquire(sc, sleep);
696 if (err != 0)
697 return (EBUSY);
698 for (i = RTL_IICBUS_RETRIES; i--; ) {
793 return (ENXIO);
794 sleep = RTL_WAITOK;
795 err = smi_acquire(sc, sleep);
796 if (err != 0)
797 return (EBUSY);
798 for (i = RTL_IICBUS_RETRIES; i--; ) {
699 err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_READ, sleep);
799 err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_READ, sleep);
700 if (err == 0)
800 if (err == 0)
701 err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), 0, sleep);
801 err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), 0, sleep);
702 if (err == 0) {
802 if (err == 0) {
703 err = smi_read_locked(sc, RTL8366RB_PADR, &data, sleep);
803 err = smi_read_locked(sc, RTL8366_PADR, &data, sleep);
704 break;
705 }
706 DEBUG_INCRVAR(phy_access_retries);
707 DPRINTF(dev, "rtl_readphy(): chip not responsive, retrying %d more times\n", i);
708 pause("rtl_readphy", RTL_IICBUS_RETRY_SLEEP);
709 }
710 smi_release(sc, sleep);
711 DEVERR(dev, err, "rtl_readphy()=%d: phy=%d.%02x\n", phy, reg);
712 return (data);
713}
714
715static int
716rtl_writephy(device_t dev, int phy, int reg, int data)
717{
804 break;
805 }
806 DEBUG_INCRVAR(phy_access_retries);
807 DPRINTF(dev, "rtl_readphy(): chip not responsive, retrying %d more times\n", i);
808 pause("rtl_readphy", RTL_IICBUS_RETRY_SLEEP);
809 }
810 smi_release(sc, sleep);
811 DEVERR(dev, err, "rtl_readphy()=%d: phy=%d.%02x\n", phy, reg);
812 return (data);
813}
814
815static int
816rtl_writephy(device_t dev, int phy, int reg, int data)
817{
718 struct rtl8366rb_softc *sc = device_get_softc(dev);
818 struct rtl8366rb_softc *sc;
719 int err, i, sleep;
720
819 int err, i, sleep;
820
721 if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
821 sc = device_get_softc(dev);
822
823 if (phy < 0 || phy >= RTL8366_NUM_PHYS)
722 return (ENXIO);
824 return (ENXIO);
723 if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
825 if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
724 return (ENXIO);
725 sleep = RTL_WAITOK;
726 err = smi_acquire(sc, sleep);
727 if (err != 0)
728 return (EBUSY);
729 for (i = RTL_IICBUS_RETRIES; i--; ) {
826 return (ENXIO);
827 sleep = RTL_WAITOK;
828 err = smi_acquire(sc, sleep);
829 if (err != 0)
830 return (EBUSY);
831 for (i = RTL_IICBUS_RETRIES; i--; ) {
730 err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_WRITE, sleep);
832 err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_WRITE, sleep);
731 if (err == 0)
833 if (err == 0)
732 err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), data, sleep);
834 err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), data, sleep);
733 if (err == 0) {
734 break;
735 }
736 DEBUG_INCRVAR(phy_access_retries);
737 DPRINTF(dev, "rtl_writephy(): chip not responsive, retrying %d more tiems\n", i);
738 pause("rtl_writephy", RTL_IICBUS_RETRY_SLEEP);
739 }
740 smi_release(sc, sleep);
741 DEVERR(dev, err, "rtl_writephy()=%d: phy=%d.%02x\n", phy, reg);
742 return (err == 0 ? 0 : EIO);
743}
744
745static int
746rtl8366rb_ifmedia_upd(struct ifnet *ifp)
747{
835 if (err == 0) {
836 break;
837 }
838 DEBUG_INCRVAR(phy_access_retries);
839 DPRINTF(dev, "rtl_writephy(): chip not responsive, retrying %d more tiems\n", i);
840 pause("rtl_writephy", RTL_IICBUS_RETRY_SLEEP);
841 }
842 smi_release(sc, sleep);
843 DEVERR(dev, err, "rtl_writephy()=%d: phy=%d.%02x\n", phy, reg);
844 return (err == 0 ? 0 : EIO);
845}
846
847static int
848rtl8366rb_ifmedia_upd(struct ifnet *ifp)
849{
748 struct rtl8366rb_softc *sc = ifp->if_softc;
749 struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
850 struct rtl8366rb_softc *sc;
851 struct mii_data *mii;
750
852
853 sc = ifp->if_softc;
854 mii = device_get_softc(sc->miibus[ifp->if_dunit]);
855
751 mii_mediachg(mii);
752 return (0);
753}
754
755static void
756rtl8366rb_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
757{
856 mii_mediachg(mii);
857 return (0);
858}
859
860static void
861rtl8366rb_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
862{
758 struct rtl8366rb_softc *sc = ifp->if_softc;
759 struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
863 struct rtl8366rb_softc *sc;
864 struct mii_data *mii;
760
865
866 sc = ifp->if_softc;
867 mii = device_get_softc(sc->miibus[ifp->if_dunit]);
868
761 mii_pollstat(mii);
762 ifmr->ifm_active = mii->mii_media_active;
763 ifmr->ifm_status = mii->mii_media_status;
764}
765
766
767static device_method_t rtl8366rb_methods[] = {
768 /* Device interface */

--- 38 unchanged lines hidden --- 		869 mii_pollstat(mii);
870 ifmr->ifm_active = mii->mii_media_active;
871 ifmr->ifm_status = mii->mii_media_status;
872}
873
874
875static device_method_t rtl8366rb_methods[] = {
876 /* Device interface */

--- 38 unchanged lines hidden ---