1a2
> * Copyright (c) 2015-2016 Hiroki Mori.
26c27
< * $FreeBSD: stable/11/sys/dev/etherswitch/rtl8366/rtl8366rb.c 268564 2014-07-12 06:23:42Z rpaulo $
---
> * $FreeBSD: stable/11/sys/dev/etherswitch/rtl8366/rtl8366rb.c 315330 2017-03-15 21:03:51Z mizhka $
28a30,31
> #include "opt_etherswitch.h"
>
68,71c71,74
< int vid[RTL8366RB_NUM_VLANS];
< char *ifname[RTL8366RB_NUM_PHYS];
< device_t miibus[RTL8366RB_NUM_PHYS];
< struct ifnet *ifp[RTL8366RB_NUM_PHYS];
---
> int vid[RTL8366_NUM_VLANS];
> char *ifname[RTL8366_NUM_PHYS];
> device_t miibus[RTL8366_NUM_PHYS];
> struct ifnet *ifp[RTL8366_NUM_PHYS];
72a76,77
> etherswitch_info_t info;
> int chip_type; /* 0 = RTL8366RB, 1 = RTL8366SR */
75,81d79
< static etherswitch_info_t etherswitch_info = {
< .es_nports = RTL8366RB_NUM_PORTS,
< .es_nvlangroups = RTL8366RB_NUM_VLANS,
< .es_name = "Realtek RTL8366RB",
< .es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q,
< };
<
136c134
< devi->addr = RTL8366RB_IIC_ADDR;
---
> devi->addr = RTL8366_IIC_ADDR;
142a141,145
> struct rtl8366rb_softc *sc;
>
> sc = device_get_softc(dev);
>
> bzero(sc, sizeof(*sc));
145c148,151
< device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
---
> if(sc->chip_type == 0)
> device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
> else
> device_set_desc(dev, "RTL8366SR Ethernet Switch Controller");
152d157
< int i;
153a159
> int i;
154a161,162
> sc = device_get_softc(dev);
>
156,158c164,173
< smi_rmw(dev, RTL8366RB_RCR,
< RTL8366RB_RCR_HARD_RESET,
< RTL8366RB_RCR_HARD_RESET, RTL_WAITOK);
---
> #ifdef RTL8366_SOFT_RESET
> smi_rmw(dev, RTL8366_RCR,
> RTL8366_RCR_SOFT_RESET,
> RTL8366_RCR_SOFT_RESET, RTL_WAITOK);
> #else
> smi_rmw(dev, RTL8366_RCR,
> RTL8366_RCR_HARD_RESET,
> RTL8366_RCR_HARD_RESET, RTL_WAITOK);
> #endif
> /* hard reset not return ack */
161,163c176,178
< smi_rmw(dev, RTL8366RB_SGCR,
< RTL8366RB_SGCR_EN_VLAN | RTL8366RB_SGCR_EN_VLAN_4KTB,
< RTL8366RB_SGCR_EN_VLAN, RTL_WAITOK);
---
> smi_rmw(dev, RTL8366_SGCR,
> RTL8366_SGCR_EN_VLAN | RTL8366_SGCR_EN_VLAN_4KTB,
> RTL8366_SGCR_EN_VLAN, RTL_WAITOK);
165d179
< sc = device_get_softc(dev);
169c183
< smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 0),
---
> smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 0),
172,176c186,190
< smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 1),
< ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT)
< | ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT),
< ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT
< | ((1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT)),
---
> smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 1),
> ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT)
> | ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT),
> ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT
> | ((1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT)),
179,181c193,195
< smi_rmw(dev, RTL8366RB_PVCR_REG(0),
< RTL8366RB_PVCR_VAL(0, RTL8366RB_PVCR_PORT_MASK),
< RTL8366RB_PVCR_VAL(0, 1), RTL_WAITOK);
---
> smi_rmw(dev, RTL8366_PVCR_REG(0),
> RTL8366_PVCR_VAL(0, RTL8366_PVCR_PORT_MASK),
> RTL8366_PVCR_VAL(0, 1), RTL_WAITOK);
187d200
< uint16_t rev = 0;
188a202
> uint16_t rev = 0;
194c208
< bzero(sc, sizeof(*sc));
---
>
201c215
< smi_read(dev, RTL8366RB_CVCR, &rev, RTL_WAITOK);
---
> smi_read(dev, RTL8366_CVCR, &rev, RTL_WAITOK);
203a218,225
> sc->info.es_nports = RTL8366_NUM_PORTS;
> sc->info.es_nvlangroups = RTL8366_NUM_VLANS;
> sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q;
> if(sc->chip_type == 0)
> sprintf(sc->info.es_name, "Realtek RTL8366RB");
> else
> sprintf(sc->info.es_name, "Realtek RTL8366SR");
>
206c228
< for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
---
> for (i = 0; i < RTL8366_NUM_PHYS; i++) {
239c261
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
242c264,266
< for (i=0; i < RTL8366RB_NUM_PHYS; i++) {
---
> sc = device_get_softc(dev);
>
> for (i=0; i < RTL8366_NUM_PHYS; i++) {
262c286
< if ((portstatus & RTL8366RB_PLSR_LINK) != 0)
---
> if ((portstatus & RTL8366_PLSR_LINK) != 0)
268,269c292,293
< switch (portstatus & RTL8366RB_PLSR_SPEED_MASK) {
< case RTL8366RB_PLSR_SPEED_10:
---
> switch (portstatus & RTL8366_PLSR_SPEED_MASK) {
> case RTL8366_PLSR_SPEED_10:
272c296
< case RTL8366RB_PLSR_SPEED_100:
---
> case RTL8366_PLSR_SPEED_100:
275c299
< case RTL8366RB_PLSR_SPEED_1000:
---
> case RTL8366_PLSR_SPEED_1000:
279c303
< if ((portstatus & RTL8366RB_PLSR_FULLDUPLEX) != 0)
---
> if ((portstatus & RTL8366_PLSR_FULLDUPLEX) != 0)
283c307
< if ((portstatus & RTL8366RB_PLSR_TXPAUSE) != 0)
---
> if ((portstatus & RTL8366_PLSR_TXPAUSE) != 0)
285c309
< if ((portstatus & RTL8366RB_PLSR_RXPAUSE) != 0)
---
> if ((portstatus & RTL8366_PLSR_RXPAUSE) != 0)
298c322
< for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
---
> for (i = 0; i < RTL8366_NUM_PHYS; i++) {
301c325
< if (smi_read(sc->dev, RTL8366RB_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
---
> if (smi_read(sc->dev, RTL8366_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
321c345
< struct rtl8366rb_softc *sc = arg;
---
> struct rtl8366rb_softc *sc;
322a347,348
> sc = arg;
>
329a356
> struct rtl8366rb_softc *sc;
331c358
< int err, i;
---
> int err, i, j;
336,337c363,364
< bytes[0] = RTL8366RB_CIR & 0xff;
< bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
---
> sc = device_get_softc(dev);
>
340,346c367,412
< iicbus_reset(iicbus, IIC_FASTEST, RTL8366RB_IIC_ADDR, NULL);
< for (i=3; i--; ) {
< IICBUS_STOP(iicha);
< /*
< * we go directly to the host adapter because iicbus.c
< * only issues a stop on a bus that was successfully started.
< */
---
>
> for(i = 0; i < 2; ++i) {
> iicbus_reset(iicbus, IIC_FASTEST, RTL8366_IIC_ADDR, NULL);
> for (j=3; j--; ) {
> IICBUS_STOP(iicha);
> /*
> * we go directly to the host adapter because iicbus.c
> * only issues a stop on a bus that was successfully started.
> */
> }
> err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
> if (err != 0)
> goto out;
> err = iicbus_start(iicbus, RTL8366_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
> if (err != 0)
> goto out;
> if(i == 0) {
> bytes[0] = RTL8366RB_CIR & 0xff;
> bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
> } else {
> bytes[0] = RTL8366SR_CIR & 0xff;
> bytes[1] = (RTL8366SR_CIR >> 8) & 0xff;
> }
> err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
> if (err != 0)
> goto out;
> err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
> if (err != 0)
> goto out;
> chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
> if (i == 0 && chipid == RTL8366RB_CIR_ID8366RB) {
> DPRINTF(dev, "chip id 0x%04x\n", chipid);
> sc->chip_type = 0;
> err = 0;
> break;
> }
> if (i == 1 && chipid == RTL8366SR_CIR_ID8366SR) {
> DPRINTF(dev, "chip id 0x%04x\n", chipid);
> sc->chip_type = 1;
> err = 0;
> break;
> }
> if(i == 0) {
> iicbus_stop(iicbus);
> iicbus_release_bus(iicbus, dev);
> }
348,362c414
< err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
< if (err != 0)
< goto out;
< err = iicbus_start(iicbus, RTL8366RB_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
< if (err != 0)
< goto out;
< err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
< if (err != 0)
< goto out;
< err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
< if (err != 0)
< goto out;
< chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
< DPRINTF(dev, "chip id 0x%04x\n", chipid);
< if (chipid != RTL8366RB_CIR_ID8366RB)
---
> if(i == 2)
408a461
> struct rtl8366rb_softc *sc;
410,412c463,465
< device_t iicbus = device_get_parent(dev);
< struct iicbus_ivar *devi = IICBUS_IVAR(dev);
< int slave = devi->addr;
---
> device_t iicbus;
> struct iicbus_ivar *devi;
> int slave;
413a467,472
> sc = device_get_softc(dev);
>
> iicbus = device_get_parent(dev);
> devi = IICBUS_IVAR(dev);
> slave = devi->addr;
>
414a474,479
>
> if(sc->chip_type == 1) { // RTL8366SR work around
> // this is same work around at probe
> for (int i=3; i--; )
> IICBUS_STOP(device_get_parent(device_get_parent(dev)));
> }
436c501
< device_t iicbus = device_get_parent(sc->dev);
---
> device_t iicbus;
439a505,506
> iicbus = device_get_parent(sc->dev);
>
463c530
< device_t iicbus = device_get_parent(sc->dev);
---
> device_t iicbus;
466a534,535
> iicbus = device_get_parent(sc->dev);
>
484c553
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
486a556,557
> sc = device_get_softc(dev);
>
499c570
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
501a573,574
> sc = device_get_softc(dev);
>
514c587
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
517a591,592
> sc = device_get_softc(dev);
>
538c613,617
< return (ðerswitch_info);
---
> struct rtl8366rb_softc *sc;
>
> sc = device_get_softc(dev);
>
> return (&sc->info);
544c623
< uint16_t data = 0;
---
> uint16_t data;
545a625,626
> data = 0;
>
562c643
< struct ifmediareq *ifmr = &p->es_ifmr;
---
> struct ifmediareq *ifmr;
566,567d646
< if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS)
< return (ENXIO);
569,570c648,654
< vlangroup = RTL8366RB_PVCR_GET(p->es_port,
< rtl_readreg(dev, RTL8366RB_PVCR_REG(p->es_port)));
---
>
> ifmr = &p->es_ifmr;
>
> if (p->es_port < 0 || p->es_port >= RTL8366_NUM_PORTS)
> return (ENXIO);
> vlangroup = RTL8366_PVCR_GET(p->es_port,
> rtl_readreg(dev, RTL8366_PVCR_REG(p->es_port)));
573c657
< if (p->es_port < RTL8366RB_NUM_PHYS) {
---
> if (p->es_port < RTL8366_NUM_PHYS) {
582,583c666,667
< smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK);
< v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2));
---
> smi_read(dev, RTL8366_PLSR_BASE + (RTL8366_NUM_PHYS)/2, &v, RTL_WAITOK);
> v = v >> (8 * ((RTL8366_NUM_PHYS) % 2));
602d685
< int i, err, vlangroup;
603a687
> int i, err, vlangroup;
607,608d690
< if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS)
< return (ENXIO);
609a692,694
>
> if (p->es_port < 0 || p->es_port >= RTL8366_NUM_PORTS)
> return (ENXIO);
611c696
< for (i = 0; i < RTL8366RB_NUM_VLANS; i++) {
---
> for (i = 0; i < RTL8366_NUM_VLANS; i++) {
619,621c704,706
< err = smi_rmw(dev, RTL8366RB_PVCR_REG(p->es_port),
< RTL8366RB_PVCR_VAL(p->es_port, RTL8366RB_PVCR_PORT_MASK),
< RTL8366RB_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
---
> err = smi_rmw(dev, RTL8366_PVCR_REG(p->es_port),
> RTL8366_PVCR_VAL(p->es_port, RTL8366_PVCR_PORT_MASK),
> RTL8366_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
624c709
< if (p->es_port == RTL8366RB_CPU_PORT)
---
> if (p->es_port == RTL8366_CPU_PORT)
639,641d723
< for (i=0; i<3; i++)
< vmcr[i] = rtl_readreg(dev, RTL8366RB_VMCR(i, vg->es_vlangroup));
<
642a725,728
>
> for (i=0; i<RTL8366_VMCR_MULT; i++)
> vmcr[i] = rtl_readreg(dev, RTL8366_VMCR(i, vg->es_vlangroup));
>
644,646c730,732
< vg->es_member_ports = RTL8366RB_VMCR_MEMBER(vmcr);
< vg->es_untagged_ports = RTL8366RB_VMCR_UNTAG(vmcr);
< vg->es_fid = RTL8366RB_VMCR_FID(vmcr);
---
> vg->es_member_ports = RTL8366_VMCR_MEMBER(vmcr);
> vg->es_untagged_ports = RTL8366_VMCR_UNTAG(vmcr);
> vg->es_fid = RTL8366_VMCR_FID(vmcr);
654c740
< int g = vg->es_vlangroup;
---
> int g;
656a743,745
>
> g = vg->es_vlangroup;
>
662,668c751,764
< rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_DOT1Q_REG, g),
< (vg->es_vid << RTL8366RB_VMCR_DOT1Q_VID_SHIFT) & RTL8366RB_VMCR_DOT1Q_VID_MASK);
< rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, g),
< ((vg->es_member_ports << RTL8366RB_VMCR_MU_MEMBER_SHIFT) & RTL8366RB_VMCR_MU_MEMBER_MASK) |
< ((vg->es_untagged_ports << RTL8366RB_VMCR_MU_UNTAG_SHIFT) & RTL8366RB_VMCR_MU_UNTAG_MASK));
< rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_FID_REG, g),
< vg->es_fid);
---
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_DOT1Q_REG, g),
> (vg->es_vid << RTL8366_VMCR_DOT1Q_VID_SHIFT) & RTL8366_VMCR_DOT1Q_VID_MASK);
> if(sc->chip_type == 0) {
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
> ((vg->es_member_ports << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
> ((vg->es_untagged_ports << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK));
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_FID_REG, g),
> vg->es_fid);
> } else {
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
> ((vg->es_member_ports << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
> ((vg->es_untagged_ports << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK) |
> ((vg->es_fid << RTL8366_VMCR_FID_FID_SHIFT) & RTL8366_VMCR_FID_FID_MASK));
> }
686,687c782,783
< struct rtl8366rb_softc *sc = device_get_softc(dev);
< uint16_t data = 0;
---
> struct rtl8366rb_softc *sc;
> uint16_t data;
690c786,790
< if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
---
> sc = device_get_softc(dev);
>
> data = 0;
>
> if (phy < 0 || phy >= RTL8366_NUM_PHYS)
692c792
< if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
---
> if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
699c799
< err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_READ, sleep);
---
> err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_READ, sleep);
701c801
< err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), 0, sleep);
---
> err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), 0, sleep);
703c803
< err = smi_read_locked(sc, RTL8366RB_PADR, &data, sleep);
---
> err = smi_read_locked(sc, RTL8366_PADR, &data, sleep);
718c818
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
721c821,823
< if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
---
> sc = device_get_softc(dev);
>
> if (phy < 0 || phy >= RTL8366_NUM_PHYS)
723c825
< if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
---
> if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
730c832
< err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_WRITE, sleep);
---
> err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_WRITE, sleep);
732c834
< err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), data, sleep);
---
> err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), data, sleep);
748,749c850,851
< struct rtl8366rb_softc *sc = ifp->if_softc;
< struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
---
> struct rtl8366rb_softc *sc;
> struct mii_data *mii;
750a853,855
> sc = ifp->if_softc;
> mii = device_get_softc(sc->miibus[ifp->if_dunit]);
>
758,759c863,864
< struct rtl8366rb_softc *sc = ifp->if_softc;
< struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
---
> struct rtl8366rb_softc *sc;
> struct mii_data *mii;
760a866,868
> sc = ifp->if_softc;
> mii = device_get_softc(sc->miibus[ifp->if_dunit]);
>
> * Copyright (c) 2015-2016 Hiroki Mori.
26c27
< * $FreeBSD: stable/11/sys/dev/etherswitch/rtl8366/rtl8366rb.c 268564 2014-07-12 06:23:42Z rpaulo $
---
> * $FreeBSD: stable/11/sys/dev/etherswitch/rtl8366/rtl8366rb.c 315330 2017-03-15 21:03:51Z mizhka $
28a30,31
> #include "opt_etherswitch.h"
>
68,71c71,74
< int vid[RTL8366RB_NUM_VLANS];
< char *ifname[RTL8366RB_NUM_PHYS];
< device_t miibus[RTL8366RB_NUM_PHYS];
< struct ifnet *ifp[RTL8366RB_NUM_PHYS];
---
> int vid[RTL8366_NUM_VLANS];
> char *ifname[RTL8366_NUM_PHYS];
> device_t miibus[RTL8366_NUM_PHYS];
> struct ifnet *ifp[RTL8366_NUM_PHYS];
72a76,77
> etherswitch_info_t info;
> int chip_type; /* 0 = RTL8366RB, 1 = RTL8366SR */
75,81d79
< static etherswitch_info_t etherswitch_info = {
< .es_nports = RTL8366RB_NUM_PORTS,
< .es_nvlangroups = RTL8366RB_NUM_VLANS,
< .es_name = "Realtek RTL8366RB",
< .es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q,
< };
<
136c134
< devi->addr = RTL8366RB_IIC_ADDR;
---
> devi->addr = RTL8366_IIC_ADDR;
142a141,145
> struct rtl8366rb_softc *sc;
>
> sc = device_get_softc(dev);
>
> bzero(sc, sizeof(*sc));
145c148,151
< device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
---
> if(sc->chip_type == 0)
> device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
> else
> device_set_desc(dev, "RTL8366SR Ethernet Switch Controller");
152d157
< int i;
153a159
> int i;
154a161,162
> sc = device_get_softc(dev);
>
156,158c164,173
< smi_rmw(dev, RTL8366RB_RCR,
< RTL8366RB_RCR_HARD_RESET,
< RTL8366RB_RCR_HARD_RESET, RTL_WAITOK);
---
> #ifdef RTL8366_SOFT_RESET
> smi_rmw(dev, RTL8366_RCR,
> RTL8366_RCR_SOFT_RESET,
> RTL8366_RCR_SOFT_RESET, RTL_WAITOK);
> #else
> smi_rmw(dev, RTL8366_RCR,
> RTL8366_RCR_HARD_RESET,
> RTL8366_RCR_HARD_RESET, RTL_WAITOK);
> #endif
> /* hard reset not return ack */
161,163c176,178
< smi_rmw(dev, RTL8366RB_SGCR,
< RTL8366RB_SGCR_EN_VLAN | RTL8366RB_SGCR_EN_VLAN_4KTB,
< RTL8366RB_SGCR_EN_VLAN, RTL_WAITOK);
---
> smi_rmw(dev, RTL8366_SGCR,
> RTL8366_SGCR_EN_VLAN | RTL8366_SGCR_EN_VLAN_4KTB,
> RTL8366_SGCR_EN_VLAN, RTL_WAITOK);
165d179
< sc = device_get_softc(dev);
169c183
< smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 0),
---
> smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 0),
172,176c186,190
< smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 1),
< ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT)
< | ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT),
< ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT
< | ((1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT)),
---
> smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 1),
> ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT)
> | ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT),
> ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT
> | ((1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT)),
179,181c193,195
< smi_rmw(dev, RTL8366RB_PVCR_REG(0),
< RTL8366RB_PVCR_VAL(0, RTL8366RB_PVCR_PORT_MASK),
< RTL8366RB_PVCR_VAL(0, 1), RTL_WAITOK);
---
> smi_rmw(dev, RTL8366_PVCR_REG(0),
> RTL8366_PVCR_VAL(0, RTL8366_PVCR_PORT_MASK),
> RTL8366_PVCR_VAL(0, 1), RTL_WAITOK);
187d200
< uint16_t rev = 0;
188a202
> uint16_t rev = 0;
194c208
< bzero(sc, sizeof(*sc));
---
>
201c215
< smi_read(dev, RTL8366RB_CVCR, &rev, RTL_WAITOK);
---
> smi_read(dev, RTL8366_CVCR, &rev, RTL_WAITOK);
203a218,225
> sc->info.es_nports = RTL8366_NUM_PORTS;
> sc->info.es_nvlangroups = RTL8366_NUM_VLANS;
> sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q;
> if(sc->chip_type == 0)
> sprintf(sc->info.es_name, "Realtek RTL8366RB");
> else
> sprintf(sc->info.es_name, "Realtek RTL8366SR");
>
206c228
< for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
---
> for (i = 0; i < RTL8366_NUM_PHYS; i++) {
239c261
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
242c264,266
< for (i=0; i < RTL8366RB_NUM_PHYS; i++) {
---
> sc = device_get_softc(dev);
>
> for (i=0; i < RTL8366_NUM_PHYS; i++) {
262c286
< if ((portstatus & RTL8366RB_PLSR_LINK) != 0)
---
> if ((portstatus & RTL8366_PLSR_LINK) != 0)
268,269c292,293
< switch (portstatus & RTL8366RB_PLSR_SPEED_MASK) {
< case RTL8366RB_PLSR_SPEED_10:
---
> switch (portstatus & RTL8366_PLSR_SPEED_MASK) {
> case RTL8366_PLSR_SPEED_10:
272c296
< case RTL8366RB_PLSR_SPEED_100:
---
> case RTL8366_PLSR_SPEED_100:
275c299
< case RTL8366RB_PLSR_SPEED_1000:
---
> case RTL8366_PLSR_SPEED_1000:
279c303
< if ((portstatus & RTL8366RB_PLSR_FULLDUPLEX) != 0)
---
> if ((portstatus & RTL8366_PLSR_FULLDUPLEX) != 0)
283c307
< if ((portstatus & RTL8366RB_PLSR_TXPAUSE) != 0)
---
> if ((portstatus & RTL8366_PLSR_TXPAUSE) != 0)
285c309
< if ((portstatus & RTL8366RB_PLSR_RXPAUSE) != 0)
---
> if ((portstatus & RTL8366_PLSR_RXPAUSE) != 0)
298c322
< for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
---
> for (i = 0; i < RTL8366_NUM_PHYS; i++) {
301c325
< if (smi_read(sc->dev, RTL8366RB_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
---
> if (smi_read(sc->dev, RTL8366_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
321c345
< struct rtl8366rb_softc *sc = arg;
---
> struct rtl8366rb_softc *sc;
322a347,348
> sc = arg;
>
329a356
> struct rtl8366rb_softc *sc;
331c358
< int err, i;
---
> int err, i, j;
336,337c363,364
< bytes[0] = RTL8366RB_CIR & 0xff;
< bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
---
> sc = device_get_softc(dev);
>
340,346c367,412
< iicbus_reset(iicbus, IIC_FASTEST, RTL8366RB_IIC_ADDR, NULL);
< for (i=3; i--; ) {
< IICBUS_STOP(iicha);
< /*
< * we go directly to the host adapter because iicbus.c
< * only issues a stop on a bus that was successfully started.
< */
---
>
> for(i = 0; i < 2; ++i) {
> iicbus_reset(iicbus, IIC_FASTEST, RTL8366_IIC_ADDR, NULL);
> for (j=3; j--; ) {
> IICBUS_STOP(iicha);
> /*
> * we go directly to the host adapter because iicbus.c
> * only issues a stop on a bus that was successfully started.
> */
> }
> err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
> if (err != 0)
> goto out;
> err = iicbus_start(iicbus, RTL8366_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
> if (err != 0)
> goto out;
> if(i == 0) {
> bytes[0] = RTL8366RB_CIR & 0xff;
> bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
> } else {
> bytes[0] = RTL8366SR_CIR & 0xff;
> bytes[1] = (RTL8366SR_CIR >> 8) & 0xff;
> }
> err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
> if (err != 0)
> goto out;
> err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
> if (err != 0)
> goto out;
> chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
> if (i == 0 && chipid == RTL8366RB_CIR_ID8366RB) {
> DPRINTF(dev, "chip id 0x%04x\n", chipid);
> sc->chip_type = 0;
> err = 0;
> break;
> }
> if (i == 1 && chipid == RTL8366SR_CIR_ID8366SR) {
> DPRINTF(dev, "chip id 0x%04x\n", chipid);
> sc->chip_type = 1;
> err = 0;
> break;
> }
> if(i == 0) {
> iicbus_stop(iicbus);
> iicbus_release_bus(iicbus, dev);
> }
348,362c414
< err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
< if (err != 0)
< goto out;
< err = iicbus_start(iicbus, RTL8366RB_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
< if (err != 0)
< goto out;
< err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
< if (err != 0)
< goto out;
< err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
< if (err != 0)
< goto out;
< chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
< DPRINTF(dev, "chip id 0x%04x\n", chipid);
< if (chipid != RTL8366RB_CIR_ID8366RB)
---
> if(i == 2)
408a461
> struct rtl8366rb_softc *sc;
410,412c463,465
< device_t iicbus = device_get_parent(dev);
< struct iicbus_ivar *devi = IICBUS_IVAR(dev);
< int slave = devi->addr;
---
> device_t iicbus;
> struct iicbus_ivar *devi;
> int slave;
413a467,472
> sc = device_get_softc(dev);
>
> iicbus = device_get_parent(dev);
> devi = IICBUS_IVAR(dev);
> slave = devi->addr;
>
414a474,479
>
> if(sc->chip_type == 1) { // RTL8366SR work around
> // this is same work around at probe
> for (int i=3; i--; )
> IICBUS_STOP(device_get_parent(device_get_parent(dev)));
> }
436c501
< device_t iicbus = device_get_parent(sc->dev);
---
> device_t iicbus;
439a505,506
> iicbus = device_get_parent(sc->dev);
>
463c530
< device_t iicbus = device_get_parent(sc->dev);
---
> device_t iicbus;
466a534,535
> iicbus = device_get_parent(sc->dev);
>
484c553
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
486a556,557
> sc = device_get_softc(dev);
>
499c570
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
501a573,574
> sc = device_get_softc(dev);
>
514c587
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
517a591,592
> sc = device_get_softc(dev);
>
538c613,617
< return (ðerswitch_info);
---
> struct rtl8366rb_softc *sc;
>
> sc = device_get_softc(dev);
>
> return (&sc->info);
544c623
< uint16_t data = 0;
---
> uint16_t data;
545a625,626
> data = 0;
>
562c643
< struct ifmediareq *ifmr = &p->es_ifmr;
---
> struct ifmediareq *ifmr;
566,567d646
< if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS)
< return (ENXIO);
569,570c648,654
< vlangroup = RTL8366RB_PVCR_GET(p->es_port,
< rtl_readreg(dev, RTL8366RB_PVCR_REG(p->es_port)));
---
>
> ifmr = &p->es_ifmr;
>
> if (p->es_port < 0 || p->es_port >= RTL8366_NUM_PORTS)
> return (ENXIO);
> vlangroup = RTL8366_PVCR_GET(p->es_port,
> rtl_readreg(dev, RTL8366_PVCR_REG(p->es_port)));
573c657
< if (p->es_port < RTL8366RB_NUM_PHYS) {
---
> if (p->es_port < RTL8366_NUM_PHYS) {
582,583c666,667
< smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK);
< v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2));
---
> smi_read(dev, RTL8366_PLSR_BASE + (RTL8366_NUM_PHYS)/2, &v, RTL_WAITOK);
> v = v >> (8 * ((RTL8366_NUM_PHYS) % 2));
602d685
< int i, err, vlangroup;
603a687
> int i, err, vlangroup;
607,608d690
< if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS)
< return (ENXIO);
609a692,694
>
> if (p->es_port < 0 || p->es_port >= RTL8366_NUM_PORTS)
> return (ENXIO);
611c696
< for (i = 0; i < RTL8366RB_NUM_VLANS; i++) {
---
> for (i = 0; i < RTL8366_NUM_VLANS; i++) {
619,621c704,706
< err = smi_rmw(dev, RTL8366RB_PVCR_REG(p->es_port),
< RTL8366RB_PVCR_VAL(p->es_port, RTL8366RB_PVCR_PORT_MASK),
< RTL8366RB_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
---
> err = smi_rmw(dev, RTL8366_PVCR_REG(p->es_port),
> RTL8366_PVCR_VAL(p->es_port, RTL8366_PVCR_PORT_MASK),
> RTL8366_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
624c709
< if (p->es_port == RTL8366RB_CPU_PORT)
---
> if (p->es_port == RTL8366_CPU_PORT)
639,641d723
< for (i=0; i<3; i++)
< vmcr[i] = rtl_readreg(dev, RTL8366RB_VMCR(i, vg->es_vlangroup));
<
642a725,728
>
> for (i=0; i<RTL8366_VMCR_MULT; i++)
> vmcr[i] = rtl_readreg(dev, RTL8366_VMCR(i, vg->es_vlangroup));
>
644,646c730,732
< vg->es_member_ports = RTL8366RB_VMCR_MEMBER(vmcr);
< vg->es_untagged_ports = RTL8366RB_VMCR_UNTAG(vmcr);
< vg->es_fid = RTL8366RB_VMCR_FID(vmcr);
---
> vg->es_member_ports = RTL8366_VMCR_MEMBER(vmcr);
> vg->es_untagged_ports = RTL8366_VMCR_UNTAG(vmcr);
> vg->es_fid = RTL8366_VMCR_FID(vmcr);
654c740
< int g = vg->es_vlangroup;
---
> int g;
656a743,745
>
> g = vg->es_vlangroup;
>
662,668c751,764
< rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_DOT1Q_REG, g),
< (vg->es_vid << RTL8366RB_VMCR_DOT1Q_VID_SHIFT) & RTL8366RB_VMCR_DOT1Q_VID_MASK);
< rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, g),
< ((vg->es_member_ports << RTL8366RB_VMCR_MU_MEMBER_SHIFT) & RTL8366RB_VMCR_MU_MEMBER_MASK) |
< ((vg->es_untagged_ports << RTL8366RB_VMCR_MU_UNTAG_SHIFT) & RTL8366RB_VMCR_MU_UNTAG_MASK));
< rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_FID_REG, g),
< vg->es_fid);
---
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_DOT1Q_REG, g),
> (vg->es_vid << RTL8366_VMCR_DOT1Q_VID_SHIFT) & RTL8366_VMCR_DOT1Q_VID_MASK);
> if(sc->chip_type == 0) {
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
> ((vg->es_member_ports << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
> ((vg->es_untagged_ports << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK));
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_FID_REG, g),
> vg->es_fid);
> } else {
> rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
> ((vg->es_member_ports << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
> ((vg->es_untagged_ports << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK) |
> ((vg->es_fid << RTL8366_VMCR_FID_FID_SHIFT) & RTL8366_VMCR_FID_FID_MASK));
> }
686,687c782,783
< struct rtl8366rb_softc *sc = device_get_softc(dev);
< uint16_t data = 0;
---
> struct rtl8366rb_softc *sc;
> uint16_t data;
690c786,790
< if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
---
> sc = device_get_softc(dev);
>
> data = 0;
>
> if (phy < 0 || phy >= RTL8366_NUM_PHYS)
692c792
< if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
---
> if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
699c799
< err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_READ, sleep);
---
> err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_READ, sleep);
701c801
< err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), 0, sleep);
---
> err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), 0, sleep);
703c803
< err = smi_read_locked(sc, RTL8366RB_PADR, &data, sleep);
---
> err = smi_read_locked(sc, RTL8366_PADR, &data, sleep);
718c818
< struct rtl8366rb_softc *sc = device_get_softc(dev);
---
> struct rtl8366rb_softc *sc;
721c821,823
< if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
---
> sc = device_get_softc(dev);
>
> if (phy < 0 || phy >= RTL8366_NUM_PHYS)
723c825
< if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
---
> if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
730c832
< err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_WRITE, sleep);
---
> err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_WRITE, sleep);
732c834
< err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), data, sleep);
---
> err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), data, sleep);
748,749c850,851
< struct rtl8366rb_softc *sc = ifp->if_softc;
< struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
---
> struct rtl8366rb_softc *sc;
> struct mii_data *mii;
750a853,855
> sc = ifp->if_softc;
> mii = device_get_softc(sc->miibus[ifp->if_dunit]);
>
758,759c863,864
< struct rtl8366rb_softc *sc = ifp->if_softc;
< struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
---
> struct rtl8366rb_softc *sc;
> struct mii_data *mii;
760a866,868
> sc = ifp->if_softc;
> mii = device_get_softc(sc->miibus[ifp->if_dunit]);
>