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if_ed.c (260050) if_ed.c (261528)
1/*-
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/ed/if_ed.c 260050 2013-12-29 19:21:59Z marius $");
29__FBSDID("$FreeBSD: head/sys/dev/ed/if_ed.c 261528 2014-02-05 22:21:08Z marius $");
30
31/*
32 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
33 * adapters. By David Greenman, 29-April-1993
34 *
35 * Currently supports the Western Digital/SMC 8003 and 8013 series,
36 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
37 * and a variety of similar clones.

--- 377 unchanged lines hidden (view full) ---

415static void
416ed_stop_hw(struct ed_softc *sc)
417{
418 int n = 5000;
419
420 /*
421 * Stop everything on the interface, and select page 0 registers.
422 */
30
31/*
32 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
33 * adapters. By David Greenman, 29-April-1993
34 *
35 * Currently supports the Western Digital/SMC 8003 and 8013 series,
36 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
37 * and a variety of similar clones.

--- 377 unchanged lines hidden (view full) ---

415static void
416ed_stop_hw(struct ed_softc *sc)
417{
418 int n = 5000;
419
420 /*
421 * Stop everything on the interface, and select page 0 registers.
422 */
423 ed_nic_barrier(sc, ED_P0_CR, 1,
424 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
423 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
425 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
426 ed_nic_barrier(sc, ED_P0_CR, 1,
427 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
424
425 /*
426 * Wait for interface to enter stopped state, but limit # of checks to
427 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
428 * just in case it's an old one.
429 *
430 * The AX88x90 chips don't seem to implement this behavor. The
431 * datasheets say it is only turned on when the chip enters a RESET

--- 91 unchanged lines hidden (view full) ---

523 sc->txb_next_tx = 0;
524
525 /* This variable is used below - don't move this assignment */
526 sc->next_packet = sc->rec_page_start + 1;
527
528 /*
529 * Set interface for page 0, Remote DMA complete, Stopped
530 */
428
429 /*
430 * Wait for interface to enter stopped state, but limit # of checks to
431 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
432 * just in case it's an old one.
433 *
434 * The AX88x90 chips don't seem to implement this behavor. The
435 * datasheets say it is only turned on when the chip enters a RESET

--- 91 unchanged lines hidden (view full) ---

527 sc->txb_next_tx = 0;
528
529 /* This variable is used below - don't move this assignment */
530 sc->next_packet = sc->rec_page_start + 1;
531
532 /*
533 * Set interface for page 0, Remote DMA complete, Stopped
534 */
535 ed_nic_barrier(sc, ED_P0_CR, 1,
536 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
531 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
537 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
538 ed_nic_barrier(sc, ED_P0_CR, 1,
539 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
532
533 if (sc->isa16bit)
534 /*
535 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
536 * order=80x86, word-wide DMA xfers,
537 */
538 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
539 else

--- 104 unchanged lines hidden (view full) ---

644{
645 unsigned short len;
646
647 len = sc->txb_len[sc->txb_next_tx];
648
649 /*
650 * Set NIC for page 0 register access
651 */
540
541 if (sc->isa16bit)
542 /*
543 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
544 * order=80x86, word-wide DMA xfers,
545 */
546 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
547 else

--- 104 unchanged lines hidden (view full) ---

652{
653 unsigned short len;
654
655 len = sc->txb_len[sc->txb_next_tx];
656
657 /*
658 * Set NIC for page 0 register access
659 */
660 ed_nic_barrier(sc, ED_P0_CR, 1,
661 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
652 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
662 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
663 ed_nic_barrier(sc, ED_P0_CR, 1,
664 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
653
654 /*
655 * Set TX buffer start page
656 */
657 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
658 sc->txb_next_tx * ED_TXBUF_SIZE);
659
660 /*
661 * Set TX length
662 */
663 ed_nic_outb(sc, ED_P0_TBCR0, len);
664 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
665
666 /*
667 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
668 */
665
666 /*
667 * Set TX buffer start page
668 */
669 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
670 sc->txb_next_tx * ED_TXBUF_SIZE);
671
672 /*
673 * Set TX length
674 */
675 ed_nic_outb(sc, ED_P0_TBCR0, len);
676 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
677
678 /*
679 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
680 */
681 ed_nic_barrier(sc, ED_P0_CR, 1,
682 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
669 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
683 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
684 ed_nic_barrier(sc, ED_P0_CR, 1,
685 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
670 sc->xmit_busy = 1;
671
672 /*
673 * Point to next transmit buffer slot and wrap if necessary.
674 */
675 sc->txb_next_tx++;
676 if (sc->txb_next_tx == sc->txb_cnt)
677 sc->txb_next_tx = 0;

--- 230 unchanged lines hidden (view full) ---

908 */
909 boundry = sc->next_packet - 1;
910 if (boundry < sc->rec_page_start)
911 boundry = sc->rec_page_stop - 1;
912
913 /*
914 * Set NIC to page 0 registers to update boundry register
915 */
686 sc->xmit_busy = 1;
687
688 /*
689 * Point to next transmit buffer slot and wrap if necessary.
690 */
691 sc->txb_next_tx++;
692 if (sc->txb_next_tx == sc->txb_cnt)
693 sc->txb_next_tx = 0;

--- 230 unchanged lines hidden (view full) ---

924 */
925 boundry = sc->next_packet - 1;
926 if (boundry < sc->rec_page_start)
927 boundry = sc->rec_page_stop - 1;
928
929 /*
930 * Set NIC to page 0 registers to update boundry register
931 */
932 ed_nic_barrier(sc, ED_P0_CR, 1,
933 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
916 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
934 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
935 ed_nic_barrier(sc, ED_P0_CR, 1,
936 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
917 ed_nic_outb(sc, ED_P0_BNRY, boundry);
918
919 /*
920 * Set NIC to page 1 registers before looping to top (prepare
921 * to get 'CURR' current pointer)
922 */
923 ed_nic_barrier(sc, ED_P0_CR, 1,
924 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);

--- 17 unchanged lines hidden (view full) ---

942 ED_LOCK(sc);
943 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
944 ED_UNLOCK(sc);
945 return;
946 }
947 /*
948 * Set NIC to page 0 registers
949 */
937 ed_nic_outb(sc, ED_P0_BNRY, boundry);
938
939 /*
940 * Set NIC to page 1 registers before looping to top (prepare
941 * to get 'CURR' current pointer)
942 */
943 ed_nic_barrier(sc, ED_P0_CR, 1,
944 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);

--- 17 unchanged lines hidden (view full) ---

962 ED_LOCK(sc);
963 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
964 ED_UNLOCK(sc);
965 return;
966 }
967 /*
968 * Set NIC to page 0 registers
969 */
970 ed_nic_barrier(sc, ED_P0_CR, 1,
971 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
950 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
972 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
973 ed_nic_barrier(sc, ED_P0_CR, 1,
974 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
951
952 /*
953 * loop until there are no more new interrupts. When the card goes
954 * away, the hardware will read back 0xff. Looking at the interrupts,
955 * it would appear that 0xff is impossible, or at least extremely
956 * unlikely.
957 */
958 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {

--- 201 unchanged lines hidden (view full) ---

1160 ed_start_locked(ifp);
1161
1162 /*
1163 * return NIC CR to standard state: page 0, remote DMA
1164 * complete, start (toggling the TXP bit off, even if was just
1165 * set in the transmit routine, is *okay* - it is 'edge'
1166 * triggered from low to high)
1167 */
975
976 /*
977 * loop until there are no more new interrupts. When the card goes
978 * away, the hardware will read back 0xff. Looking at the interrupts,
979 * it would appear that 0xff is impossible, or at least extremely
980 * unlikely.
981 */
982 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {

--- 201 unchanged lines hidden (view full) ---

1184 ed_start_locked(ifp);
1185
1186 /*
1187 * return NIC CR to standard state: page 0, remote DMA
1188 * complete, start (toggling the TXP bit off, even if was just
1189 * set in the transmit routine, is *okay* - it is 'edge'
1190 * triggered from low to high)
1191 */
1192 ed_nic_barrier(sc, ED_P0_CR, 1,
1193 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1168 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1194 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1195 ed_nic_barrier(sc, ED_P0_CR, 1,
1196 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1169
1170 /*
1171 * If the Network Talley Counters overflow, read them to reset
1172 * them. It appears that old 8390's won't clear the ISR flag
1173 * otherwise - resulting in an infinite loop.
1174 */
1175 if (isr & ED_ISR_CNT) {
1176 (void) ed_nic_inb(sc, ED_P0_CNTR0);

--- 185 unchanged lines hidden (view full) ---

1362 * This routine is currently Novell-specific.
1363 */
1364void
1365ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1366 uint16_t amount)
1367{
1368 /* Regular Novell cards */
1369 /* select page 0 registers */
1197
1198 /*
1199 * If the Network Talley Counters overflow, read them to reset
1200 * them. It appears that old 8390's won't clear the ISR flag
1201 * otherwise - resulting in an infinite loop.
1202 */
1203 if (isr & ED_ISR_CNT) {
1204 (void) ed_nic_inb(sc, ED_P0_CNTR0);

--- 185 unchanged lines hidden (view full) ---

1390 * This routine is currently Novell-specific.
1391 */
1392void
1393ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1394 uint16_t amount)
1395{
1396 /* Regular Novell cards */
1397 /* select page 0 registers */
1398 ed_nic_barrier(sc, ED_P0_CR, 1,
1399 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1370 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1400 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1401 ed_nic_barrier(sc, ED_P0_CR, 1,
1402 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1371
1372 /* round up to a word */
1373 if (amount & 1)
1374 ++amount;
1375
1376 /* set up DMA byte count */
1377 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1378 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);

--- 16 unchanged lines hidden (view full) ---

1395 * be even.
1396 */
1397void
1398ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1399{
1400 int maxwait = 200; /* about 240us */
1401
1402 /* select page 0 registers */
1403
1404 /* round up to a word */
1405 if (amount & 1)
1406 ++amount;
1407
1408 /* set up DMA byte count */
1409 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1410 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);

--- 16 unchanged lines hidden (view full) ---

1427 * be even.
1428 */
1429void
1430ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1431{
1432 int maxwait = 200; /* about 240us */
1433
1434 /* select page 0 registers */
1435 ed_nic_barrier(sc, ED_P0_CR, 1,
1436 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1403 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1437 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1438 ed_nic_barrier(sc, ED_P0_CR, 1,
1439 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1404
1405 /* reset remote DMA complete flag */
1406 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1407
1408 /* set up DMA byte count */
1409 ed_nic_outb(sc, ED_P0_RBCR0, len);
1410 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1411

--- 40 unchanged lines hidden (view full) ---

1452 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1453 total_len += mp->m_len;
1454
1455 dma_len = total_len;
1456 if (sc->isa16bit && (dma_len & 1))
1457 dma_len++;
1458
1459 /* select page 0 registers */
1440
1441 /* reset remote DMA complete flag */
1442 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1443
1444 /* set up DMA byte count */
1445 ed_nic_outb(sc, ED_P0_RBCR0, len);
1446 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1447

--- 40 unchanged lines hidden (view full) ---

1488 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1489 total_len += mp->m_len;
1490
1491 dma_len = total_len;
1492 if (sc->isa16bit && (dma_len & 1))
1493 dma_len++;
1494
1495 /* select page 0 registers */
1496 ed_nic_barrier(sc, ED_P0_CR, 1,
1497 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1460 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1498 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1499 ed_nic_barrier(sc, ED_P0_CR, 1,
1500 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1461
1462 /* reset remote DMA complete flag */
1463 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1464
1465 /* set up DMA byte count */
1466 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1467 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1468

--- 113 unchanged lines hidden (view full) ---

1582 for (i = 0; i < 8; i++)
1583 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1584
1585 /*
1586 * And turn on promiscuous mode. Also enable reception of
1587 * runts and packets with CRC & alignment errors.
1588 */
1589 /* Set page 0 registers */
1501
1502 /* reset remote DMA complete flag */
1503 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1504
1505 /* set up DMA byte count */
1506 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1507 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1508

--- 113 unchanged lines hidden (view full) ---

1622 for (i = 0; i < 8; i++)
1623 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1624
1625 /*
1626 * And turn on promiscuous mode. Also enable reception of
1627 * runts and packets with CRC & alignment errors.
1628 */
1629 /* Set page 0 registers */
1630 ed_nic_barrier(sc, ED_P0_CR, 1,
1631 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1590 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1632 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1633 ed_nic_barrier(sc, ED_P0_CR, 1,
1634 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1591
1592 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1593 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1594 } else {
1595 /* set up multicast addresses and filter modes */
1596 if (ifp->if_flags & IFF_MULTICAST) {
1597 uint32_t mcaf[2];
1598

--- 5 unchanged lines hidden (view full) ---

1604
1605 /*
1606 * Set multicast filter on chip.
1607 */
1608 for (i = 0; i < 8; i++)
1609 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1610
1611 /* Set page 0 registers */
1635
1636 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1637 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1638 } else {
1639 /* set up multicast addresses and filter modes */
1640 if (ifp->if_flags & IFF_MULTICAST) {
1641 uint32_t mcaf[2];
1642

--- 5 unchanged lines hidden (view full) ---

1648
1649 /*
1650 * Set multicast filter on chip.
1651 */
1652 for (i = 0; i < 8; i++)
1653 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1654
1655 /* Set page 0 registers */
1656 ed_nic_barrier(sc, ED_P0_CR, 1,
1657 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1612 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1658 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1659 ed_nic_barrier(sc, ED_P0_CR, 1,
1660 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1613
1614 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1615 } else {
1616
1617 /*
1618 * Initialize multicast address hashing registers to
1619 * not accept multicasts.
1620 */
1621 for (i = 0; i < 8; ++i)
1622 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1623
1624 /* Set page 0 registers */
1661
1662 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1663 } else {
1664
1665 /*
1666 * Initialize multicast address hashing registers to
1667 * not accept multicasts.
1668 */
1669 for (i = 0; i < 8; ++i)
1670 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1671
1672 /* Set page 0 registers */
1673 ed_nic_barrier(sc, ED_P0_CR, 1,
1674 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1625 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1626
1627 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1628 }
1629 }
1630
1631 /*
1632 * Start interface.

--- 173 unchanged lines hidden --- 		1675 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1676
1677 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1678 }
1679 }
1680
1681 /*
1682 * Start interface.

--- 173 unchanged lines hidden ---