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r600_cs.c (258780) r600_cs.c (280183)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 13 unchanged lines hidden (view full) ---

22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29#include <sys/cdefs.h>
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 13 unchanged lines hidden (view full) ---

22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/drm2/radeon/r600_cs.c 258780 2013-11-30 22:17:27Z eadler $");
30__FBSDID("$FreeBSD: head/sys/dev/drm2/radeon/r600_cs.c 280183 2015-03-17 18:50:33Z dumbbell $");
31
32#include <dev/drm2/drmP.h>
33#include "radeon.h"
34#include "radeon_asic.h"
35#include "r600d.h"
36#include "r600_reg_safe.h"
37#include "r600_cp.h"
38#include "r600_cs.h"
39
40static int r600_cs_packet_next_reloc_mm(struct radeon_cs_parser *p,
41 struct radeon_cs_reloc **cs_reloc);
42static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p,
43 struct radeon_cs_reloc **cs_reloc);
44typedef int (*next_reloc_t)(struct radeon_cs_parser*, struct radeon_cs_reloc**);
45static next_reloc_t r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_mm;
31
32#include <dev/drm2/drmP.h>
33#include "radeon.h"
34#include "radeon_asic.h"
35#include "r600d.h"
36#include "r600_reg_safe.h"
37#include "r600_cp.h"
38#include "r600_cs.h"
39
40static int r600_cs_packet_next_reloc_mm(struct radeon_cs_parser *p,
41 struct radeon_cs_reloc **cs_reloc);
42static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p,
43 struct radeon_cs_reloc **cs_reloc);
44typedef int (*next_reloc_t)(struct radeon_cs_parser*, struct radeon_cs_reloc**);
45static next_reloc_t r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_mm;
46#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */
47extern void r600_cs_legacy_get_tiling_conf(struct drm_device *dev, u32 *npipes, u32 *nbanks, u32 *group_size);
48#endif
46
47
48struct r600_cs_track {
49 /* configuration we miror so that we use same code btw kms/ums */
50 u32 group_size;
51 u32 nbanks;
52 u32 npipes;
53 /* value we track */

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181 [V_038004_FMT_BC7] = { 4, 4, 16, 0, CHIP_CEDAR}, /* Evergreen-only */
182
183 /* The other Evergreen formats */
184 [V_038004_FMT_32_AS_32_32_32_32] = { 1, 1, 4, 0, CHIP_CEDAR},
185};
186
187bool r600_fmt_is_valid_color(u32 format)
188{
49
50
51struct r600_cs_track {
52 /* configuration we miror so that we use same code btw kms/ums */
53 u32 group_size;
54 u32 nbanks;
55 u32 npipes;
56 /* value we track */

--- 127 unchanged lines hidden (view full) ---

184 [V_038004_FMT_BC7] = { 4, 4, 16, 0, CHIP_CEDAR}, /* Evergreen-only */
185
186 /* The other Evergreen formats */
187 [V_038004_FMT_32_AS_32_32_32_32] = { 1, 1, 4, 0, CHIP_CEDAR},
188};
189
190bool r600_fmt_is_valid_color(u32 format)
191{
189 if (format >= DRM_ARRAY_SIZE(color_formats_table))
192 if (format >= ARRAY_SIZE(color_formats_table))
190 return false;
191
192 if (color_formats_table[format].valid_color)
193 return true;
194
195 return false;
196}
197
198bool r600_fmt_is_valid_texture(u32 format, enum radeon_family family)
199{
193 return false;
194
195 if (color_formats_table[format].valid_color)
196 return true;
197
198 return false;
199}
200
201bool r600_fmt_is_valid_texture(u32 format, enum radeon_family family)
202{
200 if (format >= DRM_ARRAY_SIZE(color_formats_table))
203 if (format >= ARRAY_SIZE(color_formats_table))
201 return false;
202
203 if (family < color_formats_table[format].min_family)
204 return false;
205
206 if (color_formats_table[format].blockwidth > 0)
207 return true;
208
209 return false;
210}
211
212int r600_fmt_get_blocksize(u32 format)
213{
204 return false;
205
206 if (family < color_formats_table[format].min_family)
207 return false;
208
209 if (color_formats_table[format].blockwidth > 0)
210 return true;
211
212 return false;
213}
214
215int r600_fmt_get_blocksize(u32 format)
216{
214 if (format >= DRM_ARRAY_SIZE(color_formats_table))
217 if (format >= ARRAY_SIZE(color_formats_table))
215 return 0;
216
217 return color_formats_table[format].blocksize;
218}
219
220int r600_fmt_get_nblocksx(u32 format, u32 w)
221{
222 unsigned bw;
223
218 return 0;
219
220 return color_formats_table[format].blocksize;
221}
222
223int r600_fmt_get_nblocksx(u32 format, u32 w)
224{
225 unsigned bw;
226
224 if (format >= DRM_ARRAY_SIZE(color_formats_table))
227 if (format >= ARRAY_SIZE(color_formats_table))
225 return 0;
226
227 bw = color_formats_table[format].blockwidth;
228 if (bw == 0)
229 return 0;
230
231 return (w + bw - 1) / bw;
232}
233
234int r600_fmt_get_nblocksy(u32 format, u32 h)
235{
236 unsigned bh;
237
228 return 0;
229
230 bw = color_formats_table[format].blockwidth;
231 if (bw == 0)
232 return 0;
233
234 return (w + bw - 1) / bw;
235}
236
237int r600_fmt_get_nblocksy(u32 format, u32 h)
238{
239 unsigned bh;
240
238 if (format >= DRM_ARRAY_SIZE(color_formats_table))
241 if (format >= ARRAY_SIZE(color_formats_table))
239 return 0;
240
241 bh = color_formats_table[format].blockheight;
242 if (bh == 0)
243 return 0;
244
245 return (h + bh - 1) / bh;
246}

--- 865 unchanged lines hidden (view full) ---

1112static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
1113{
1114 struct r600_cs_track *track = (struct r600_cs_track *)p->track;
1115 struct radeon_cs_reloc *reloc;
1116 u32 m, i, tmp, *ib;
1117 int r;
1118
1119 i = (reg >> 7);
242 return 0;
243
244 bh = color_formats_table[format].blockheight;
245 if (bh == 0)
246 return 0;
247
248 return (h + bh - 1) / bh;
249}

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1115static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
1116{
1117 struct r600_cs_track *track = (struct r600_cs_track *)p->track;
1118 struct radeon_cs_reloc *reloc;
1119 u32 m, i, tmp, *ib;
1120 int r;
1121
1122 i = (reg >> 7);
1120 if (i >= DRM_ARRAY_SIZE(r600_reg_safe_bm)) {
1123 if (i >= ARRAY_SIZE(r600_reg_safe_bm)) {
1121 dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
1122 return -EINVAL;
1123 }
1124 m = 1 << ((reg >> 2) & 31);
1125 if (!(r600_reg_safe_bm[i] & m))
1126 return 0;
1127 ib = p->ib.ptr;
1128 switch (reg) {

--- 607 unchanged lines hidden (view full) ---

1736 return 0;
1737}
1738
1739static bool r600_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
1740{
1741 u32 m, i;
1742
1743 i = (reg >> 7);
1124 dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
1125 return -EINVAL;
1126 }
1127 m = 1 << ((reg >> 2) & 31);
1128 if (!(r600_reg_safe_bm[i] & m))
1129 return 0;
1130 ib = p->ib.ptr;
1131 switch (reg) {

--- 607 unchanged lines hidden (view full) ---

1739 return 0;
1740}
1741
1742static bool r600_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
1743{
1744 u32 m, i;
1745
1746 i = (reg >> 7);
1744 if (i >= DRM_ARRAY_SIZE(r600_reg_safe_bm)) {
1747 if (i >= ARRAY_SIZE(r600_reg_safe_bm)) {
1745 dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
1746 return false;
1747 }
1748 m = 1 << ((reg >> 2) & 31);
1749 if (!(r600_reg_safe_bm[i] & m))
1750 return true;
1751 dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
1752 return false;

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2395{
2396 struct radeon_cs_packet pkt;
2397 struct r600_cs_track *track;
2398 int r;
2399
2400 if (p->track == NULL) {
2401 /* initialize tracker, we are in kms */
2402 track = malloc(sizeof(*track),
1748 dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
1749 return false;
1750 }
1751 m = 1 << ((reg >> 2) & 31);
1752 if (!(r600_reg_safe_bm[i] & m))
1753 return true;
1754 dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
1755 return false;

--- 642 unchanged lines hidden (view full) ---

2398{
2399 struct radeon_cs_packet pkt;
2400 struct r600_cs_track *track;
2401 int r;
2402
2403 if (p->track == NULL) {
2404 /* initialize tracker, we are in kms */
2405 track = malloc(sizeof(*track),
2403 DRM_MEM_DRIVER, M_ZERO | M_WAITOK);
2406 DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
2404 if (track == NULL)
2405 return -ENOMEM;
2406 r600_cs_track_init(track);
2407 if (p->rdev->family < CHIP_RV770) {
2408 track->npipes = p->rdev->config.r600.tiling_npipes;
2409 track->nbanks = p->rdev->config.r600.tiling_nbanks;
2410 track->group_size = p->rdev->config.r600.tiling_group_size;
2411 } else if (p->rdev->family <= CHIP_RV740) {

--- 30 unchanged lines hidden (view full) ---

2442 free(p->track, DRM_MEM_DRIVER);
2443 p->track = NULL;
2444 return r;
2445 }
2446 } while (p->idx < p->chunks[p->chunk_ib_idx].length_dw);
2447#if 0
2448 for (r = 0; r < p->ib.length_dw; r++) {
2449 DRM_INFO("%05d 0x%08X\n", r, p->ib.ptr[r]);
2407 if (track == NULL)
2408 return -ENOMEM;
2409 r600_cs_track_init(track);
2410 if (p->rdev->family < CHIP_RV770) {
2411 track->npipes = p->rdev->config.r600.tiling_npipes;
2412 track->nbanks = p->rdev->config.r600.tiling_nbanks;
2413 track->group_size = p->rdev->config.r600.tiling_group_size;
2414 } else if (p->rdev->family <= CHIP_RV740) {

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2445 free(p->track, DRM_MEM_DRIVER);
2446 p->track = NULL;
2447 return r;
2448 }
2449 } while (p->idx < p->chunks[p->chunk_ib_idx].length_dw);
2450#if 0
2451 for (r = 0; r < p->ib.length_dw; r++) {
2452 DRM_INFO("%05d 0x%08X\n", r, p->ib.ptr[r]);
2450 DRM_MDELAY(1);
2453 mdelay(1);
2451 }
2452#endif
2453 free(p->track, DRM_MEM_DRIVER);
2454 p->track = NULL;
2455 return 0;
2456}
2457
2458static int r600_cs_parser_relocs_legacy(struct radeon_cs_parser *p)
2459{
2460 if (p->chunk_relocs_idx == -1) {
2461 return 0;
2462 }
2463 p->relocs = malloc(sizeof(struct radeon_cs_reloc),
2454 }
2455#endif
2456 free(p->track, DRM_MEM_DRIVER);
2457 p->track = NULL;
2458 return 0;
2459}
2460
2461static int r600_cs_parser_relocs_legacy(struct radeon_cs_parser *p)
2462{
2463 if (p->chunk_relocs_idx == -1) {
2464 return 0;
2465 }
2466 p->relocs = malloc(sizeof(struct radeon_cs_reloc),
2464 DRM_MEM_DRIVER, M_ZERO | M_WAITOK);
2467 DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
2465 if (p->relocs == NULL) {
2466 return -ENOMEM;
2467 }
2468 return 0;
2469}
2470
2471/**
2472 * cs_parser_fini() - clean parser states

--- 24 unchanged lines hidden (view full) ---

2497 unsigned family, u32 *ib, int *l)
2498{
2499 struct radeon_cs_parser parser;
2500 struct radeon_cs_chunk *ib_chunk;
2501 struct r600_cs_track *track;
2502 int r;
2503
2504 /* initialize tracker */
2468 if (p->relocs == NULL) {
2469 return -ENOMEM;
2470 }
2471 return 0;
2472}
2473
2474/**
2475 * cs_parser_fini() - clean parser states

--- 24 unchanged lines hidden (view full) ---

2500 unsigned family, u32 *ib, int *l)
2501{
2502 struct radeon_cs_parser parser;
2503 struct radeon_cs_chunk *ib_chunk;
2504 struct r600_cs_track *track;
2505 int r;
2506
2507 /* initialize tracker */
2505 track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_ZERO | M_WAITOK);
2508 track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
2506 if (track == NULL)
2507 return -ENOMEM;
2508 r600_cs_track_init(track);
2509 r600_cs_legacy_get_tiling_conf(dev, &track->npipes, &track->nbanks, &track->group_size);
2510 /* initialize parser */
2511 memset(&parser, 0, sizeof(struct radeon_cs_parser));
2512 parser.filp = filp;
2509 if (track == NULL)
2510 return -ENOMEM;
2511 r600_cs_track_init(track);
2512 r600_cs_legacy_get_tiling_conf(dev, &track->npipes, &track->nbanks, &track->group_size);
2513 /* initialize parser */
2514 memset(&parser, 0, sizeof(struct radeon_cs_parser));
2515 parser.filp = filp;
2513 parser.dev = dev->device;
2516 parser.dev = dev->dev;
2514 parser.rdev = NULL;
2515 parser.family = family;
2516 parser.track = track;
2517 parser.ib.ptr = ib;
2518 r = radeon_cs_parser_init(&parser, data);
2519 if (r) {
2520 DRM_ERROR("Failed to initialize parser !\n");
2521 r600_cs_parser_fini(&parser, r);

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2749 default:
2750 DRM_ERROR("Unknown packet type %d at %d !\n", cmd, idx);
2751 return -EINVAL;
2752 }
2753 } while (p->idx < p->chunks[p->chunk_ib_idx].length_dw);
2754#if 0
2755 for (r = 0; r < p->ib->length_dw; r++) {
2756 DRM_INFO("%05d 0x%08X\n", r, p->ib.ptr[r]);
2517 parser.rdev = NULL;
2518 parser.family = family;
2519 parser.track = track;
2520 parser.ib.ptr = ib;
2521 r = radeon_cs_parser_init(&parser, data);
2522 if (r) {
2523 DRM_ERROR("Failed to initialize parser !\n");
2524 r600_cs_parser_fini(&parser, r);

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2752 default:
2753 DRM_ERROR("Unknown packet type %d at %d !\n", cmd, idx);
2754 return -EINVAL;
2755 }
2756 } while (p->idx < p->chunks[p->chunk_ib_idx].length_dw);
2757#if 0
2758 for (r = 0; r < p->ib->length_dw; r++) {
2759 DRM_INFO("%05d 0x%08X\n", r, p->ib.ptr[r]);
2757 DRM_MDELAY(1);
2760 mdelay(1);
2758 }
2759#endif
2760 return 0;
2761}
2761 }
2762#endif
2763 return 0;
2764}