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intel_display.c (277959) intel_display.c (280183)
1/*
2 * Copyright �� 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <sys/cdefs.h>
1/*
2 * Copyright �� 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/drm2/i915/intel_display.c 277959 2015-01-31 02:13:25Z adrian $");
28__FBSDID("$FreeBSD: head/sys/dev/drm2/i915/intel_display.c 280183 2015-03-17 18:50:33Z dumbbell $");
29
30#include <dev/drm2/drmP.h>
31#include <dev/drm2/drm.h>
32#include <dev/drm2/i915/i915_drm.h>
33#include <dev/drm2/i915/i915_drv.h>
34#include <dev/drm2/i915/intel_drv.h>
35#include <dev/drm2/drm_edid.h>
36#include <dev/drm2/drm_dp_helper.h>

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2046}
2047
2048static int
2049intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
2050 struct drm_framebuffer *old_fb)
2051{
2052 struct drm_device *dev = crtc->dev;
2053 struct drm_i915_private *dev_priv = dev->dev_private;
29
30#include <dev/drm2/drmP.h>
31#include <dev/drm2/drm.h>
32#include <dev/drm2/i915/i915_drm.h>
33#include <dev/drm2/i915/i915_drv.h>
34#include <dev/drm2/i915/intel_drv.h>
35#include <dev/drm2/drm_edid.h>
36#include <dev/drm2/drm_dp_helper.h>

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2046}
2047
2048static int
2049intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
2050 struct drm_framebuffer *old_fb)
2051{
2052 struct drm_device *dev = crtc->dev;
2053 struct drm_i915_private *dev_priv = dev->dev_private;
2054#if 0
2055 struct drm_i915_master_private *master_priv;
2054 struct drm_i915_master_private *master_priv;
2056#endif
2057 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
2058 int ret;
2059
2060 /* no fb bound */
2061 if (!crtc->fb) {
2062 DRM_ERROR("No FB bound\n");
2063 return 0;
2064 }

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2094 if (old_fb) {
2095 intel_wait_for_vblank(dev, intel_crtc->pipe);
2096 intel_unpin_fb_obj(to_intel_framebuffer(old_fb)->obj);
2097 }
2098
2099 intel_update_fbc(dev);
2100 DRM_UNLOCK(dev);
2101
2055 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
2056 int ret;
2057
2058 /* no fb bound */
2059 if (!crtc->fb) {
2060 DRM_ERROR("No FB bound\n");
2061 return 0;
2062 }

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2092 if (old_fb) {
2093 intel_wait_for_vblank(dev, intel_crtc->pipe);
2094 intel_unpin_fb_obj(to_intel_framebuffer(old_fb)->obj);
2095 }
2096
2097 intel_update_fbc(dev);
2098 DRM_UNLOCK(dev);
2099
2102#if 0
2103 if (!dev->primary->master)
2104 return 0;
2105
2106 master_priv = dev->primary->master->driver_priv;
2107 if (!master_priv->sarea_priv)
2108 return 0;
2109
2110 if (intel_crtc->pipe) {
2111 master_priv->sarea_priv->pipeB_x = x;
2112 master_priv->sarea_priv->pipeB_y = y;
2113 } else {
2114 master_priv->sarea_priv->pipeA_x = x;
2115 master_priv->sarea_priv->pipeA_y = y;
2116 }
2100 if (!dev->primary->master)
2101 return 0;
2102
2103 master_priv = dev->primary->master->driver_priv;
2104 if (!master_priv->sarea_priv)
2105 return 0;
2106
2107 if (intel_crtc->pipe) {
2108 master_priv->sarea_priv->pipeB_x = x;
2109 master_priv->sarea_priv->pipeB_y = y;
2110 } else {
2111 master_priv->sarea_priv->pipeA_x = x;
2112 master_priv->sarea_priv->pipeA_y = y;
2113 }
2117#else
2118
2114
2119 if (!dev_priv->sarea_priv)
2120 return 0;
2121
2122 if (intel_crtc->pipe) {
2123 dev_priv->sarea_priv->planeB_x = x;
2124 dev_priv->sarea_priv->planeB_y = y;
2125 } else {
2126 dev_priv->sarea_priv->planeA_x = x;
2127 dev_priv->sarea_priv->planeA_y = y;
2128 }
2129#endif
2130
2131 return 0;
2132}
2133
2134static void ironlake_set_pll_edp(struct drm_crtc *crtc, int clock)
2135{
2136 struct drm_device *dev = crtc->dev;
2137 struct drm_i915_private *dev_priv = dev->dev_private;
2138 u32 dpa_ctl;

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3324
3325/**
3326 * Sets the power management mode of the pipe and plane.
3327 */
3328static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
3329{
3330 struct drm_device *dev = crtc->dev;
3331 struct drm_i915_private *dev_priv = dev->dev_private;
2115 return 0;
2116}
2117
2118static void ironlake_set_pll_edp(struct drm_crtc *crtc, int clock)
2119{
2120 struct drm_device *dev = crtc->dev;
2121 struct drm_i915_private *dev_priv = dev->dev_private;
2122 u32 dpa_ctl;

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3308
3309/**
3310 * Sets the power management mode of the pipe and plane.
3311 */
3312static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
3313{
3314 struct drm_device *dev = crtc->dev;
3315 struct drm_i915_private *dev_priv = dev->dev_private;
3332#if 0
3333 struct drm_i915_master_private *master_priv;
3316 struct drm_i915_master_private *master_priv;
3334#endif
3335 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3336 int pipe = intel_crtc->pipe;
3337 bool enabled;
3338
3339 if (intel_crtc->dpms_mode == mode)
3340 return;
3341
3342 intel_crtc->dpms_mode = mode;
3343
3344 dev_priv->display.dpms(crtc, mode);
3345
3317 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3318 int pipe = intel_crtc->pipe;
3319 bool enabled;
3320
3321 if (intel_crtc->dpms_mode == mode)
3322 return;
3323
3324 intel_crtc->dpms_mode = mode;
3325
3326 dev_priv->display.dpms(crtc, mode);
3327
3346#if 0
3347 if (!dev->primary->master)
3348 return;
3349
3350 master_priv = dev->primary->master->driver_priv;
3351 if (!master_priv->sarea_priv)
3352 return;
3328 if (!dev->primary->master)
3329 return;
3330
3331 master_priv = dev->primary->master->driver_priv;
3332 if (!master_priv->sarea_priv)
3333 return;
3353#else
3354 if (!dev_priv->sarea_priv)
3355 return;
3356#endif
3357
3358 enabled = crtc->enabled && mode != DRM_MODE_DPMS_OFF;
3359
3360 switch (pipe) {
3361 case 0:
3334
3335 enabled = crtc->enabled && mode != DRM_MODE_DPMS_OFF;
3336
3337 switch (pipe) {
3338 case 0:
3362#if 0
3363 master_priv->sarea_priv->pipeA_w = enabled ? crtc->mode.hdisplay : 0;
3364 master_priv->sarea_priv->pipeA_h = enabled ? crtc->mode.vdisplay : 0;
3339 master_priv->sarea_priv->pipeA_w = enabled ? crtc->mode.hdisplay : 0;
3340 master_priv->sarea_priv->pipeA_h = enabled ? crtc->mode.vdisplay : 0;
3365#else
3366 dev_priv->sarea_priv->planeA_w = enabled ? crtc->mode.hdisplay : 0;
3367 dev_priv->sarea_priv->planeA_h = enabled ? crtc->mode.vdisplay : 0;
3368#endif
3369 break;
3370 case 1:
3341 break;
3342 case 1:
3371#if 0
3372 master_priv->sarea_priv->pipeB_w = enabled ? crtc->mode.hdisplay : 0;
3373 master_priv->sarea_priv->pipeB_h = enabled ? crtc->mode.vdisplay : 0;
3343 master_priv->sarea_priv->pipeB_w = enabled ? crtc->mode.hdisplay : 0;
3344 master_priv->sarea_priv->pipeB_h = enabled ? crtc->mode.vdisplay : 0;
3374#else
3375 dev_priv->sarea_priv->planeB_w = enabled ? crtc->mode.hdisplay : 0;
3376 dev_priv->sarea_priv->planeB_h = enabled ? crtc->mode.vdisplay : 0;
3377#endif
3378 break;
3379 default:
3380 DRM_ERROR("Can't update pipe %c in SAREA\n", pipe_name(pipe));
3381 break;
3382 }
3383}
3384
3385static void intel_crtc_disable(struct drm_crtc *crtc)

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3497{
3498 return 200000;
3499}
3500
3501static int i915gm_get_display_clock_speed(struct drm_device *dev)
3502{
3503 u16 gcfgc = 0;
3504
3345 break;
3346 default:
3347 DRM_ERROR("Can't update pipe %c in SAREA\n", pipe_name(pipe));
3348 break;
3349 }
3350}
3351
3352static void intel_crtc_disable(struct drm_crtc *crtc)

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3464{
3465 return 200000;
3466}
3467
3468static int i915gm_get_display_clock_speed(struct drm_device *dev)
3469{
3470 u16 gcfgc = 0;
3471
3505 gcfgc = pci_read_config(dev->device, GCFGC, 2);
3472 gcfgc = pci_read_config(dev->dev, GCFGC, 2);
3506
3507 if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
3508 return 133000;
3509 else {
3510 switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
3511 case GC_DISPLAY_CLOCK_333_MHZ:
3512 return 333000;
3513 default:

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6941};
6942
6943static void intel_init_quirks(struct drm_device *dev)
6944{
6945 struct intel_quirk *q;
6946 device_t d;
6947 int i;
6948
3473
3474 if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
3475 return 133000;
3476 else {
3477 switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
3478 case GC_DISPLAY_CLOCK_333_MHZ:
3479 return 333000;
3480 default:

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6908};
6909
6910static void intel_init_quirks(struct drm_device *dev)
6911{
6912 struct intel_quirk *q;
6913 device_t d;
6914 int i;
6915
6949 d = dev->device;
6950 for (i = 0; i < DRM_ARRAY_SIZE(intel_quirks); i++) {
6916 d = dev->dev;
6917 for (i = 0; i < ARRAY_SIZE(intel_quirks); i++) {
6951 q = &intel_quirks[i];
6952 if (pci_get_device(d) == q->device &&
6953 (pci_get_subvendor(d) == q->subsystem_vendor ||
6954 q->subsystem_vendor == PCI_ANY_ID) &&
6955 (pci_get_subdevice(d) == q->subsystem_device ||
6956 q->subsystem_device == PCI_ANY_ID))
6957 q->hook(dev);
6958 }

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7111 gen6_disable_rps(dev);
7112
7113 if (IS_IRONLAKE_M(dev))
7114 ironlake_disable_rc6(dev);
7115
7116 if (IS_VALLEYVIEW(dev))
7117 vlv_init_dpio(dev);
7118
6918 q = &intel_quirks[i];
6919 if (pci_get_device(d) == q->device &&
6920 (pci_get_subvendor(d) == q->subsystem_vendor ||
6921 q->subsystem_vendor == PCI_ANY_ID) &&
6922 (pci_get_subdevice(d) == q->subsystem_device ||
6923 q->subsystem_device == PCI_ANY_ID))
6924 q->hook(dev);
6925 }

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7078 gen6_disable_rps(dev);
7079
7080 if (IS_IRONLAKE_M(dev))
7081 ironlake_disable_rc6(dev);
7082
7083 if (IS_VALLEYVIEW(dev))
7084 vlv_init_dpio(dev);
7085
7086 DRM_UNLOCK(dev);
7087
7119 /* Disable the irq before mode object teardown, for the irq might
7120 * enqueue unpin/hotplug work. */
7121 drm_irq_uninstall(dev);
7088 /* Disable the irq before mode object teardown, for the irq might
7089 * enqueue unpin/hotplug work. */
7090 drm_irq_uninstall(dev);
7122 DRM_UNLOCK(dev);
7123
7124 if (taskqueue_cancel(dev_priv->tq, &dev_priv->hotplug_task, NULL))
7125 taskqueue_drain(dev_priv->tq, &dev_priv->hotplug_task);
7126 if (taskqueue_cancel(dev_priv->tq, &dev_priv->rps_task, NULL))
7127 taskqueue_drain(dev_priv->tq, &dev_priv->rps_task);
7128
7129 /* Shut off idle work before the crtcs get freed. */
7130 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

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7092 if (taskqueue_cancel(dev_priv->tq, &dev_priv->hotplug_task, NULL))
7093 taskqueue_drain(dev_priv->tq, &dev_priv->hotplug_task);
7094 if (taskqueue_cancel(dev_priv->tq, &dev_priv->rps_task, NULL))
7095 taskqueue_drain(dev_priv->tq, &dev_priv->rps_task);
7096
7097 /* Shut off idle work before the crtcs get freed. */
7098 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

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