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i915_gem_gtt.c (271705) i915_gem_gtt.c (277487)
1/*
2 * Copyright �� 2010 Daniel Vetter
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25#include <sys/cdefs.h>
1/*
2 * Copyright �� 2010 Daniel Vetter
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

--- 9 unchanged lines hidden (view full) ---

18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25#include <sys/cdefs.h>
26__FBSDID("$FreeBSD: head/sys/dev/drm2/i915/i915_gem_gtt.c 271705 2014-09-17 08:28:50Z dumbbell $");
26__FBSDID("$FreeBSD: head/sys/dev/drm2/i915/i915_gem_gtt.c 277487 2015-01-21 16:10:37Z kib $");
27
28#include <dev/drm2/drmP.h>
29#include <dev/drm2/drm.h>
30#include <dev/drm2/i915/i915_drm.h>
31#include <dev/drm2/i915/i915_drv.h>
32#include <dev/drm2/i915/intel_drv.h>
33#include <sys/sched.h>
34#include <sys/sf_buf.h>

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240
241static bool
242do_idling(struct drm_i915_private *dev_priv)
243{
244 bool ret = dev_priv->mm.interruptible;
245
246 if (dev_priv->mm.gtt.do_idle_maps) {
247 dev_priv->mm.interruptible = false;
27
28#include <dev/drm2/drmP.h>
29#include <dev/drm2/drm.h>
30#include <dev/drm2/i915/i915_drm.h>
31#include <dev/drm2/i915/i915_drv.h>
32#include <dev/drm2/i915/intel_drv.h>
33#include <sys/sched.h>
34#include <sys/sf_buf.h>

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240
241static bool
242do_idling(struct drm_i915_private *dev_priv)
243{
244 bool ret = dev_priv->mm.interruptible;
245
246 if (dev_priv->mm.gtt.do_idle_maps) {
247 dev_priv->mm.interruptible = false;
248 if (i915_gpu_idle(dev_priv->dev, false)) {
248 if (i915_gpu_idle(dev_priv->dev)) {
249 DRM_ERROR("Couldn't idle GPU\n");
250 /* Wait a bit, in hopes it avoids the hang */
251 DELAY(10);
252 }
253 }
254
255 return ret;
256}

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272 dev_priv = dev->dev_private;
273
274 /* First fill our portion of the GTT with scratch pages */
275 intel_gtt_clear_range(dev_priv->mm.gtt_start / PAGE_SIZE,
276 (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);
277
278 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
279 i915_gem_clflush_object(obj);
249 DRM_ERROR("Couldn't idle GPU\n");
250 /* Wait a bit, in hopes it avoids the hang */
251 DELAY(10);
252 }
253 }
254
255 return ret;
256}

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272 dev_priv = dev->dev_private;
273
274 /* First fill our portion of the GTT with scratch pages */
275 intel_gtt_clear_range(dev_priv->mm.gtt_start / PAGE_SIZE,
276 (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);
277
278 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
279 i915_gem_clflush_object(obj);
280 i915_gem_gtt_rebind_object(obj, obj->cache_level);
280 i915_gem_gtt_bind_object(obj, obj->cache_level);
281 }
282
283 intel_gtt_chipset_flush();
284}
285
286int
281 }
282
283 intel_gtt_chipset_flush();
284}
285
286int
287i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj)
287i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)
288{
288{
289 unsigned int agp_type;
290
289
291 agp_type = cache_level_to_agp_type(obj->base.dev, obj->cache_level);
292 intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT,
293 obj->base.size >> PAGE_SHIFT, obj->pages, agp_type);
294
295 obj->has_global_gtt_mapping = 1;
296
297 return (0);
298}
299
300void
290 return (0);
291}
292
293void
301i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj,
294i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,
302 enum i915_cache_level cache_level)
303{
304 struct drm_device *dev;
305 struct drm_i915_private *dev_priv;
306 unsigned int agp_type;
307
308 dev = obj->base.dev;
309 dev_priv = dev->dev_private;
310 agp_type = cache_level_to_agp_type(dev, cache_level);
311
312 intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT,
313 obj->base.size >> PAGE_SHIFT, obj->pages, agp_type);
314
295 enum i915_cache_level cache_level)
296{
297 struct drm_device *dev;
298 struct drm_i915_private *dev_priv;
299 unsigned int agp_type;
300
301 dev = obj->base.dev;
302 dev_priv = dev->dev_private;
303 agp_type = cache_level_to_agp_type(dev, cache_level);
304
305 intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT,
306 obj->base.size >> PAGE_SHIFT, obj->pages, agp_type);
307
315 obj->has_global_gtt_mapping = 0;
308 obj->has_global_gtt_mapping = 1;
316}
317
318void
319i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)
320{
309}
310
311void
312i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)
313{
314
315 intel_gtt_clear_range(obj->gtt_space->start >> PAGE_SHIFT,
316 obj->base.size >> PAGE_SHIFT);
317
318 obj->has_global_gtt_mapping = 0;
319}
320
321void
322i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj)
323{
321 struct drm_device *dev = obj->base.dev;
322 struct drm_i915_private *dev_priv = dev->dev_private;
323 bool interruptible;
324
325 dev = obj->base.dev;
326 dev_priv = dev->dev_private;
327
328 interruptible = do_idling(dev_priv);
329
324 struct drm_device *dev = obj->base.dev;
325 struct drm_i915_private *dev_priv = dev->dev_private;
326 bool interruptible;
327
328 dev = obj->base.dev;
329 dev_priv = dev->dev_private;
330
331 interruptible = do_idling(dev_priv);
332
330 intel_gtt_clear_range(obj->gtt_space->start >> PAGE_SHIFT,
331 obj->base.size >> PAGE_SHIFT);
332
333 undo_idling(dev_priv, interruptible);
334}
333 undo_idling(dev_priv, interruptible);
334}
335
336int
337i915_gem_init_global_gtt(struct drm_device *dev, unsigned long start,
338 unsigned long mappable_end, unsigned long end)
339{
340 drm_i915_private_t *dev_priv;
341 unsigned long mappable;
342 int error;
343
344 dev_priv = dev->dev_private;
345 mappable = min(end, mappable_end) - start;
346
347 /* Substract the guard page ... */
348 drm_mm_init(&dev_priv->mm.gtt_space, start, end - start - PAGE_SIZE);
349
350 dev_priv->mm.gtt_start = start;
351 dev_priv->mm.gtt_mappable_end = mappable_end;
352 dev_priv->mm.gtt_end = end;
353 dev_priv->mm.gtt_total = end - start;
354 dev_priv->mm.mappable_gtt_total = mappable;
355
356 /* ... but ensure that we clear the entire range. */
357 intel_gtt_clear_range(start / PAGE_SIZE, (end-start) / PAGE_SIZE);
358 device_printf(dev->device,
359 "taking over the fictitious range 0x%lx-0x%lx\n",
360 dev->agp->base + start, dev->agp->base + start + mappable);
361 error = -vm_phys_fictitious_reg_range(dev->agp->base + start,
362 dev->agp->base + start + mappable, VM_MEMATTR_WRITE_COMBINING);
363 return (error);
364}