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mga_state.c (97683) mga_state.c (112015)
1/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*-
2 * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a

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21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Jeff Hartmann <jhartmann@valinux.com>
1/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*-
2 * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a

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21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keithw@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 * Rewritten by:
32 * Gareth Hughes <gareth@valinux.com>
33 *
30 *
31 * Rewritten by:
32 * Gareth Hughes <gareth@valinux.com>
33 *
34 * $FreeBSD: head/sys/dev/drm/mga_state.c 97683 2002-05-31 23:19:50Z anholt $
34 * $FreeBSD: head/sys/dev/drm/mga_state.c 112015 2003-03-09 02:08:30Z anholt $
35 */
36
35 */
36
37#define __NO_VERSION__
38#include "dev/drm/mga.h"
39#include "dev/drm/drmP.h"
37#include "dev/drm/mga.h"
38#include "dev/drm/drmP.h"
39#include "dev/drm/drm.h"
40#include "dev/drm/mga_drm.h"
41#include "dev/drm/mga_drv.h"
40#include "dev/drm/mga_drm.h"
41#include "dev/drm/mga_drv.h"
42#include "dev/drm/drm.h"
43
44
45/* ================================================================
46 * DMA hardware state programming functions
47 */
48
49static void mga_emit_clip_rect( drm_mga_private_t *dev_priv,
50 drm_clip_rect_t *box )

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161}
162
163static __inline__ void mga_g400_emit_tex0( drm_mga_private_t *dev_priv )
164{
165 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
166 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
167 DMA_LOCALS;
168
42
43
44/* ================================================================
45 * DMA hardware state programming functions
46 */
47
48static void mga_emit_clip_rect( drm_mga_private_t *dev_priv,
49 drm_clip_rect_t *box )

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160}
161
162static __inline__ void mga_g400_emit_tex0( drm_mga_private_t *dev_priv )
163{
164 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
165 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
166 DMA_LOCALS;
167
168/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */
169/* tex->texctl, tex->texctl2); */
170
169 BEGIN_DMA( 6 );
170
171 DMA_BLOCK( MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC,
172 MGA_TEXCTL, tex->texctl,
173 MGA_TEXFILTER, tex->texfilter,
174 MGA_TEXBORDERCOL, tex->texbordercol );
175
176 DMA_BLOCK( MGA_TEXORG, tex->texorg,

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202}
203
204static __inline__ void mga_g400_emit_tex1( drm_mga_private_t *dev_priv )
205{
206 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
207 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
208 DMA_LOCALS;
209
171 BEGIN_DMA( 6 );
172
173 DMA_BLOCK( MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC,
174 MGA_TEXCTL, tex->texctl,
175 MGA_TEXFILTER, tex->texfilter,
176 MGA_TEXBORDERCOL, tex->texbordercol );
177
178 DMA_BLOCK( MGA_TEXORG, tex->texorg,

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204}
205
206static __inline__ void mga_g400_emit_tex1( drm_mga_private_t *dev_priv )
207{
208 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
209 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
210 DMA_LOCALS;
211
212/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */
213/* tex->texctl, tex->texctl2); */
214
210 BEGIN_DMA( 5 );
211
212 DMA_BLOCK( MGA_TEXCTL2, (tex->texctl2 |
213 MGA_MAP1_ENABLE |
214 MGA_G400_TC2_MAGIC),
215 MGA_TEXCTL, tex->texctl,
216 MGA_TEXFILTER, tex->texfilter,
217 MGA_TEXBORDERCOL, tex->texbordercol );

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270}
271
272static __inline__ void mga_g400_emit_pipe( drm_mga_private_t *dev_priv )
273{
274 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
275 unsigned int pipe = sarea_priv->warp_pipe;
276 DMA_LOCALS;
277
215 BEGIN_DMA( 5 );
216
217 DMA_BLOCK( MGA_TEXCTL2, (tex->texctl2 |
218 MGA_MAP1_ENABLE |
219 MGA_G400_TC2_MAGIC),
220 MGA_TEXCTL, tex->texctl,
221 MGA_TEXFILTER, tex->texfilter,
222 MGA_TEXBORDERCOL, tex->texbordercol );

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275}
276
277static __inline__ void mga_g400_emit_pipe( drm_mga_private_t *dev_priv )
278{
279 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
280 unsigned int pipe = sarea_priv->warp_pipe;
281 DMA_LOCALS;
282
283/* printk("mga_g400_emit_pipe %x\n", pipe); */
284
278 BEGIN_DMA( 10 );
279
280 DMA_BLOCK( MGA_WIADDR2, MGA_WMODE_SUSPEND,
281 MGA_DMAPAD, 0x00000000,
282 MGA_DMAPAD, 0x00000000,
283 MGA_DMAPAD, 0x00000000 );
284
285 if ( pipe & MGA_T2 ) {

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410 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
411
412 if ( ctx->dstorg != dev_priv->front_offset &&
413 ctx->dstorg != dev_priv->back_offset ) {
414 DRM_ERROR( "*** bad DSTORG: %x (front %x, back %x)\n\n",
415 ctx->dstorg, dev_priv->front_offset,
416 dev_priv->back_offset );
417 ctx->dstorg = 0;
285 BEGIN_DMA( 10 );
286
287 DMA_BLOCK( MGA_WIADDR2, MGA_WMODE_SUSPEND,
288 MGA_DMAPAD, 0x00000000,
289 MGA_DMAPAD, 0x00000000,
290 MGA_DMAPAD, 0x00000000 );
291
292 if ( pipe & MGA_T2 ) {

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417 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
418
419 if ( ctx->dstorg != dev_priv->front_offset &&
420 ctx->dstorg != dev_priv->back_offset ) {
421 DRM_ERROR( "*** bad DSTORG: %x (front %x, back %x)\n\n",
422 ctx->dstorg, dev_priv->front_offset,
423 dev_priv->back_offset );
424 ctx->dstorg = 0;
418 return DRM_OS_ERR(EINVAL);
425 return DRM_ERR(EINVAL);
419 }
420
421 return 0;
422}
423
424/* Disallow texture reads from PCI space.
425 */
426static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit )
427{
428 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
429 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
430 unsigned int org;
431
432 org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK);
433
434 if ( org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI) ) {
435 DRM_ERROR( "*** bad TEXORG: 0x%x, unit %d\n",
436 tex->texorg, unit );
437 tex->texorg = 0;
426 }
427
428 return 0;
429}
430
431/* Disallow texture reads from PCI space.
432 */
433static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit )
434{
435 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
436 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
437 unsigned int org;
438
439 org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK);
440
441 if ( org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI) ) {
442 DRM_ERROR( "*** bad TEXORG: 0x%x, unit %d\n",
443 tex->texorg, unit );
444 tex->texorg = 0;
438 return DRM_OS_ERR(EINVAL);
445 return DRM_ERR(EINVAL);
439 }
440
441 return 0;
442}
443
444static int mga_verify_state( drm_mga_private_t *dev_priv )
445{
446 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;

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472
473static int mga_verify_iload( drm_mga_private_t *dev_priv,
474 unsigned int dstorg, unsigned int length )
475{
476 if ( dstorg < dev_priv->texture_offset ||
477 dstorg + length > (dev_priv->texture_offset +
478 dev_priv->texture_size) ) {
479 DRM_ERROR( "*** bad iload DSTORG: 0x%x\n", dstorg );
446 }
447
448 return 0;
449}
450
451static int mga_verify_state( drm_mga_private_t *dev_priv )
452{
453 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;

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479
480static int mga_verify_iload( drm_mga_private_t *dev_priv,
481 unsigned int dstorg, unsigned int length )
482{
483 if ( dstorg < dev_priv->texture_offset ||
484 dstorg + length > (dev_priv->texture_offset +
485 dev_priv->texture_size) ) {
486 DRM_ERROR( "*** bad iload DSTORG: 0x%x\n", dstorg );
480 return DRM_OS_ERR(EINVAL);
487 return DRM_ERR(EINVAL);
481 }
482
483 if ( length & MGA_ILOAD_MASK ) {
484 DRM_ERROR( "*** bad iload length: 0x%x\n",
485 length & MGA_ILOAD_MASK );
488 }
489
490 if ( length & MGA_ILOAD_MASK ) {
491 DRM_ERROR( "*** bad iload length: 0x%x\n",
492 length & MGA_ILOAD_MASK );
486 return DRM_OS_ERR(EINVAL);
493 return DRM_ERR(EINVAL);
487 }
488
489 return 0;
490}
491
492static int mga_verify_blit( drm_mga_private_t *dev_priv,
493 unsigned int srcorg, unsigned int dstorg )
494{
495 if ( (srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
496 (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ) {
497 DRM_ERROR( "*** bad blit: src=0x%x dst=0x%x\n",
498 srcorg, dstorg );
494 }
495
496 return 0;
497}
498
499static int mga_verify_blit( drm_mga_private_t *dev_priv,
500 unsigned int srcorg, unsigned int dstorg )
501{
502 if ( (srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
503 (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ) {
504 DRM_ERROR( "*** bad blit: src=0x%x dst=0x%x\n",
505 srcorg, dstorg );
499 return DRM_OS_ERR(EINVAL);
506 return DRM_ERR(EINVAL);
500 }
501 return 0;
502}
503
504
505/* ================================================================
506 *
507 */
508
509static void mga_dma_dispatch_clear( drm_device_t *dev,
510 drm_mga_clear_t *clear )
511{
512 drm_mga_private_t *dev_priv = dev->dev_private;
513 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
514 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
515 drm_clip_rect_t *pbox = sarea_priv->boxes;
516 int nbox = sarea_priv->nbox;
517 int i;
518 DMA_LOCALS;
507 }
508 return 0;
509}
510
511
512/* ================================================================
513 *
514 */
515
516static void mga_dma_dispatch_clear( drm_device_t *dev,
517 drm_mga_clear_t *clear )
518{
519 drm_mga_private_t *dev_priv = dev->dev_private;
520 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
521 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
522 drm_clip_rect_t *pbox = sarea_priv->boxes;
523 int nbox = sarea_priv->nbox;
524 int i;
525 DMA_LOCALS;
519 DRM_DEBUG( "%s:\n", __func__ );
526 DRM_DEBUG( "\n" );
520
521 BEGIN_DMA( 1 );
522
523 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
524 MGA_DMAPAD, 0x00000000,
525 MGA_DWGSYNC, 0x00007100,
526 MGA_DWGSYNC, 0x00007000 );
527

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605{
606 drm_mga_private_t *dev_priv = dev->dev_private;
607 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
608 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
609 drm_clip_rect_t *pbox = sarea_priv->boxes;
610 int nbox = sarea_priv->nbox;
611 int i;
612 DMA_LOCALS;
527
528 BEGIN_DMA( 1 );
529
530 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
531 MGA_DMAPAD, 0x00000000,
532 MGA_DWGSYNC, 0x00007100,
533 MGA_DWGSYNC, 0x00007000 );
534

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612{
613 drm_mga_private_t *dev_priv = dev->dev_private;
614 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
615 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
616 drm_clip_rect_t *pbox = sarea_priv->boxes;
617 int nbox = sarea_priv->nbox;
618 int i;
619 DMA_LOCALS;
613 DRM_DEBUG( "%s:\n", __func__ );
620 DRM_DEBUG( "\n" );
614
615 sarea_priv->last_frame.head = dev_priv->prim.tail;
616 sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
617
618 BEGIN_DMA( 4 + nbox );
619
620 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
621 MGA_DMAPAD, 0x00000000,

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651 MGA_PLNWT, ctx->plnwt,
652 MGA_SRCORG, dev_priv->front_offset,
653 MGA_DWGCTL, ctx->dwgctl );
654
655 ADVANCE_DMA();
656
657 FLUSH_DMA();
658
621
622 sarea_priv->last_frame.head = dev_priv->prim.tail;
623 sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
624
625 BEGIN_DMA( 4 + nbox );
626
627 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
628 MGA_DMAPAD, 0x00000000,

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658 MGA_PLNWT, ctx->plnwt,
659 MGA_SRCORG, dev_priv->front_offset,
660 MGA_DWGCTL, ctx->dwgctl );
661
662 ADVANCE_DMA();
663
664 FLUSH_DMA();
665
659 DRM_DEBUG( "%s... done.\n", __func__ );
666 DRM_DEBUG( "%s... done.\n", __FUNCTION__ );
660}
661
662static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
663{
664 drm_mga_private_t *dev_priv = dev->dev_private;
665 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
666 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
667 u32 address = (u32) buf->bus_address;

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759 unsigned int dstorg, unsigned int length )
760{
761 drm_mga_private_t *dev_priv = dev->dev_private;
762 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
763 drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;
764 u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;
765 u32 y2;
766 DMA_LOCALS;
667}
668
669static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
670{
671 drm_mga_private_t *dev_priv = dev->dev_private;
672 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
673 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
674 u32 address = (u32) buf->bus_address;

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766 unsigned int dstorg, unsigned int length )
767{
768 drm_mga_private_t *dev_priv = dev->dev_private;
769 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
770 drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;
771 u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;
772 u32 y2;
773 DMA_LOCALS;
767 DRM_DEBUG( "%s: buf=%d used=%d\n",
768 __func__, buf->idx, buf->used );
774 DRM_DEBUG( "buf=%d used=%d\n", buf->idx, buf->used );
769
770 y2 = length / 64;
771
772 BEGIN_DMA( 5 );
773
774 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
775 MGA_DMAPAD, 0x00000000,
776 MGA_DWGSYNC, 0x00007100,

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814{
815 drm_mga_private_t *dev_priv = dev->dev_private;
816 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
817 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
818 drm_clip_rect_t *pbox = sarea_priv->boxes;
819 int nbox = sarea_priv->nbox;
820 u32 scandir = 0, i;
821 DMA_LOCALS;
775
776 y2 = length / 64;
777
778 BEGIN_DMA( 5 );
779
780 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
781 MGA_DMAPAD, 0x00000000,
782 MGA_DWGSYNC, 0x00007100,

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820{
821 drm_mga_private_t *dev_priv = dev->dev_private;
822 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
823 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
824 drm_clip_rect_t *pbox = sarea_priv->boxes;
825 int nbox = sarea_priv->nbox;
826 u32 scandir = 0, i;
827 DMA_LOCALS;
822 DRM_DEBUG( "%s:\n", __func__ );
828 DRM_DEBUG( "\n" );
823
824 BEGIN_DMA( 4 + nbox );
825
826 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
827 MGA_DMAPAD, 0x00000000,
828 MGA_DWGSYNC, 0x00007100,
829 MGA_DWGSYNC, 0x00007000 );
830

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871 ADVANCE_DMA();
872}
873
874
875/* ================================================================
876 *
877 */
878
829
830 BEGIN_DMA( 4 + nbox );
831
832 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
833 MGA_DMAPAD, 0x00000000,
834 MGA_DWGSYNC, 0x00007100,
835 MGA_DWGSYNC, 0x00007000 );
836

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877 ADVANCE_DMA();
878}
879
880
881/* ================================================================
882 *
883 */
884
879int mga_dma_clear( DRM_OS_IOCTL )
885int mga_dma_clear( DRM_IOCTL_ARGS )
880{
886{
881 DRM_OS_DEVICE;
887 DRM_DEVICE;
882 drm_mga_private_t *dev_priv = dev->dev_private;
883 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
884 drm_mga_clear_t clear;
885
886 LOCK_TEST_WITH_RETURN( dev );
887
888 drm_mga_private_t *dev_priv = dev->dev_private;
889 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
890 drm_mga_clear_t clear;
891
892 LOCK_TEST_WITH_RETURN( dev );
893
888 DRM_OS_KRNFROMUSR( clear, (drm_mga_clear_t *) data, sizeof(clear) );
894 DRM_COPY_FROM_USER_IOCTL( clear, (drm_mga_clear_t *)data, sizeof(clear) );
889
890 if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
891 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
892
893 WRAP_TEST_WITH_RETURN( dev_priv );
894
895 mga_dma_dispatch_clear( dev, &clear );
896
897 /* Make sure we restore the 3D state next time.
898 */
899 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
900
901 return 0;
902}
903
895
896 if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
897 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
898
899 WRAP_TEST_WITH_RETURN( dev_priv );
900
901 mga_dma_dispatch_clear( dev, &clear );
902
903 /* Make sure we restore the 3D state next time.
904 */
905 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
906
907 return 0;
908}
909
904int mga_dma_swap( DRM_OS_IOCTL )
910int mga_dma_swap( DRM_IOCTL_ARGS )
905{
911{
906 DRM_OS_DEVICE;
912 DRM_DEVICE;
907 drm_mga_private_t *dev_priv = dev->dev_private;
908 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
909
910 LOCK_TEST_WITH_RETURN( dev );
911
912 if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
913 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
914
915 WRAP_TEST_WITH_RETURN( dev_priv );
916
917 mga_dma_dispatch_swap( dev );
918
919 /* Make sure we restore the 3D state next time.
920 */
921 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
922
923 return 0;
924}
925
913 drm_mga_private_t *dev_priv = dev->dev_private;
914 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
915
916 LOCK_TEST_WITH_RETURN( dev );
917
918 if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
919 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
920
921 WRAP_TEST_WITH_RETURN( dev_priv );
922
923 mga_dma_dispatch_swap( dev );
924
925 /* Make sure we restore the 3D state next time.
926 */
927 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
928
929 return 0;
930}
931
926int mga_dma_vertex( DRM_OS_IOCTL )
932int mga_dma_vertex( DRM_IOCTL_ARGS )
927{
933{
928 DRM_OS_DEVICE;
934 DRM_DEVICE;
929 drm_mga_private_t *dev_priv = dev->dev_private;
930 drm_device_dma_t *dma = dev->dma;
931 drm_buf_t *buf;
932 drm_mga_buf_priv_t *buf_priv;
933 drm_mga_vertex_t vertex;
934
935 LOCK_TEST_WITH_RETURN( dev );
936
935 drm_mga_private_t *dev_priv = dev->dev_private;
936 drm_device_dma_t *dma = dev->dma;
937 drm_buf_t *buf;
938 drm_mga_buf_priv_t *buf_priv;
939 drm_mga_vertex_t vertex;
940
941 LOCK_TEST_WITH_RETURN( dev );
942
937 DRM_OS_KRNFROMUSR( vertex, (drm_mga_vertex_t *) data, sizeof(vertex) );
943 DRM_COPY_FROM_USER_IOCTL( vertex,
944 (drm_mga_vertex_t *)data,
945 sizeof(vertex) );
938
946
939 if(vertex.idx < 0 || vertex.idx > dma->buf_count) return DRM_OS_ERR(EINVAL);
947 if(vertex.idx < 0 || vertex.idx > dma->buf_count) return DRM_ERR(EINVAL);
940 buf = dma->buflist[vertex.idx];
941 buf_priv = buf->dev_private;
942
943 buf->used = vertex.used;
944 buf_priv->discard = vertex.discard;
945
946 if ( !mga_verify_state( dev_priv ) ) {
947 if ( vertex.discard ) {
948 if ( buf_priv->dispatched == 1 )
949 AGE_BUFFER( buf_priv );
950 buf_priv->dispatched = 0;
951 mga_freelist_put( dev, buf );
952 }
948 buf = dma->buflist[vertex.idx];
949 buf_priv = buf->dev_private;
950
951 buf->used = vertex.used;
952 buf_priv->discard = vertex.discard;
953
954 if ( !mga_verify_state( dev_priv ) ) {
955 if ( vertex.discard ) {
956 if ( buf_priv->dispatched == 1 )
957 AGE_BUFFER( buf_priv );
958 buf_priv->dispatched = 0;
959 mga_freelist_put( dev, buf );
960 }
953 return DRM_OS_ERR(EINVAL);
961 return DRM_ERR(EINVAL);
954 }
955
956 WRAP_TEST_WITH_RETURN( dev_priv );
957
958 mga_dma_dispatch_vertex( dev, buf );
959
960 return 0;
961}
962
962 }
963
964 WRAP_TEST_WITH_RETURN( dev_priv );
965
966 mga_dma_dispatch_vertex( dev, buf );
967
968 return 0;
969}
970
963int mga_dma_indices( DRM_OS_IOCTL )
971int mga_dma_indices( DRM_IOCTL_ARGS )
964{
972{
965 DRM_OS_DEVICE;
973 DRM_DEVICE;
966 drm_mga_private_t *dev_priv = dev->dev_private;
967 drm_device_dma_t *dma = dev->dma;
968 drm_buf_t *buf;
969 drm_mga_buf_priv_t *buf_priv;
970 drm_mga_indices_t indices;
971
972 LOCK_TEST_WITH_RETURN( dev );
973
974 drm_mga_private_t *dev_priv = dev->dev_private;
975 drm_device_dma_t *dma = dev->dma;
976 drm_buf_t *buf;
977 drm_mga_buf_priv_t *buf_priv;
978 drm_mga_indices_t indices;
979
980 LOCK_TEST_WITH_RETURN( dev );
981
974 DRM_OS_KRNFROMUSR( indices, (drm_mga_indices_t *) data, sizeof(indices) );
982 DRM_COPY_FROM_USER_IOCTL( indices,
983 (drm_mga_indices_t *)data,
984 sizeof(indices) );
975
985
976 if(indices.idx < 0 || indices.idx > dma->buf_count) return DRM_OS_ERR(EINVAL);
986 if(indices.idx < 0 || indices.idx > dma->buf_count) return DRM_ERR(EINVAL);
977
978 buf = dma->buflist[indices.idx];
979 buf_priv = buf->dev_private;
980
981 buf_priv->discard = indices.discard;
982
983 if ( !mga_verify_state( dev_priv ) ) {
984 if ( indices.discard ) {
985 if ( buf_priv->dispatched == 1 )
986 AGE_BUFFER( buf_priv );
987 buf_priv->dispatched = 0;
988 mga_freelist_put( dev, buf );
989 }
987
988 buf = dma->buflist[indices.idx];
989 buf_priv = buf->dev_private;
990
991 buf_priv->discard = indices.discard;
992
993 if ( !mga_verify_state( dev_priv ) ) {
994 if ( indices.discard ) {
995 if ( buf_priv->dispatched == 1 )
996 AGE_BUFFER( buf_priv );
997 buf_priv->dispatched = 0;
998 mga_freelist_put( dev, buf );
999 }
990 return DRM_OS_ERR(EINVAL);
1000 return DRM_ERR(EINVAL);
991 }
992
993 WRAP_TEST_WITH_RETURN( dev_priv );
994
995 mga_dma_dispatch_indices( dev, buf, indices.start, indices.end );
996
997 return 0;
998}
999
1001 }
1002
1003 WRAP_TEST_WITH_RETURN( dev_priv );
1004
1005 mga_dma_dispatch_indices( dev, buf, indices.start, indices.end );
1006
1007 return 0;
1008}
1009
1000int mga_dma_iload( DRM_OS_IOCTL )
1010int mga_dma_iload( DRM_IOCTL_ARGS )
1001{
1011{
1002 DRM_OS_DEVICE;
1012 DRM_DEVICE;
1003 drm_device_dma_t *dma = dev->dma;
1004 drm_mga_private_t *dev_priv = dev->dev_private;
1005 drm_buf_t *buf;
1006 drm_mga_buf_priv_t *buf_priv;
1007 drm_mga_iload_t iload;
1013 drm_device_dma_t *dma = dev->dma;
1014 drm_mga_private_t *dev_priv = dev->dev_private;
1015 drm_buf_t *buf;
1016 drm_mga_buf_priv_t *buf_priv;
1017 drm_mga_iload_t iload;
1008 DRM_DEBUG( "%s:\n", __func__ );
1018 DRM_DEBUG( "\n" );
1009
1010 LOCK_TEST_WITH_RETURN( dev );
1011
1019
1020 LOCK_TEST_WITH_RETURN( dev );
1021
1012 DRM_OS_KRNFROMUSR( iload, (drm_mga_iload_t *) data, sizeof(iload) );
1022 DRM_COPY_FROM_USER_IOCTL( iload, (drm_mga_iload_t *)data, sizeof(iload) );
1013
1014#if 0
1023
1024#if 0
1015 if ( mga_do_wait_for_idle( dev_priv ) ) {
1025 if ( mga_do_wait_for_idle( dev_priv ) < 0 ) {
1016 if ( MGA_DMA_DEBUG )
1026 if ( MGA_DMA_DEBUG )
1017 DRM_INFO( "%s: -EBUSY\n", __func__ );
1018 return DRM_OS_ERR(EBUSY);
1027 DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
1028 return DRM_ERR(EBUSY);
1019 }
1020#endif
1029 }
1030#endif
1021 if(iload.idx < 0 || iload.idx > dma->buf_count) return DRM_OS_ERR(EINVAL);
1031 if(iload.idx < 0 || iload.idx > dma->buf_count) return DRM_ERR(EINVAL);
1022
1023 buf = dma->buflist[iload.idx];
1024 buf_priv = buf->dev_private;
1025
1026 if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) {
1027 mga_freelist_put( dev, buf );
1032
1033 buf = dma->buflist[iload.idx];
1034 buf_priv = buf->dev_private;
1035
1036 if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) {
1037 mga_freelist_put( dev, buf );
1028 return DRM_OS_ERR(EINVAL);
1038 return DRM_ERR(EINVAL);
1029 }
1030
1031 WRAP_TEST_WITH_RETURN( dev_priv );
1032
1033 mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length );
1034
1035 /* Make sure we restore the 3D state next time.
1036 */
1037 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
1038
1039 return 0;
1040}
1041
1039 }
1040
1041 WRAP_TEST_WITH_RETURN( dev_priv );
1042
1043 mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length );
1044
1045 /* Make sure we restore the 3D state next time.
1046 */
1047 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
1048
1049 return 0;
1050}
1051
1042int mga_dma_blit( DRM_OS_IOCTL )
1052int mga_dma_blit( DRM_IOCTL_ARGS )
1043{
1053{
1044 DRM_OS_DEVICE;
1054 DRM_DEVICE;
1045 drm_mga_private_t *dev_priv = dev->dev_private;
1046 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
1047 drm_mga_blit_t blit;
1055 drm_mga_private_t *dev_priv = dev->dev_private;
1056 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
1057 drm_mga_blit_t blit;
1048 DRM_DEBUG( "%s:\n", __func__ );
1058 DRM_DEBUG( "\n" );
1049
1050 LOCK_TEST_WITH_RETURN( dev );
1051
1059
1060 LOCK_TEST_WITH_RETURN( dev );
1061
1052 DRM_OS_KRNFROMUSR( blit, (drm_mga_blit_t *) data, sizeof(blit) );
1062 DRM_COPY_FROM_USER_IOCTL( blit, (drm_mga_blit_t *)data, sizeof(blit) );
1053
1054 if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
1055 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
1056
1057 if ( mga_verify_blit( dev_priv, blit.srcorg, blit.dstorg ) )
1063
1064 if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
1065 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
1066
1067 if ( mga_verify_blit( dev_priv, blit.srcorg, blit.dstorg ) )
1058 return DRM_OS_ERR(EINVAL);
1068 return DRM_ERR(EINVAL);
1059
1060 WRAP_TEST_WITH_RETURN( dev_priv );
1061
1062 mga_dma_dispatch_blit( dev, &blit );
1063
1064 /* Make sure we restore the 3D state next time.
1065 */
1066 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
1067
1068 return 0;
1069}
1069
1070 WRAP_TEST_WITH_RETURN( dev_priv );
1071
1072 mga_dma_dispatch_blit( dev, &blit );
1073
1074 /* Make sure we restore the 3D state next time.
1075 */
1076 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
1077
1078 return 0;
1079}
1080
1081int mga_getparam( DRM_IOCTL_ARGS )
1082{
1083 DRM_DEVICE;
1084 drm_mga_private_t *dev_priv = dev->dev_private;
1085 drm_mga_getparam_t param;
1086 int value;
1087
1088 if ( !dev_priv ) {
1089 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
1090 return DRM_ERR(EINVAL);
1091 }
1092
1093 DRM_COPY_FROM_USER_IOCTL( param, (drm_mga_getparam_t *)data,
1094 sizeof(param) );
1095
1096 DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
1097
1098 switch( param.param ) {
1099 case MGA_PARAM_IRQ_NR:
1100 value = dev->irq;
1101 break;
1102 default:
1103 return DRM_ERR(EINVAL);
1104 }
1105
1106 if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
1107 DRM_ERROR( "copy_to_user\n" );
1108 return DRM_ERR(EFAULT);
1109 }
1110
1111 return 0;
1112}