| t4_netmap.c (269413) | t4_netmap.c (270063) |
|---|---|
| 1/*- 2 * Copyright (c) 2014 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2014 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> |
| 29__FBSDID("$FreeBSD: head/sys/dev/cxgbe/t4_netmap.c 269413 2014-08-02 01:48:25Z np $"); | 29__FBSDID("$FreeBSD: head/sys/dev/cxgbe/t4_netmap.c 270063 2014-08-16 15:00:01Z luigi $"); |
| 30 31#include "opt_inet.h" 32#include "opt_inet6.h" 33 34#ifdef DEV_NETMAP 35#include <sys/param.h> 36#include <sys/eventhandler.h> 37#include <sys/lock.h> --- 391 unchanged lines hidden (view full) --- 429 ASSERT_SYNCHRONIZED_OP(sc); 430 431 if ((pi->flags & PORT_INIT_DONE) == 0 || 432 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 433 return (EAGAIN); 434 435 hwb = &sc->sge.hw_buf_info[0]; 436 for (i = 0; i < SGE_FLBUF_SIZES; i++, hwb++) { | 30 31#include "opt_inet.h" 32#include "opt_inet6.h" 33 34#ifdef DEV_NETMAP 35#include <sys/param.h> 36#include <sys/eventhandler.h> 37#include <sys/lock.h> --- 391 unchanged lines hidden (view full) --- 429 ASSERT_SYNCHRONIZED_OP(sc); 430 431 if ((pi->flags & PORT_INIT_DONE) == 0 || 432 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 433 return (EAGAIN); 434 435 hwb = &sc->sge.hw_buf_info[0]; 436 for (i = 0; i < SGE_FLBUF_SIZES; i++, hwb++) { |
| 437 if (hwb->size == NETMAP_BUF_SIZE) | 437 if (hwb->size == NETMAP_BUF_SIZE(na)) |
| 438 break; 439 } 440 if (i >= SGE_FLBUF_SIZES) { 441 if_printf(ifp, "no hwidx for netmap buffer size %d.\n", | 438 break; 439 } 440 if (i >= SGE_FLBUF_SIZES) { 441 if_printf(ifp, "no hwidx for netmap buffer size %d.\n", |
| 442 NETMAP_BUF_SIZE); | 442 NETMAP_BUF_SIZE(na)); |
| 443 return (ENXIO); 444 } 445 hwidx = i; 446 447 /* Must set caps before calling netmap_reset */ | 443 return (ENXIO); 444 } 445 hwidx = i; 446 447 /* Must set caps before calling netmap_reset */ |
| 448 na->na_flags |= (NAF_NATIVE_ON | NAF_NETMAP_ON); 449 ifp->if_capenable |= IFCAP_NETMAP; | 448 nm_set_native_flags(na); |
| 450 451 for_each_nm_rxq(pi, i, nm_rxq) { 452 alloc_nm_rxq_hwq(pi, nm_rxq); 453 nm_rxq->fl_hwidx = hwidx; 454 slot = netmap_reset(na, NR_RX, i, 0); 455 MPASS(slot != NULL); /* XXXNM: error check, not assert */ 456 457 /* We deal with 8 bufs at a time */ 458 MPASS((na->num_rx_desc & 7) == 0); 459 MPASS(na->num_rx_desc == nm_rxq->fl_sidx); 460 for (j = 0; j < nm_rxq->fl_sidx - 8; j++) { 461 uint64_t ba; 462 | 449 450 for_each_nm_rxq(pi, i, nm_rxq) { 451 alloc_nm_rxq_hwq(pi, nm_rxq); 452 nm_rxq->fl_hwidx = hwidx; 453 slot = netmap_reset(na, NR_RX, i, 0); 454 MPASS(slot != NULL); /* XXXNM: error check, not assert */ 455 456 /* We deal with 8 bufs at a time */ 457 MPASS((na->num_rx_desc & 7) == 0); 458 MPASS(na->num_rx_desc == nm_rxq->fl_sidx); 459 for (j = 0; j < nm_rxq->fl_sidx - 8; j++) { 460 uint64_t ba; 461 |
| 463 PNMB(&slot[j], &ba); | 462 PNMB(na, &slot[j], &ba); |
| 464 nm_rxq->fl_desc[j] = htobe64(ba | hwidx); 465 } 466 nm_rxq->fl_pidx = j; 467 MPASS((j & 7) == 0); 468 j /= 8; /* driver pidx to hardware pidx */ 469 wmb(); 470 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL), 471 nm_rxq->fl_db_val | V_PIDX(j)); --- 35 unchanged lines hidden (view full) --- 507 struct sge_nm_txq *nm_txq; 508 struct sge_nm_rxq *nm_rxq; 509 510 ASSERT_SYNCHRONIZED_OP(sc); 511 512 rc = -t4_enable_vi(sc, sc->mbox, pi->nm_viid, false, false); 513 if (rc != 0) 514 if_printf(ifp, "netmap disable_vi failed: %d\n", rc); | 463 nm_rxq->fl_desc[j] = htobe64(ba | hwidx); 464 } 465 nm_rxq->fl_pidx = j; 466 MPASS((j & 7) == 0); 467 j /= 8; /* driver pidx to hardware pidx */ 468 wmb(); 469 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL), 470 nm_rxq->fl_db_val | V_PIDX(j)); --- 35 unchanged lines hidden (view full) --- 506 struct sge_nm_txq *nm_txq; 507 struct sge_nm_rxq *nm_rxq; 508 509 ASSERT_SYNCHRONIZED_OP(sc); 510 511 rc = -t4_enable_vi(sc, sc->mbox, pi->nm_viid, false, false); 512 if (rc != 0) 513 if_printf(ifp, "netmap disable_vi failed: %d\n", rc); |
| 515 na->na_flags &= ~(NAF_NATIVE_ON | NAF_NETMAP_ON); 516 ifp->if_capenable &= ~IFCAP_NETMAP; | 514 nm_clear_native_flags(na); |
| 517 518 /* 519 * XXXNM: We need to make sure that the tx queues are quiet and won't 520 * request any more SGE_EGR_UPDATEs. 521 */ 522 523 for_each_nm_txq(pi, i, nm_txq) { 524 free_nm_txq_hwq(pi, nm_txq); --- 139 unchanged lines hidden (view full) --- 664 wr->equiq_to_len16 = htobe32(V_FW_WR_LEN16(npkt_to_len16(n))); 665 wr->npkt = n; 666 wr->r3 = 0; 667 wr->type = 1; 668 cpl = (void *)(wr + 1); 669 670 for (i = 0; i < n; i++) { 671 slot = &ring->slot[kring->nr_hwcur]; | 515 516 /* 517 * XXXNM: We need to make sure that the tx queues are quiet and won't 518 * request any more SGE_EGR_UPDATEs. 519 */ 520 521 for_each_nm_txq(pi, i, nm_txq) { 522 free_nm_txq_hwq(pi, nm_txq); --- 139 unchanged lines hidden (view full) --- 662 wr->equiq_to_len16 = htobe32(V_FW_WR_LEN16(npkt_to_len16(n))); 663 wr->npkt = n; 664 wr->r3 = 0; 665 wr->type = 1; 666 cpl = (void *)(wr + 1); 667 668 for (i = 0; i < n; i++) { 669 slot = &ring->slot[kring->nr_hwcur]; |
| 672 PNMB(slot, &ba); | 670 PNMB(kring->na, slot, &ba); |
| 673 674 cpl->ctrl0 = nm_txq->cpl_ctrl0; 675 cpl->pack = 0; 676 cpl->len = htobe16(slot->len); 677 /* 678 * netmap(4) says "netmap does not use features such as 679 * checksum offloading, TCP segmentation offloading, 680 * encryption, VLAN encapsulation/decapsulation, etc." --- 100 unchanged lines hidden (view full) --- 781 if (__predict_false(nm_txq->cidx == nm_txq->sidx)) 782 nm_txq->cidx = 0; 783 } 784 785 return (n); 786} 787 788static int | 671 672 cpl->ctrl0 = nm_txq->cpl_ctrl0; 673 cpl->pack = 0; 674 cpl->len = htobe16(slot->len); 675 /* 676 * netmap(4) says "netmap does not use features such as 677 * checksum offloading, TCP segmentation offloading, 678 * encryption, VLAN encapsulation/decapsulation, etc." --- 100 unchanged lines hidden (view full) --- 779 if (__predict_false(nm_txq->cidx == nm_txq->sidx)) 780 nm_txq->cidx = 0; 781 } 782 783 return (n); 784} 785 786static int |
| 789cxgbe_netmap_txsync(struct netmap_adapter *na, u_int ring_nr, int flags) | 787cxgbe_netmap_txsync(struct netmap_kring *kring, int flags) |
| 790{ | 788{ |
| 791 struct netmap_kring *kring = &na->tx_rings[ring_nr]; | 789 struct netmap_adapter *na = kring->na; |
| 792 struct ifnet *ifp = na->ifp; 793 struct port_info *pi = ifp->if_softc; 794 struct adapter *sc = pi->adapter; | 790 struct ifnet *ifp = na->ifp; 791 struct port_info *pi = ifp->if_softc; 792 struct adapter *sc = pi->adapter; |
| 795 struct sge_nm_txq *nm_txq = &sc->sge.nm_txq[pi->first_nm_txq + ring_nr]; | 793 struct sge_nm_txq *nm_txq = &sc->sge.nm_txq[pi->first_nm_txq + kring->ring_id]; |
| 796 const u_int head = kring->rhead; 797 u_int reclaimed = 0; 798 int n, d, npkt_remaining, ndesc_remaining; 799 800 /* 801 * Tx was at kring->nr_hwcur last time around and now we need to advance 802 * to kring->rhead. Note that the driver's pidx moves independent of 803 * netmap's kring->nr_hwcur (pidx counts descriptors and the relation --- 42 unchanged lines hidden (view full) --- 846 } 847 848 nm_txsync_finalize(kring); 849 850 return (0); 851} 852 853static int | 794 const u_int head = kring->rhead; 795 u_int reclaimed = 0; 796 int n, d, npkt_remaining, ndesc_remaining; 797 798 /* 799 * Tx was at kring->nr_hwcur last time around and now we need to advance 800 * to kring->rhead. Note that the driver's pidx moves independent of 801 * netmap's kring->nr_hwcur (pidx counts descriptors and the relation --- 42 unchanged lines hidden (view full) --- 844 } 845 846 nm_txsync_finalize(kring); 847 848 return (0); 849} 850 851static int |
| 854cxgbe_netmap_rxsync(struct netmap_adapter *na, u_int ring_nr, int flags) | 852cxgbe_netmap_rxsync(struct netmap_kring *kring, int flags) |
| 855{ | 853{ |
| 856 struct netmap_kring *kring = &na->rx_rings[ring_nr]; | 854 struct netmap_adapter *na = kring->na; |
| 857 struct netmap_ring *ring = kring->ring; 858 struct ifnet *ifp = na->ifp; 859 struct port_info *pi = ifp->if_softc; 860 struct adapter *sc = pi->adapter; | 855 struct netmap_ring *ring = kring->ring; 856 struct ifnet *ifp = na->ifp; 857 struct port_info *pi = ifp->if_softc; 858 struct adapter *sc = pi->adapter; |
| 861 struct sge_nm_rxq *nm_rxq = &sc->sge.nm_rxq[pi->first_nm_rxq + ring_nr]; | 859 struct sge_nm_rxq *nm_rxq = &sc->sge.nm_rxq[pi->first_nm_rxq + kring->ring_id]; |
| 862 u_int const head = nm_rxsync_prologue(kring); 863 u_int n; 864 int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR; 865 866 if (netmap_no_pendintr || force_update) { 867 kring->nr_hwtail = atomic_load_acq_32(&nm_rxq->fl_cidx); 868 kring->nr_kflags &= ~NKR_PENDINTR; 869 } --- 16 unchanged lines hidden (view full) --- 886 MPASS((fl_pidx & 7) == 0); 887 MPASS((n & 7) == 0); 888 889 IDXINCR(kring->nr_hwcur, n, kring->nkr_num_slots); 890 IDXINCR(nm_rxq->fl_pidx, n, nm_rxq->fl_sidx); 891 892 while (n > 0) { 893 for (i = 0; i < 8; i++, fl_pidx++, slot++) { | 860 u_int const head = nm_rxsync_prologue(kring); 861 u_int n; 862 int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR; 863 864 if (netmap_no_pendintr || force_update) { 865 kring->nr_hwtail = atomic_load_acq_32(&nm_rxq->fl_cidx); 866 kring->nr_kflags &= ~NKR_PENDINTR; 867 } --- 16 unchanged lines hidden (view full) --- 884 MPASS((fl_pidx & 7) == 0); 885 MPASS((n & 7) == 0); 886 887 IDXINCR(kring->nr_hwcur, n, kring->nkr_num_slots); 888 IDXINCR(nm_rxq->fl_pidx, n, nm_rxq->fl_sidx); 889 890 while (n > 0) { 891 for (i = 0; i < 8; i++, fl_pidx++, slot++) { |
| 894 PNMB(slot, &ba); | 892 PNMB(na, slot, &ba); |
| 895 nm_rxq->fl_desc[fl_pidx] = htobe64(ba | hwidx); 896 slot->flags &= ~NS_BUF_CHANGED; 897 MPASS(fl_pidx <= nm_rxq->fl_sidx); 898 } 899 n -= 8; 900 if (fl_pidx == nm_rxq->fl_sidx) { 901 fl_pidx = 0; 902 slot = &ring->slot[0]; --- 238 unchanged lines hidden --- | 893 nm_rxq->fl_desc[fl_pidx] = htobe64(ba | hwidx); 894 slot->flags &= ~NS_BUF_CHANGED; 895 MPASS(fl_pidx <= nm_rxq->fl_sidx); 896 } 897 n -= 8; 898 if (fl_pidx == nm_rxq->fl_sidx) { 899 fl_pidx = 0; 900 slot = &ring->slot[0]; --- 238 unchanged lines hidden --- |