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cxgb_main.c (171469) cxgb_main.c (171471)
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 14 unchanged lines hidden (view full) ---

23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 14 unchanged lines hidden (view full) ---

23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/cxgb_main.c 171469 2007-07-17 06:12:22Z kmacy $");
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/cxgb_main.c 171471 2007-07-17 06:50:35Z kmacy $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/module.h>
38#include <sys/pciio.h>
39#include <sys/conf.h>

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220 MAX_RX_BUFFERS = 16384,
221 MAX_RX_JUMBO_BUFFERS = 16384,
222 MIN_TXQ_ENTRIES = 4,
223 MIN_CTRL_TXQ_ENTRIES = 4,
224 MIN_RSPQ_ENTRIES = 32,
225 MIN_FL_ENTRIES = 32
226};
227
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/module.h>
38#include <sys/pciio.h>
39#include <sys/conf.h>

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220 MAX_RX_BUFFERS = 16384,
221 MAX_RX_JUMBO_BUFFERS = 16384,
222 MIN_TXQ_ENTRIES = 4,
223 MIN_CTRL_TXQ_ENTRIES = 4,
224 MIN_RSPQ_ENTRIES = 32,
225 MIN_FL_ENTRIES = 32
226};
227
228struct filter_info {
229 u32 sip;
230 u32 sip_mask;
231 u32 dip;
232 u16 sport;
233 u16 dport;
234 u32 vlan:12;
235 u32 vlan_prio:3;
236 u32 mac_hit:1;
237 u32 mac_idx:4;
238 u32 mac_vld:1;
239 u32 pkt_type:2;
240 u32 report_filter_id:1;
241 u32 pass:1;
242 u32 rss:1;
243 u32 qset:3;
244 u32 locked:1;
245 u32 valid:1;
246};
247
248enum { FILTER_NO_VLAN_PRI = 7 };
249
228#define PORT_MASK ((1 << MAX_NPORTS) - 1)
229
230/* Table for probing the cards. The desc field isn't actually used */
231struct cxgb_ident {
232 uint16_t vendor;
233 uint16_t device;
234 int index;
235 char *desc;

--- 7 unchanged lines hidden (view full) ---

243 {PCI_VENDOR_ID_CHELSIO, 0x0026, 2, "T310X"},
244 {PCI_VENDOR_ID_CHELSIO, 0x0030, 2, "T3B10"},
245 {PCI_VENDOR_ID_CHELSIO, 0x0031, 3, "T3B20"},
246 {PCI_VENDOR_ID_CHELSIO, 0x0032, 1, "T3B02"},
247 {PCI_VENDOR_ID_CHELSIO, 0x0033, 4, "T3B04"},
248 {0, 0, 0, NULL}
249};
250
250#define PORT_MASK ((1 << MAX_NPORTS) - 1)
251
252/* Table for probing the cards. The desc field isn't actually used */
253struct cxgb_ident {
254 uint16_t vendor;
255 uint16_t device;
256 int index;
257 char *desc;

--- 7 unchanged lines hidden (view full) ---

265 {PCI_VENDOR_ID_CHELSIO, 0x0026, 2, "T310X"},
266 {PCI_VENDOR_ID_CHELSIO, 0x0030, 2, "T3B10"},
267 {PCI_VENDOR_ID_CHELSIO, 0x0031, 3, "T3B20"},
268 {PCI_VENDOR_ID_CHELSIO, 0x0032, 1, "T3B02"},
269 {PCI_VENDOR_ID_CHELSIO, 0x0033, 4, "T3B04"},
270 {0, 0, 0, NULL}
271};
272
273
274static int set_eeprom(struct port_info *pi, const uint8_t *data, int len, int offset);
275
276static inline char
277t3rev2char(struct adapter *adapter)
278{
279 char rev = 'z';
280
281 switch(adapter->params.rev) {
282 case T3_REV_A:
283 rev = 'a';
284 break;
285 case T3_REV_B:
286 case T3_REV_B2:
287 rev = 'b';
288 break;
289 case T3_REV_C:
290 rev = 'c';
291 break;
292 }
293 return rev;
294}
295
251static struct cxgb_ident *
252cxgb_get_ident(device_t dev)
253{
254 struct cxgb_ident *id;
255
256 for (id = cxgb_identifiers; id->desc != NULL; id++) {
257 if ((id->vendor == pci_get_vendor(dev)) &&
258 (id->device == pci_get_device(dev))) {

--- 35 unchanged lines hidden (view full) ---

294 else
295 ports = "ports";
296
297 snprintf(buf, sizeof(buf), "%s RNIC, %d %s", ai->desc, nports, ports);
298 device_set_desc_copy(dev, buf);
299 return (BUS_PROBE_DEFAULT);
300}
301
296static struct cxgb_ident *
297cxgb_get_ident(device_t dev)
298{
299 struct cxgb_ident *id;
300
301 for (id = cxgb_identifiers; id->desc != NULL; id++) {
302 if ((id->vendor == pci_get_vendor(dev)) &&
303 (id->device == pci_get_device(dev))) {

--- 35 unchanged lines hidden (view full) ---

339 else
340 ports = "ports";
341
342 snprintf(buf, sizeof(buf), "%s RNIC, %d %s", ai->desc, nports, ports);
343 device_set_desc_copy(dev, buf);
344 return (BUS_PROBE_DEFAULT);
345}
346
347#define FW_FNAME "t3fw%d%d%d"
348#define TPEEPROM_NAME "t3%ctpe%d%d%d"
349#define TPSRAM_NAME "t3%cps%d%d%d"
350
302static int
303upgrade_fw(adapter_t *sc)
304{
305 char buf[32];
306#ifdef FIRMWARE_LATEST
307 const struct firmware *fw;
308#else
309 struct firmware *fw;
310#endif
311 int status;
312
351static int
352upgrade_fw(adapter_t *sc)
353{
354 char buf[32];
355#ifdef FIRMWARE_LATEST
356 const struct firmware *fw;
357#else
358 struct firmware *fw;
359#endif
360 int status;
361
313 snprintf(&buf[0], sizeof(buf), "t3fw%d%d%d", FW_VERSION_MAJOR,
362 snprintf(&buf[0], sizeof(buf), FW_FNAME, FW_VERSION_MAJOR,
314 FW_VERSION_MINOR, FW_VERSION_MICRO);
315
316 fw = firmware_get(buf);
317
318 if (fw == NULL) {
319 device_printf(sc->dev, "Could not find firmware image %s\n", buf);
320 return (ENOENT);
363 FW_VERSION_MINOR, FW_VERSION_MICRO);
364
365 fw = firmware_get(buf);
366
367 if (fw == NULL) {
368 device_printf(sc->dev, "Could not find firmware image %s\n", buf);
369 return (ENOENT);
321 }
370 } else
371 device_printf(sc->dev, "updating firmware on card with %s\n", buf);
322 status = t3_load_fw(sc, (const uint8_t *)fw->data, fw->datasize);
323
372 status = t3_load_fw(sc, (const uint8_t *)fw->data, fw->datasize);
373
374 device_printf(sc->dev, "firmware update returned %s %d\n", (status == 0) ? "success" : "fail", status);
375
324 firmware_put(fw, FIRMWARE_UNLOAD);
325
326 return (status);
327}
328
329static int
330cxgb_controller_attach(device_t dev)
331{

--- 13 unchanged lines hidden (view full) ---

345 uint16_t lnk, pectl;
346 lnk = pci_read_config(dev, reg + 0x12, 2);
347 sc->link_width = (lnk >> 4) & 0x3f;
348
349 pectl = pci_read_config(dev, reg + 0x8, 2);
350 pectl = (pectl & ~0x7000) | (5 << 12);
351 pci_write_config(dev, reg + 0x8, pectl, 2);
352 }
376 firmware_put(fw, FIRMWARE_UNLOAD);
377
378 return (status);
379}
380
381static int
382cxgb_controller_attach(device_t dev)
383{

--- 13 unchanged lines hidden (view full) ---

397 uint16_t lnk, pectl;
398 lnk = pci_read_config(dev, reg + 0x12, 2);
399 sc->link_width = (lnk >> 4) & 0x3f;
400
401 pectl = pci_read_config(dev, reg + 0x8, 2);
402 pectl = (pectl & ~0x7000) | (5 << 12);
403 pci_write_config(dev, reg + 0x8, pectl, 2);
404 }
353 if (sc->link_width != 0 && sc->link_width <= 4) {
405
406 ai = cxgb_get_adapter_info(dev);
407 if (sc->link_width != 0 && sc->link_width <= 4 &&
408 (ai->nports0 + ai->nports1) <= 2) {
354 device_printf(sc->dev,
355 "PCIe x%d Link, expect reduced performance\n",
356 sc->link_width);
357 }
358
359 pci_enable_busmaster(dev);
360 /*
361 * Allocate the registers and make them available to the driver.

--- 20 unchanged lines hidden (view full) ---

382 MTX_INIT(&sc->sge.reg_lock, sc->reglockbuf, NULL, MTX_DEF);
383 MTX_INIT(&sc->mdio_lock, sc->mdiolockbuf, NULL, MTX_DEF);
384 MTX_INIT(&sc->elmer_lock, sc->elmerlockbuf, NULL, MTX_DEF);
385
386 sc->bt = rman_get_bustag(sc->regs_res);
387 sc->bh = rman_get_bushandle(sc->regs_res);
388 sc->mmio_len = rman_get_size(sc->regs_res);
389
409 device_printf(sc->dev,
410 "PCIe x%d Link, expect reduced performance\n",
411 sc->link_width);
412 }
413
414 pci_enable_busmaster(dev);
415 /*
416 * Allocate the registers and make them available to the driver.

--- 20 unchanged lines hidden (view full) ---

437 MTX_INIT(&sc->sge.reg_lock, sc->reglockbuf, NULL, MTX_DEF);
438 MTX_INIT(&sc->mdio_lock, sc->mdiolockbuf, NULL, MTX_DEF);
439 MTX_INIT(&sc->elmer_lock, sc->elmerlockbuf, NULL, MTX_DEF);
440
441 sc->bt = rman_get_bustag(sc->regs_res);
442 sc->bh = rman_get_bushandle(sc->regs_res);
443 sc->mmio_len = rman_get_size(sc->regs_res);
444
390 ai = cxgb_get_adapter_info(dev);
391 if (t3_prep_adapter(sc, ai, 1) < 0) {
392 printf("prep adapter failed\n");
393 error = ENODEV;
394 goto out;
395 }
396 /* Allocate the BAR for doing MSI-X. If it succeeds, try to allocate
397 * enough messages for the queue sets. If that fails, try falling
398 * back to MSI. If that fails, then try falling back to the legacy

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470 * Warn user that a firmware update will be attempted in init.
471 */
472 device_printf(dev, "firmware needs to be updated to version %d.%d.%d\n",
473 FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
474 sc->flags &= ~FW_UPTODATE;
475 } else {
476 sc->flags |= FW_UPTODATE;
477 }
445 if (t3_prep_adapter(sc, ai, 1) < 0) {
446 printf("prep adapter failed\n");
447 error = ENODEV;
448 goto out;
449 }
450 /* Allocate the BAR for doing MSI-X. If it succeeds, try to allocate
451 * enough messages for the queue sets. If that fails, try falling
452 * back to MSI. If that fails, then try falling back to the legacy

--- 71 unchanged lines hidden (view full) ---

524 * Warn user that a firmware update will be attempted in init.
525 */
526 device_printf(dev, "firmware needs to be updated to version %d.%d.%d\n",
527 FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
528 sc->flags &= ~FW_UPTODATE;
529 } else {
530 sc->flags |= FW_UPTODATE;
531 }
532
533 if (t3_check_tpsram_version(sc) != 0) {
534 /*
535 * Warn user that a firmware update will be attempted in init.
536 */
537 device_printf(dev, "SRAM needs to be updated to version %c-%d.%d.%d\n",
538 t3rev2char(sc), TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
539 sc->flags &= ~TPS_UPTODATE;
540 } else {
541 sc->flags |= TPS_UPTODATE;
542 }
478
479 if ((sc->flags & USING_MSIX) && !singleq)
480 port_qsets = min((SGE_QSETS/(sc)->params.nports), mp_ncpus);
481
482 /*
483 * Create a child device for each MAC. The ethernet attachment
484 * will be done in these children.
485 */
486 for (i = 0; i < (sc)->params.nports; i++) {
487 if ((child = device_add_child(dev, "cxgb", -1)) == NULL) {
488 device_printf(dev, "failed to add child port\n");
489 error = EINVAL;
490 goto out;
491 }
543
544 if ((sc->flags & USING_MSIX) && !singleq)
545 port_qsets = min((SGE_QSETS/(sc)->params.nports), mp_ncpus);
546
547 /*
548 * Create a child device for each MAC. The ethernet attachment
549 * will be done in these children.
550 */
551 for (i = 0; i < (sc)->params.nports; i++) {
552 if ((child = device_add_child(dev, "cxgb", -1)) == NULL) {
553 device_printf(dev, "failed to add child port\n");
554 error = EINVAL;
555 goto out;
556 }
492 sc->portdev[i] = child;
493 sc->port[i].adapter = sc;
494 sc->port[i].nqsets = port_qsets;
495 sc->port[i].first_qset = i*port_qsets;
496 sc->port[i].port = i;
557 sc->port[i].adapter = sc;
558 sc->port[i].nqsets = port_qsets;
559 sc->port[i].first_qset = i*port_qsets;
560 sc->port[i].port = i;
561 sc->portdev[i] = child;
497 device_set_softc(child, &sc->port[i]);
498 }
499 if ((error = bus_generic_attach(dev)) != 0)
500 goto out;
501
502 /*
503 * XXX need to poll for link status
504 */

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585#ifdef notyet
586 if (is_offload(sc)) {
587 cxgb_adapter_unofld(sc);
588 if (isset(&sc->open_device_map, OFFLOAD_DEVMAP_BIT))
589 offload_close(&sc->tdev);
590 }
591#endif
592 t3_free_sge_resources(sc);
562 device_set_softc(child, &sc->port[i]);
563 }
564 if ((error = bus_generic_attach(dev)) != 0)
565 goto out;
566
567 /*
568 * XXX need to poll for link status
569 */

--- 80 unchanged lines hidden (view full) ---

650#ifdef notyet
651 if (is_offload(sc)) {
652 cxgb_adapter_unofld(sc);
653 if (isset(&sc->open_device_map, OFFLOAD_DEVMAP_BIT))
654 offload_close(&sc->tdev);
655 }
656#endif
657 t3_free_sge_resources(sc);
658 free(sc->filters, M_DEVBUF);
593 t3_sge_free(sc);
594
595 cxgb_offload_exit();
596
597 if (sc->regs_res != NULL)
598 bus_release_resource(sc->dev, SYS_RES_MEMORY, sc->regs_rid,
599 sc->regs_res);
600
601 MTX_DESTROY(&sc->mdio_lock);
602 MTX_DESTROY(&sc->sge.reg_lock);
603 MTX_DESTROY(&sc->elmer_lock);
604 ADAPTER_LOCK_DEINIT(sc);
605
606 return;
607}
608
659 t3_sge_free(sc);
660
661 cxgb_offload_exit();
662
663 if (sc->regs_res != NULL)
664 bus_release_resource(sc->dev, SYS_RES_MEMORY, sc->regs_rid,
665 sc->regs_res);
666
667 MTX_DESTROY(&sc->mdio_lock);
668 MTX_DESTROY(&sc->sge.reg_lock);
669 MTX_DESTROY(&sc->elmer_lock);
670 ADAPTER_LOCK_DEINIT(sc);
671
672 return;
673}
674
675
676
677static int
678alloc_filters(struct adapter *adap)
679{
680 struct filter_info *p;
681 int nfilters;
682
683 if ((nfilters = adap->params.mc5.nfilters) == 0)
684 return (0);
685
686 adap->filters = malloc(nfilters*sizeof(struct filter_info),
687 M_DEVBUF, M_ZERO|M_WAITOK);
688
689 if (adap->filters == NULL)
690 return (ENOMEM);
691
692 /* Set the default filters, only need to set non-0 fields here. */
693 p = &adap->filters[nfilters - 1];
694 p->vlan = 0xfff;
695 p->vlan_prio = FILTER_NO_VLAN_PRI;
696 p->pass = p->rss = p->valid = p->locked = 1;
697
698 return (0);
699}
700
701static inline void
702set_tcb_field_ulp(struct cpl_set_tcb_field *req,
703 unsigned int tid, unsigned int word,
704 uint64_t mask, uint64_t val)
705{
706 struct ulp_txpkt *txpkt = (struct ulp_txpkt *)req;
707
708 txpkt->cmd_dest = htonl(V_ULPTX_CMD(ULP_TXPKT));
709 txpkt->len = htonl(V_ULPTX_NFLITS(sizeof(*req) / 8));
710 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
711 req->reply = V_NO_REPLY(1);
712 req->cpu_idx = 0;
713 req->word = htons(word);
714 req->mask = htobe64(mask);
715 req->val = htobe64(val);
716}
717
718static int
719set_filter(struct adapter *adap, int id, const struct filter_info *f)
720{
721 int len;
722 struct mbuf *m;
723 struct ulp_txpkt *txpkt;
724 struct work_request_hdr *wr;
725 struct cpl_pass_open_req *oreq;
726 struct cpl_set_tcb_field *sreq;
727
728 len = sizeof(*wr) + sizeof(*oreq) + 2 * sizeof(*sreq);
729 id += t3_mc5_size(&adap->mc5) - adap->params.mc5.nroutes -
730 adap->params.mc5.nfilters;
731
732 m = m_gethdr(M_TRYWAIT, MT_DATA);
733 wr = mtod(m, struct work_request_hdr *);
734 wr->wr_hi = htonl(V_WR_OP(FW_WROPCODE_BYPASS) | F_WR_ATOMIC);
735 m->m_len = m->m_pkthdr.len = len;
736
737 oreq = (struct cpl_pass_open_req *)(wr + 1);
738 txpkt = (struct ulp_txpkt *)oreq;
739 txpkt->cmd_dest = htonl(V_ULPTX_CMD(ULP_TXPKT));
740 txpkt->len = htonl(V_ULPTX_NFLITS(sizeof(*oreq) / 8));
741 OPCODE_TID(oreq) = htonl(MK_OPCODE_TID(CPL_PASS_OPEN_REQ, id));
742 oreq->local_port = htons(f->dport);
743 oreq->peer_port = htons(f->sport);
744 oreq->local_ip = htonl(f->dip);
745 oreq->peer_ip = htonl(f->sip);
746 oreq->peer_netmask = htonl(f->sip_mask);
747 oreq->opt0h = 0;
748 oreq->opt0l = htonl(F_NO_OFFLOAD);
749 oreq->opt1 = htonl(V_MAC_MATCH_VALID(f->mac_vld) |
750 V_CONN_POLICY(CPL_CONN_POLICY_FILTER) |
751 V_VLAN_PRI(f->vlan_prio >> 1) |
752 V_VLAN_PRI_VALID(f->vlan_prio != FILTER_NO_VLAN_PRI) |
753 V_PKT_TYPE(f->pkt_type) | V_OPT1_VLAN(f->vlan) |
754 V_MAC_MATCH(f->mac_idx | (f->mac_hit << 4)));
755
756 sreq = (struct cpl_set_tcb_field *)(oreq + 1);
757 set_tcb_field_ulp(sreq, id, 1, 0x1800808000ULL,
758 (f->report_filter_id << 15) | (1 << 23) |
759 ((u64)f->pass << 35) | ((u64)!f->rss << 36));
760 set_tcb_field_ulp(sreq + 1, id, 25, 0x3f80000,
761 (u64)adap->rrss_map[f->qset] << 19);
762 t3_mgmt_tx(adap, m);
763 return 0;
764}
765
766static int
767setup_hw_filters(struct adapter *adap)
768{
769 int i, err;
770
771 if (adap->filters == NULL)
772 return 0;
773
774 t3_enable_filters(adap);
775
776 for (i = err = 0; i < adap->params.mc5.nfilters && !err; i++)
777 if (adap->filters[i].locked)
778 err = set_filter(adap, i, &adap->filters[i]);
779 return err;
780}
781
609/**
610 * setup_sge_qsets - configure SGE Tx/Rx/response queues
611 * @sc: the controller softc
612 *
613 * Determines how many sets of SGE queues to use and initializes them.
614 * We support multiple queue sets per port if we have MSI-X, otherwise
615 * just one queue set per port.
616 */

--- 185 unchanged lines hidden (view full) ---

802 ifp->if_snd.ifq_drv_maxlen = TX_ETH_Q_SIZE;
803 IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
804 IFQ_SET_READY(&ifp->if_snd);
805
806 ifp->if_hwassist = ifp->if_capabilities = ifp->if_capenable = 0;
807 ifp->if_capabilities |= CXGB_CAP;
808 ifp->if_capenable |= CXGB_CAP_ENABLE;
809 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO);
782/**
783 * setup_sge_qsets - configure SGE Tx/Rx/response queues
784 * @sc: the controller softc
785 *
786 * Determines how many sets of SGE queues to use and initializes them.
787 * We support multiple queue sets per port if we have MSI-X, otherwise
788 * just one queue set per port.
789 */

--- 185 unchanged lines hidden (view full) ---

975 ifp->if_snd.ifq_drv_maxlen = TX_ETH_Q_SIZE;
976 IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
977 IFQ_SET_READY(&ifp->if_snd);
978
979 ifp->if_hwassist = ifp->if_capabilities = ifp->if_capenable = 0;
980 ifp->if_capabilities |= CXGB_CAP;
981 ifp->if_capenable |= CXGB_CAP_ENABLE;
982 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO);
810
983 /*
984 * disable TSO on 4-port - it isn't supported by the firmware yet
985 */
986 if (p->adapter->params.nports > 2) {
987 ifp->if_capabilities &= ~(IFCAP_TSO4 | IFCAP_TSO6);
988 ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_TSO6);
989 ifp->if_hwassist &= ~CSUM_TSO;
990 }
991
811 ether_ifattach(ifp, p->hw_addr);
992 ether_ifattach(ifp, p->hw_addr);
812#ifdef DEFAULT_JUMBO
813 ifp->if_mtu = 9000;
814#endif
993 /*
994 * Only default to jumbo frames on 10GigE
995 */
996 if (p->adapter->params.nports <= 2)
997 ifp->if_mtu = 9000;
815 if ((err = cxgb_makedev(p)) != 0) {
816 printf("makedev failed %d\n", err);
817 return (err);
818 }
819 ifmedia_init(&p->media, IFM_IMASK, cxgb_media_change,
820 cxgb_media_status);
821
822 if (!strcmp(p->port_type->desc, "10GBASE-CX4")) {

--- 261 unchanged lines hidden (view full) ---

1084 * down to the response queues actually configured for each port.
1085 * We always configure the RSS mapping for two ports since the mapping
1086 * table has plenty of entries.
1087 */
1088static void
1089setup_rss(adapter_t *adap)
1090{
1091 int i;
998 if ((err = cxgb_makedev(p)) != 0) {
999 printf("makedev failed %d\n", err);
1000 return (err);
1001 }
1002 ifmedia_init(&p->media, IFM_IMASK, cxgb_media_change,
1003 cxgb_media_status);
1004
1005 if (!strcmp(p->port_type->desc, "10GBASE-CX4")) {

--- 261 unchanged lines hidden (view full) ---

1267 * down to the response queues actually configured for each port.
1268 * We always configure the RSS mapping for two ports since the mapping
1269 * table has plenty of entries.
1270 */
1271static void
1272setup_rss(adapter_t *adap)
1273{
1274 int i;
1092 u_int nq0 = adap->port[0].nqsets;
1093 u_int nq1 = max((u_int)adap->port[1].nqsets, 1U);
1275 u_int nq[2];
1094 uint8_t cpus[SGE_QSETS + 1];
1095 uint16_t rspq_map[RSS_TABLE_SIZE];
1276 uint8_t cpus[SGE_QSETS + 1];
1277 uint16_t rspq_map[RSS_TABLE_SIZE];
1096
1278
1279 nq[0] = adap->port[0].nqsets;
1280 nq[1] = max((u_int)adap->port[1].nqsets, 1U);
1281
1097 for (i = 0; i < SGE_QSETS; ++i)
1098 cpus[i] = i;
1099 cpus[SGE_QSETS] = 0xff;
1100
1101 for (i = 0; i < RSS_TABLE_SIZE / 2; ++i) {
1282 for (i = 0; i < SGE_QSETS; ++i)
1283 cpus[i] = i;
1284 cpus[SGE_QSETS] = 0xff;
1285
1286 for (i = 0; i < RSS_TABLE_SIZE / 2; ++i) {
1102 rspq_map[i] = i % nq0;
1103 rspq_map[i + RSS_TABLE_SIZE / 2] = (i % nq1) + nq0;
1287 rspq_map[i] = nq[0] ? i % nq[0] : 0;
1288 rspq_map[i + RSS_TABLE_SIZE / 2] = nq[1] ? i % nq[1] + nq[0] : 0;
1104 }
1289 }
1290 /* Calculate the reverse RSS map table */
1291 for (i = 0; i < RSS_TABLE_SIZE; ++i)
1292 if (adap->rrss_map[rspq_map[i]] == 0xff)
1293 adap->rrss_map[rspq_map[i]] = i;
1105
1106 t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN |
1294
1295 t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN |
1107 F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN |
1108 V_RRCPLCPUSIZE(6), cpus, rspq_map);
1296 F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN | F_OFDMAPEN |
1297 F_RRCPLMAPEN | V_RRCPLCPUSIZE(6), cpus, rspq_map);
1298
1109}
1110
1111/*
1112 * Sends an mbuf to an offload queue driver
1113 * after dealing with any active network taps.
1114 */
1115static inline int
1116offload_tx(struct toedev *tdev, struct mbuf *m)

--- 53 unchanged lines hidden (view full) ---

1170
1171static void
1172send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
1173 int hi, int port)
1174{
1175 struct mbuf *m;
1176 struct mngt_pktsched_wr *req;
1177
1299}
1300
1301/*
1302 * Sends an mbuf to an offload queue driver
1303 * after dealing with any active network taps.
1304 */
1305static inline int
1306offload_tx(struct toedev *tdev, struct mbuf *m)

--- 53 unchanged lines hidden (view full) ---

1360
1361static void
1362send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
1363 int hi, int port)
1364{
1365 struct mbuf *m;
1366 struct mngt_pktsched_wr *req;
1367
1178 m = m_gethdr(M_NOWAIT, MT_DATA);
1368 m = m_gethdr(M_DONTWAIT, MT_DATA);
1179 if (m) {
1180 req = mtod(m, struct mngt_pktsched_wr *);
1181 req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_MNGT));
1182 req->mngt_opcode = FW_MNGTOPCODE_PKTSCHED_SET;
1183 req->sched = sched;
1184 req->idx = qidx;
1185 req->min = lo;
1186 req->max = hi;

--- 12 unchanged lines hidden (view full) ---

1199 const struct port_info *pi = adap2pinfo(sc, i);
1200
1201 for (j = 0; j < pi->nqsets; ++j)
1202 send_pktsched_cmd(sc, 1, pi->first_qset + j, -1,
1203 -1, i);
1204 }
1205}
1206
1369 if (m) {
1370 req = mtod(m, struct mngt_pktsched_wr *);
1371 req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_MNGT));
1372 req->mngt_opcode = FW_MNGTOPCODE_PKTSCHED_SET;
1373 req->sched = sched;
1374 req->idx = qidx;
1375 req->min = lo;
1376 req->max = hi;

--- 12 unchanged lines hidden (view full) ---

1389 const struct port_info *pi = adap2pinfo(sc, i);
1390
1391 for (j = 0; j < pi->nqsets; ++j)
1392 send_pktsched_cmd(sc, 1, pi->first_qset + j, -1,
1393 -1, i);
1394 }
1395}
1396
1397static void
1398update_tpeeprom(struct adapter *adap)
1399{
1400 const struct firmware *tpeeprom;
1401 char buf[64];
1402 uint32_t version;
1403 unsigned int major, minor;
1404 int ret, len;
1405 char rev;
1406
1407 t3_seeprom_read(adap, TP_SRAM_OFFSET, &version);
1408
1409 major = G_TP_VERSION_MAJOR(version);
1410 minor = G_TP_VERSION_MINOR(version);
1411 if (major == TP_VERSION_MAJOR && minor == TP_VERSION_MINOR)
1412 return;
1413
1414 rev = t3rev2char(adap);
1415
1416 snprintf(buf, sizeof(buf), TPEEPROM_NAME, rev,
1417 TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
1418
1419 tpeeprom = firmware_get(buf);
1420 if (tpeeprom == NULL) {
1421 device_printf(adap->dev, "could not load TP EEPROM: unable to load %s\n",
1422 buf);
1423 return;
1424 }
1425
1426 len = tpeeprom->datasize - 4;
1427
1428 ret = t3_check_tpsram(adap, tpeeprom->data, tpeeprom->datasize);
1429 if (ret)
1430 goto release_tpeeprom;
1431
1432 if (len != TP_SRAM_LEN) {
1433 device_printf(adap->dev, "%s length is wrong len=%d expected=%d\n", buf, len, TP_SRAM_LEN);
1434 return;
1435 }
1436
1437 ret = set_eeprom(&adap->port[0], tpeeprom->data, tpeeprom->datasize,
1438 TP_SRAM_OFFSET);
1439
1440 if (!ret) {
1441 device_printf(adap->dev,
1442 "Protocol SRAM image updated in EEPROM to %d.%d.%d\n",
1443 TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
1444 } else
1445 device_printf(adap->dev, "Protocol SRAM image update in EEPROM failed\n");
1446
1447release_tpeeprom:
1448 firmware_put(tpeeprom, FIRMWARE_UNLOAD);
1449
1450 return;
1451}
1452
1453static int
1454update_tpsram(struct adapter *adap)
1455{
1456 const struct firmware *tpsram;
1457 char buf[64];
1458 int ret;
1459 char rev;
1460
1461 rev = t3rev2char(adap);
1462 if (!rev)
1463 return 0;
1464
1465 update_tpeeprom(adap);
1466
1467 snprintf(buf, sizeof(buf), TPSRAM_NAME, rev,
1468 TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
1469
1470 tpsram = firmware_get(buf);
1471 if (tpsram == NULL){
1472 device_printf(adap->dev, "could not load TP SRAM: unable to load %s\n",
1473 buf);
1474 return (EINVAL);
1475 } else
1476 device_printf(adap->dev, "updating TP SRAM with %s\n", buf);
1477
1478 ret = t3_check_tpsram(adap, tpsram->data, tpsram->datasize);
1479 if (ret)
1480 goto release_tpsram;
1481
1482 ret = t3_set_proto_sram(adap, tpsram->data);
1483 if (ret)
1484 device_printf(adap->dev, "loading protocol SRAM failed\n");
1485
1486release_tpsram:
1487 firmware_put(tpsram, FIRMWARE_UNLOAD);
1488
1489 return ret;
1490}
1491
1207/**
1208 * cxgb_up - enable the adapter
1209 * @adap: adapter being enabled
1210 *
1211 * Called when the first port is enabled, this function performs the
1212 * actions necessary to make an adapter operational, such as completing
1213 * the initialization of HW modules, and enabling interrupts.
1214 *
1215 */
1216static int
1217cxgb_up(struct adapter *sc)
1218{
1219 int err = 0;
1220
1221 if ((sc->flags & FULL_INIT_DONE) == 0) {
1222
1223 if ((sc->flags & FW_UPTODATE) == 0)
1492/**
1493 * cxgb_up - enable the adapter
1494 * @adap: adapter being enabled
1495 *
1496 * Called when the first port is enabled, this function performs the
1497 * actions necessary to make an adapter operational, such as completing
1498 * the initialization of HW modules, and enabling interrupts.
1499 *
1500 */
1501static int
1502cxgb_up(struct adapter *sc)
1503{
1504 int err = 0;
1505
1506 if ((sc->flags & FULL_INIT_DONE) == 0) {
1507
1508 if ((sc->flags & FW_UPTODATE) == 0)
1224 err = upgrade_fw(sc);
1225
1226 if (err)
1227 goto out;
1228
1509 if ((err = upgrade_fw(sc)))
1510 goto out;
1511 if ((sc->flags & TPS_UPTODATE) == 0)
1512 if ((err = update_tpsram(sc)))
1513 goto out;
1229 err = t3_init_hw(sc, 0);
1230 if (err)
1231 goto out;
1232
1233 t3_write_reg(sc, A_ULPRX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12));
1234
1235 err = setup_sge_qsets(sc);
1236 if (err)
1237 goto out;
1238
1514 err = t3_init_hw(sc, 0);
1515 if (err)
1516 goto out;
1517
1518 t3_write_reg(sc, A_ULPRX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12));
1519
1520 err = setup_sge_qsets(sc);
1521 if (err)
1522 goto out;
1523
1524 alloc_filters(sc);
1239 setup_rss(sc);
1240 sc->flags |= FULL_INIT_DONE;
1241 }
1242
1243 t3_intr_clear(sc);
1244
1245 /* If it's MSI or INTx, allocate a single interrupt for everything */
1246 if ((sc->flags & USING_MSIX) == 0) {

--- 16 unchanged lines hidden (view full) ---

1263 }
1264 } else {
1265 cxgb_setup_msix(sc, sc->msi_count);
1266 }
1267
1268 t3_sge_start(sc);
1269 t3_intr_enable(sc);
1270
1525 setup_rss(sc);
1526 sc->flags |= FULL_INIT_DONE;
1527 }
1528
1529 t3_intr_clear(sc);
1530
1531 /* If it's MSI or INTx, allocate a single interrupt for everything */
1532 if ((sc->flags & USING_MSIX) == 0) {

--- 16 unchanged lines hidden (view full) ---

1549 }
1550 } else {
1551 cxgb_setup_msix(sc, sc->msi_count);
1552 }
1553
1554 t3_sge_start(sc);
1555 t3_intr_enable(sc);
1556
1271 if ((sc->flags & (USING_MSIX | QUEUES_BOUND)) == USING_MSIX)
1557 if ((sc->flags & (USING_MSIX | QUEUES_BOUND)) == USING_MSIX) {
1272 bind_qsets(sc);
1558 bind_qsets(sc);
1273 sc->flags |= QUEUES_BOUND;
1559 setup_hw_filters(sc);
1560 sc->flags |= QUEUES_BOUND;
1561 }
1274out:
1275 return (err);
1276irq_err:
1277 CH_ERR(sc, "request_irq failed, err %d\n", err);
1278 goto out;
1279}
1280
1281

--- 47 unchanged lines hidden (view full) ---

1329 (adapter->open_device_map & ~OFFLOAD_DEVMAP_BIT),
1330 (adapter->open_device_map | OFFLOAD_DEVMAP_BIT)) == 0)
1331 return (0);
1332
1333 ADAPTER_LOCK(pi->adapter);
1334 if (!adap_up)
1335 err = cxgb_up(adapter);
1336 ADAPTER_UNLOCK(pi->adapter);
1562out:
1563 return (err);
1564irq_err:
1565 CH_ERR(sc, "request_irq failed, err %d\n", err);
1566 goto out;
1567}
1568
1569

--- 47 unchanged lines hidden (view full) ---

1617 (adapter->open_device_map & ~OFFLOAD_DEVMAP_BIT),
1618 (adapter->open_device_map | OFFLOAD_DEVMAP_BIT)) == 0)
1619 return (0);
1620
1621 ADAPTER_LOCK(pi->adapter);
1622 if (!adap_up)
1623 err = cxgb_up(adapter);
1624 ADAPTER_UNLOCK(pi->adapter);
1337 if (err < 0)
1625 if (err)
1338 return (err);
1339
1340 t3_tp_set_offload_mode(adapter, 1);
1341 tdev->lldev = adapter->port[0].ifp;
1342 err = cxgb_offload_activate(adapter);
1343 if (err)
1344 goto out;
1345

--- 56 unchanged lines hidden (view full) ---

1402 struct ifnet *ifp;
1403 adapter_t *sc = p->adapter;
1404 int err;
1405
1406 PORT_LOCK_ASSERT_OWNED(p);
1407 ifp = p->ifp;
1408
1409 ADAPTER_LOCK(p->adapter);
1626 return (err);
1627
1628 t3_tp_set_offload_mode(adapter, 1);
1629 tdev->lldev = adapter->port[0].ifp;
1630 err = cxgb_offload_activate(adapter);
1631 if (err)
1632 goto out;
1633

--- 56 unchanged lines hidden (view full) ---

1690 struct ifnet *ifp;
1691 adapter_t *sc = p->adapter;
1692 int err;
1693
1694 PORT_LOCK_ASSERT_OWNED(p);
1695 ifp = p->ifp;
1696
1697 ADAPTER_LOCK(p->adapter);
1410 if ((sc->open_device_map == 0) && ((err = cxgb_up(sc)) < 0)) {
1698 if ((sc->open_device_map == 0) && (err = cxgb_up(sc))) {
1411 ADAPTER_UNLOCK(p->adapter);
1412 cxgb_stop_locked(p);
1413 return;
1414 }
1415 if (p->adapter->open_device_map == 0) {
1416 t3_intr_clear(sc);
1417 t3_sge_init_adapter(sc);
1418 }

--- 442 unchanged lines hidden (view full) ---

1861 check_link_status(sc);
1862
1863 /*
1864 * adapter lock can currently only be acquire after the
1865 * port lock
1866 */
1867 ADAPTER_UNLOCK(sc);
1868
1699 ADAPTER_UNLOCK(p->adapter);
1700 cxgb_stop_locked(p);
1701 return;
1702 }
1703 if (p->adapter->open_device_map == 0) {
1704 t3_intr_clear(sc);
1705 t3_sge_init_adapter(sc);
1706 }

--- 442 unchanged lines hidden (view full) ---

2149 check_link_status(sc);
2150
2151 /*
2152 * adapter lock can currently only be acquire after the
2153 * port lock
2154 */
2155 ADAPTER_UNLOCK(sc);
2156
1869 if (p->rev == T3_REV_B2)
2157 if (p->rev == T3_REV_B2 && p->nports < 4)
1870 check_t3b2_mac(sc);
1871}
1872
2158 check_t3b2_mac(sc);
2159}
2160
2161#if 0
2162static void *
2163filter_get_idx(struct seq_file *seq, loff_t pos)
2164{
2165 int i;
2166 struct adapter *adap = seq->private;
2167 struct filter_info *p = adap->filters;
2168
2169 if (!p)
2170 return NULL;
2171
2172 for (i = 0; i < adap->params.mc5.nfilters; i++, p++)
2173 if (p->valid) {
2174 if (!pos)
2175 return p;
2176 pos--;
2177 }
2178 return NULL;
2179}
2180
2181static void *filter_get_nxt_idx(struct seq_file *seq, struct filter_info *p)
2182{
2183 struct adapter *adap = seq->private;
2184 struct filter_info *end = &adap->filters[adap->params.mc5.nfilters];
2185
2186 while (++p < end && !p->valid)
2187 ;
2188 return p < end ? p : NULL;
2189}
2190
2191static void *filter_seq_start(struct seq_file *seq, loff_t *pos)
2192{
2193 return *pos ? filter_get_idx(seq, *pos - 1) : SEQ_START_TOKEN;
2194}
2195
2196static void *filter_seq_next(struct seq_file *seq, void *v, loff_t *pos)
2197{
2198 v = *pos ? filter_get_nxt_idx(seq, v) : filter_get_idx(seq, 0);
2199 if (v)
2200 ++*pos;
2201 return v;
2202}
2203
2204static void filter_seq_stop(struct seq_file *seq, void *v)
2205{
2206}
2207
2208static int filter_seq_show(struct seq_file *seq, void *v)
2209{
2210 static const char *pkt_type[] = { "any", "tcp", "udp", "frag" };
2211
2212 if (v == SEQ_START_TOKEN)
2213 seq_puts(seq, "index SIP DIP sport "
2214 "dport VLAN PRI MAC type Q\n");
2215 else {
2216 char sip[20], dip[20];
2217 struct filter_info *f = v;
2218 struct adapter *adap = seq->private;
2219
2220 sprintf(sip, NIPQUAD_FMT "/%-2u", HIPQUAD(f->sip),
2221 f->sip_mask ? 33 - ffs(f->sip_mask) : 0);
2222 sprintf(dip, NIPQUAD_FMT, HIPQUAD(f->dip));
2223 seq_printf(seq, "%5zu %18s %15s ", f - adap->filters, sip, dip);
2224 seq_printf(seq, f->sport ? "%5u " : " * ", f->sport);
2225 seq_printf(seq, f->dport ? "%5u " : " * ", f->dport);
2226 seq_printf(seq, f->vlan != 0xfff ? "%4u " : " * ", f->vlan);
2227 seq_printf(seq, f->vlan_prio == FILTER_NO_VLAN_PRI ?
2228 " * " : "%1u/%1u ", f->vlan_prio, f->vlan_prio | 1);
2229 if (!f->mac_vld)
2230 seq_printf(seq, " * ");
2231 else if (f->mac_hit)
2232 seq_printf(seq, "%3u ", f->mac_idx);
2233 else
2234 seq_printf(seq, " -1 ");
2235 seq_printf(seq, "%4s ", pkt_type[f->pkt_type]);
2236 if (!f->pass)
2237 seq_printf(seq, "-\n");
2238 else if (f->rss)
2239 seq_printf(seq, "*\n");
2240 else
2241 seq_printf(seq, "%1u\n", f->qset);
2242 }
2243 return 0;
2244}
2245
2246static struct seq_operations filter_seq_ops = {
2247 .start = filter_seq_start,
2248 .next = filter_seq_next,
2249 .stop = filter_seq_stop,
2250 .show = filter_seq_show
2251};
2252
2253static int filter_seq_open(struct inode *inode, struct file *file)
2254{
2255 int rc = seq_open(file, &filter_seq_ops);
2256
2257 if (!rc) {
2258 struct proc_dir_entry *dp = PDE(inode);
2259 struct seq_file *seq = file->private_data;
2260
2261 seq->private = dp->data;
2262 }
2263 return rc;
2264}
2265
2266static struct file_operations filter_seq_fops = {
2267 .owner = THIS_MODULE,
2268 .open = filter_seq_open,
2269 .read = seq_read,
2270 .llseek = seq_lseek,
2271 .release = seq_release
2272};
2273
2274#endif
2275
1873static int
2276static int
2277set_eeprom(struct port_info *pi, const uint8_t *data, int len, int offset)
2278{
2279 uint8_t *buf;
2280 int err = 0;
2281 u32 aligned_offset, aligned_len, *p;
2282 struct adapter *adapter = pi->adapter;
2283
2284
2285 aligned_offset = offset & ~3;
2286 aligned_len = (len + (offset & 3) + 3) & ~3;
2287
2288 if (aligned_offset != offset || aligned_len != len) {
2289 buf = malloc(aligned_len, M_DEVBUF, M_WAITOK|M_ZERO);
2290 if (!buf)
2291 return (ENOMEM);
2292 err = t3_seeprom_read(adapter, aligned_offset, (u32 *)buf);
2293 if (!err && aligned_len > 4)
2294 err = t3_seeprom_read(adapter,
2295 aligned_offset + aligned_len - 4,
2296 (u32 *)&buf[aligned_len - 4]);
2297 if (err)
2298 goto out;
2299 memcpy(buf + (offset & 3), data, len);
2300 } else
2301 buf = (uint8_t *)(uintptr_t)data;
2302
2303 err = t3_seeprom_wp(adapter, 0);
2304 if (err)
2305 goto out;
2306
2307 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) {
2308 err = t3_seeprom_write(adapter, aligned_offset, *p);
2309 aligned_offset += 4;
2310 }
2311
2312 if (!err)
2313 err = t3_seeprom_wp(adapter, 1);
2314out:
2315 if (buf != data)
2316 free(buf, M_DEVBUF);
2317 return err;
2318}
2319
2320
2321static int
1874in_range(int val, int lo, int hi)
1875{
1876 return val < 0 || (val <= hi && val >= lo);
1877}
1878
1879static int
1880cxgb_extension_open(struct cdev *dev, int flags, int fmp, d_thread_t *td)
1881{

--- 36 unchanged lines hidden (view full) ---

1918
1919 if (!phy->mdio_read)
1920 return (EOPNOTSUPP);
1921 if (is_10G(sc)) {
1922 mmd = mid->phy_id >> 8;
1923 if (!mmd)
1924 mmd = MDIO_DEV_PCS;
1925 else if (mmd > MDIO_DEV_XGXS)
2322in_range(int val, int lo, int hi)
2323{
2324 return val < 0 || (val <= hi && val >= lo);
2325}
2326
2327static int
2328cxgb_extension_open(struct cdev *dev, int flags, int fmp, d_thread_t *td)
2329{

--- 36 unchanged lines hidden (view full) ---

2366
2367 if (!phy->mdio_read)
2368 return (EOPNOTSUPP);
2369 if (is_10G(sc)) {
2370 mmd = mid->phy_id >> 8;
2371 if (!mmd)
2372 mmd = MDIO_DEV_PCS;
2373 else if (mmd > MDIO_DEV_XGXS)
1926 return -EINVAL;
2374 return (EINVAL);
1927
1928 error = phy->mdio_read(sc, mid->phy_id & 0x1f, mmd,
1929 mid->reg_num, &val);
1930 } else
1931 error = phy->mdio_read(sc, mid->phy_id & 0x1f, 0,
1932 mid->reg_num & 0x1f, &val);
1933 if (error == 0)
1934 mid->val_out = val;

--- 73 unchanged lines hidden (view full) ---

2008 edesc->size = ret;
2009 break;
2010 }
2011 case CHELSIO_SET_QSET_PARAMS: {
2012 struct qset_params *q;
2013 struct ch_qset_params *t = (struct ch_qset_params *)data;
2014
2015 if (t->qset_idx >= SGE_QSETS)
2375
2376 error = phy->mdio_read(sc, mid->phy_id & 0x1f, mmd,
2377 mid->reg_num, &val);
2378 } else
2379 error = phy->mdio_read(sc, mid->phy_id & 0x1f, 0,
2380 mid->reg_num & 0x1f, &val);
2381 if (error == 0)
2382 mid->val_out = val;

--- 73 unchanged lines hidden (view full) ---

2456 edesc->size = ret;
2457 break;
2458 }
2459 case CHELSIO_SET_QSET_PARAMS: {
2460 struct qset_params *q;
2461 struct ch_qset_params *t = (struct ch_qset_params *)data;
2462
2463 if (t->qset_idx >= SGE_QSETS)
2016 return -EINVAL;
2464 return (EINVAL);
2017 if (!in_range(t->intr_lat, 0, M_NEWTIMER) ||
2018 !in_range(t->cong_thres, 0, 255) ||
2019 !in_range(t->txq_size[0], MIN_TXQ_ENTRIES,
2020 MAX_TXQ_ENTRIES) ||
2021 !in_range(t->txq_size[1], MIN_TXQ_ENTRIES,
2022 MAX_TXQ_ENTRIES) ||
2023 !in_range(t->txq_size[2], MIN_CTRL_TXQ_ENTRIES,
2024 MAX_CTRL_TXQ_ENTRIES) ||
2025 !in_range(t->fl_size[0], MIN_FL_ENTRIES, MAX_RX_BUFFERS) ||
2026 !in_range(t->fl_size[1], MIN_FL_ENTRIES,
2027 MAX_RX_JUMBO_BUFFERS) ||
2028 !in_range(t->rspq_size, MIN_RSPQ_ENTRIES, MAX_RSPQ_ENTRIES))
2465 if (!in_range(t->intr_lat, 0, M_NEWTIMER) ||
2466 !in_range(t->cong_thres, 0, 255) ||
2467 !in_range(t->txq_size[0], MIN_TXQ_ENTRIES,
2468 MAX_TXQ_ENTRIES) ||
2469 !in_range(t->txq_size[1], MIN_TXQ_ENTRIES,
2470 MAX_TXQ_ENTRIES) ||
2471 !in_range(t->txq_size[2], MIN_CTRL_TXQ_ENTRIES,
2472 MAX_CTRL_TXQ_ENTRIES) ||
2473 !in_range(t->fl_size[0], MIN_FL_ENTRIES, MAX_RX_BUFFERS) ||
2474 !in_range(t->fl_size[1], MIN_FL_ENTRIES,
2475 MAX_RX_JUMBO_BUFFERS) ||
2476 !in_range(t->rspq_size, MIN_RSPQ_ENTRIES, MAX_RSPQ_ENTRIES))
2029 return -EINVAL;
2477 return (EINVAL);
2030 if ((sc->flags & FULL_INIT_DONE) &&
2031 (t->rspq_size >= 0 || t->fl_size[0] >= 0 ||
2032 t->fl_size[1] >= 0 || t->txq_size[0] >= 0 ||
2033 t->txq_size[1] >= 0 || t->txq_size[2] >= 0 ||
2034 t->polling >= 0 || t->cong_thres >= 0))
2478 if ((sc->flags & FULL_INIT_DONE) &&
2479 (t->rspq_size >= 0 || t->fl_size[0] >= 0 ||
2480 t->fl_size[1] >= 0 || t->txq_size[0] >= 0 ||
2481 t->txq_size[1] >= 0 || t->txq_size[2] >= 0 ||
2482 t->polling >= 0 || t->cong_thres >= 0))
2035 return -EBUSY;
2483 return (EBUSY);
2036
2037 q = &sc->params.sge.qset[t->qset_idx];
2038
2039 if (t->rspq_size >= 0)
2040 q->rspq_size = t->rspq_size;
2041 if (t->fl_size[0] >= 0)
2042 q->fl_size = t->fl_size[0];
2043 if (t->fl_size[1] >= 0)

--- 92 unchanged lines hidden (view full) ---

2136 struct ch_mtus *m = (struct ch_mtus *)data;
2137
2138 if (!is_offload(sc))
2139 return (EOPNOTSUPP);
2140
2141 memcpy(m->mtus, sc->params.mtus, sizeof(m->mtus));
2142 m->nmtus = NMTUS;
2143 break;
2484
2485 q = &sc->params.sge.qset[t->qset_idx];
2486
2487 if (t->rspq_size >= 0)
2488 q->rspq_size = t->rspq_size;
2489 if (t->fl_size[0] >= 0)
2490 q->fl_size = t->fl_size[0];
2491 if (t->fl_size[1] >= 0)

--- 92 unchanged lines hidden (view full) ---

2584 struct ch_mtus *m = (struct ch_mtus *)data;
2585
2586 if (!is_offload(sc))
2587 return (EOPNOTSUPP);
2588
2589 memcpy(m->mtus, sc->params.mtus, sizeof(m->mtus));
2590 m->nmtus = NMTUS;
2591 break;
2592 }
2593 case CHELSIO_SET_FILTER: {
2594 struct ch_filter *f = (struct ch_filter *)data;
2595 struct filter_info *p;
2596 int ret;
2597
2598 if (sc->params.mc5.nfilters == 0)
2599 return (EOPNOTSUPP);
2600 if (!(sc->flags & FULL_INIT_DONE))
2601 return (EAGAIN); /* can still change nfilters */
2602 if (sc->filters == NULL)
2603 return (ENOMEM);
2604
2605 if (f->filter_id >= sc->params.mc5.nfilters ||
2606 (f->val.dip && f->mask.dip != 0xffffffff) ||
2607 (f->val.sport && f->mask.sport != 0xffff) ||
2608 (f->val.dport && f->mask.dport != 0xffff) ||
2609 (f->mask.vlan && f->mask.vlan != 0xfff) ||
2610 (f->mask.vlan_prio && f->mask.vlan_prio != 7) ||
2611 (f->mac_addr_idx != 0xffff && f->mac_addr_idx > 15) ||
2612 f->qset >= SGE_QSETS ||
2613 sc->rrss_map[f->qset] >= RSS_TABLE_SIZE)
2614 return (EINVAL);
2615
2616 p = &sc->filters[f->filter_id];
2617 if (p->locked)
2618 return (EPERM);
2619
2620 p->sip = f->val.sip;
2621 p->sip_mask = f->mask.sip;
2622 p->dip = f->val.dip;
2623 p->sport = f->val.sport;
2624 p->dport = f->val.dport;
2625 p->vlan = f->mask.vlan ? f->val.vlan : 0xfff;
2626 p->vlan_prio = f->mask.vlan_prio ? (f->val.vlan_prio & 6) :
2627 FILTER_NO_VLAN_PRI;
2628 p->mac_hit = f->mac_hit;
2629 p->mac_vld = f->mac_addr_idx != 0xffff;
2630 p->mac_idx = f->mac_addr_idx;
2631 p->pkt_type = f->proto;
2632 p->report_filter_id = f->want_filter_id;
2633 p->pass = f->pass;
2634 p->rss = f->rss;
2635 p->qset = f->qset;
2636
2637 ret = set_filter(sc, f->filter_id, p);
2638 if (ret)
2639 return ret;
2640 p->valid = 1;
2641 break;
2642 }
2643 case CHELSIO_DEL_FILTER: {
2644 struct ch_filter *f = (struct ch_filter *)data;
2645 struct filter_info *p;
2646
2647 if (sc->params.mc5.nfilters == 0)
2648 return (EOPNOTSUPP);
2649 if (!(sc->flags & FULL_INIT_DONE))
2650 return (EAGAIN); /* can still change nfilters */
2651 if (sc->filters == NULL)
2652 return (ENOMEM);
2653 if (f->filter_id >= sc->params.mc5.nfilters)
2654 return (EINVAL);
2655
2656 p = &sc->filters[f->filter_id];
2657 if (p->locked)
2658 return (EPERM);
2659 memset(p, 0, sizeof(*p));
2660 p->sip_mask = 0xffffffff;
2661 p->vlan = 0xfff;
2662 p->vlan_prio = FILTER_NO_VLAN_PRI;
2663 p->pkt_type = 1;
2664 return set_filter(sc, f->filter_id, p);
2144 }
2145 case CHELSIO_DEVUP:
2146 if (!is_offload(sc))
2147 return (EOPNOTSUPP);
2148 return offload_open(pi);
2149 break;
2150 case CHELSIO_GET_MEM: {
2151 struct ch_mem_range *t = (struct ch_mem_range *)data;

--- 42 unchanged lines hidden (view full) ---

2194 }
2195 break;
2196 }
2197 case CHELSIO_READ_TCAM_WORD: {
2198 struct ch_tcam_word *t = (struct ch_tcam_word *)data;
2199
2200 if (!is_offload(sc))
2201 return (EOPNOTSUPP);
2665 }
2666 case CHELSIO_DEVUP:
2667 if (!is_offload(sc))
2668 return (EOPNOTSUPP);
2669 return offload_open(pi);
2670 break;
2671 case CHELSIO_GET_MEM: {
2672 struct ch_mem_range *t = (struct ch_mem_range *)data;

--- 42 unchanged lines hidden (view full) ---

2715 }
2716 break;
2717 }
2718 case CHELSIO_READ_TCAM_WORD: {
2719 struct ch_tcam_word *t = (struct ch_tcam_word *)data;
2720
2721 if (!is_offload(sc))
2722 return (EOPNOTSUPP);
2723 if (!(sc->flags & FULL_INIT_DONE))
2724 return (EIO); /* need MC5 */
2202 return -t3_read_mc5_range(&sc->mc5, t->addr, 1, t->buf);
2203 break;
2204 }
2205 case CHELSIO_SET_TRACE_FILTER: {
2206 struct ch_trace *t = (struct ch_trace *)data;
2207 const struct trace_params *tp;
2208
2209 tp = (const struct trace_params *)&t->sip;

--- 126 unchanged lines hidden --- 		2725 return -t3_read_mc5_range(&sc->mc5, t->addr, 1, t->buf);
2726 break;
2727 }
2728 case CHELSIO_SET_TRACE_FILTER: {
2729 struct ch_trace *t = (struct ch_trace *)data;
2730 const struct trace_params *tp;
2731
2732 tp = (const struct trace_params *)&t->sip;

--- 126 unchanged lines hidden ---