if_ath_tx.c (243857) | if_ath_tx.c (244109) |
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1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 15 unchanged lines hidden (view full) --- 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGES. 29 */ 30 31#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 15 unchanged lines hidden (view full) --- 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGES. 29 */ 30 31#include <sys/cdefs.h> |
32__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx.c 243857 2012-12-04 09:32:43Z glebius $"); | 32__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx.c 244109 2012-12-11 04:19:51Z adrian $"); |
33 34/* 35 * Driver for the Atheros Wireless LAN controller. 36 * 37 * This software is derived from work of Atsushi Onoe; his contribution 38 * is greatly appreciated. 39 */ 40 --- 326 unchanged lines hidden (view full) --- 367{ 368 struct ath_hal *ah = sc->sc_ah; 369 char *ds; 370 int i, bp, dsp; 371 HAL_DMA_ADDR bufAddrList[4]; 372 uint32_t segLenList[4]; 373 int numTxMaps = 1; 374 int isFirstDesc = 1; | 33 34/* 35 * Driver for the Atheros Wireless LAN controller. 36 * 37 * This software is derived from work of Atsushi Onoe; his contribution 38 * is greatly appreciated. 39 */ 40 --- 326 unchanged lines hidden (view full) --- 367{ 368 struct ath_hal *ah = sc->sc_ah; 369 char *ds; 370 int i, bp, dsp; 371 HAL_DMA_ADDR bufAddrList[4]; 372 uint32_t segLenList[4]; 373 int numTxMaps = 1; 374 int isFirstDesc = 1; |
375 int qnum; | |
376 377 /* 378 * XXX There's txdma and txdma_mgmt; the descriptor 379 * sizes must match. 380 */ 381 struct ath_descdma *dd = &sc->sc_txdma; 382 383 /* --- 37 unchanged lines hidden (view full) --- 421 422 if (i == bf->bf_nseg - 1) 423 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 424 else 425 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 426 bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 427 428 /* | 375 376 /* 377 * XXX There's txdma and txdma_mgmt; the descriptor 378 * sizes must match. 379 */ 380 struct ath_descdma *dd = &sc->sc_txdma; 381 382 /* --- 37 unchanged lines hidden (view full) --- 420 421 if (i == bf->bf_nseg - 1) 422 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 423 else 424 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 425 bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 426 427 /* |
429 * XXX this assumes that bfs_txq is the actual destination 430 * hardware queue at this point. It may not have been assigned, 431 * it may actually be pointing to the multicast software 432 * TXQ id. These must be fixed! | 428 * XXX This assumes that bfs_txq is the actual destination 429 * hardware queue at this point. It may not have been 430 * assigned, it may actually be pointing to the multicast 431 * software TXQ id. These must be fixed! |
433 */ | 432 */ |
434 qnum = bf->bf_state.bfs_txq->axq_qnum; 435 | |
436 ath_hal_filltxdesc(ah, (struct ath_desc *) ds 437 , bufAddrList 438 , segLenList 439 , bf->bf_descid /* XXX desc id */ | 433 ath_hal_filltxdesc(ah, (struct ath_desc *) ds 434 , bufAddrList 435 , segLenList 436 , bf->bf_descid /* XXX desc id */ |
440 , qnum | 437 , bf->bf_state.bfs_tx_queue |
441 , isFirstDesc /* first segment */ 442 , i == bf->bf_nseg - 1 /* last segment */ 443 , (struct ath_desc *) ds0 /* first descriptor */ 444 ); 445 446 /* 447 * Make sure the 11n aggregate fields are cleared. 448 * --- 24 unchanged lines hidden (view full) --- 473 */ 474 ath_hal_set11n_aggr_middle(sc->sc_ah, 475 (struct ath_desc *) ds, 476 bf->bf_state.bfs_ndelim); 477 } 478 isFirstDesc = 0; 479#ifdef ATH_DEBUG 480 if (sc->sc_debug & ATH_DEBUG_XMIT) | 438 , isFirstDesc /* first segment */ 439 , i == bf->bf_nseg - 1 /* last segment */ 440 , (struct ath_desc *) ds0 /* first descriptor */ 441 ); 442 443 /* 444 * Make sure the 11n aggregate fields are cleared. 445 * --- 24 unchanged lines hidden (view full) --- 470 */ 471 ath_hal_set11n_aggr_middle(sc->sc_ah, 472 (struct ath_desc *) ds, 473 bf->bf_state.bfs_ndelim); 474 } 475 isFirstDesc = 0; 476#ifdef ATH_DEBUG 477 if (sc->sc_debug & ATH_DEBUG_XMIT) |
481 ath_printtxbuf(sc, bf, qnum, 0, 0); | 478 ath_printtxbuf(sc, bf, bf->bf_state.bfs_tx_queue, 479 0, 0); |
482#endif 483 bf->bf_lastds = (struct ath_desc *) ds; 484 485 /* 486 * Don't forget to skip to the next descriptor. 487 */ 488 ds += sc->sc_tx_desclen; 489 dsp++; --- 202 unchanged lines hidden (view full) --- 692 693/* 694 * Hand-off a frame to the multicast TX queue. 695 * 696 * This is a software TXQ which will be appended to the CAB queue 697 * during the beacon setup code. 698 * 699 * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID | 480#endif 481 bf->bf_lastds = (struct ath_desc *) ds; 482 483 /* 484 * Don't forget to skip to the next descriptor. 485 */ 486 ds += sc->sc_tx_desclen; 487 dsp++; --- 202 unchanged lines hidden (view full) --- 690 691/* 692 * Hand-off a frame to the multicast TX queue. 693 * 694 * This is a software TXQ which will be appended to the CAB queue 695 * during the beacon setup code. 696 * 697 * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID |
700 * as part of the TX descriptor, bf_state.bfs_txq must be updated | 698 * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated |
701 * with the actual hardware txq, or all of this will fall apart. 702 * 703 * XXX It may not be a bad idea to just stuff the QCU ID into bf_state | 699 * with the actual hardware txq, or all of this will fall apart. 700 * 701 * XXX It may not be a bad idea to just stuff the QCU ID into bf_state |
704 * and retire bfs_txq; then make sure the CABQ QCU ID is populated | 702 * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated |
705 * correctly. 706 */ 707static void 708ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 709 struct ath_buf *bf) 710{ 711 ATH_TX_LOCK_ASSERT(sc); 712 --- 1122 unchanged lines hidden (view full) --- 1835 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1836 is_ampdu = is_ampdu_tx | is_ampdu_pending; 1837 1838 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1839 __func__, tid, pri, is_ampdu); 1840 1841 /* Set local packet state, used to queue packets to hardware */ 1842 bf->bf_state.bfs_tid = tid; | 703 * correctly. 704 */ 705static void 706ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 707 struct ath_buf *bf) 708{ 709 ATH_TX_LOCK_ASSERT(sc); 710 --- 1122 unchanged lines hidden (view full) --- 1833 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1834 is_ampdu = is_ampdu_tx | is_ampdu_pending; 1835 1836 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1837 __func__, tid, pri, is_ampdu); 1838 1839 /* Set local packet state, used to queue packets to hardware */ 1840 bf->bf_state.bfs_tid = tid; |
1843 bf->bf_state.bfs_txq = txq; | 1841 bf->bf_state.bfs_tx_queue = txq->axq_qnum; |
1844 bf->bf_state.bfs_pri = pri; 1845 1846 /* 1847 * When servicing one or more stations in power-save mode 1848 * (or) if there is some mcast data waiting on the mcast 1849 * queue (to prevent out of order delivery) multicast frames 1850 * must be bufferd until after the beacon. 1851 * 1852 * TODO: we should lock the mcastq before we check the length. 1853 */ 1854 if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1855 txq = &avp->av_mcastq; 1856 /* 1857 * Mark the frame as eventually belonging on the CAB 1858 * queue, so the descriptor setup functions will 1859 * correctly initialise the descriptor 'qcuId' field. 1860 */ | 1842 bf->bf_state.bfs_pri = pri; 1843 1844 /* 1845 * When servicing one or more stations in power-save mode 1846 * (or) if there is some mcast data waiting on the mcast 1847 * queue (to prevent out of order delivery) multicast frames 1848 * must be bufferd until after the beacon. 1849 * 1850 * TODO: we should lock the mcastq before we check the length. 1851 */ 1852 if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1853 txq = &avp->av_mcastq; 1854 /* 1855 * Mark the frame as eventually belonging on the CAB 1856 * queue, so the descriptor setup functions will 1857 * correctly initialise the descriptor 'qcuId' field. 1858 */ |
1861 bf->bf_state.bfs_txq = sc->sc_cabq; | 1859 bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; |
1862 } 1863 1864 /* Do the generic frame setup */ 1865 /* XXX should just bzero the bf_state? */ 1866 bf->bf_state.bfs_dobaw = 0; 1867 1868 /* A-MPDU TX? Manually set sequence number */ 1869 /* --- 239 unchanged lines hidden (view full) --- 2109 bf->bf_state.bfs_keyix = keyix; 2110 bf->bf_state.bfs_txantenna = txantenna; 2111 bf->bf_state.bfs_txflags = flags; 2112 bf->bf_state.bfs_shpream = 2113 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2114 2115 /* Set local packet state, used to queue packets to hardware */ 2116 bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); | 1860 } 1861 1862 /* Do the generic frame setup */ 1863 /* XXX should just bzero the bf_state? */ 1864 bf->bf_state.bfs_dobaw = 0; 1865 1866 /* A-MPDU TX? Manually set sequence number */ 1867 /* --- 239 unchanged lines hidden (view full) --- 2107 bf->bf_state.bfs_keyix = keyix; 2108 bf->bf_state.bfs_txantenna = txantenna; 2109 bf->bf_state.bfs_txflags = flags; 2110 bf->bf_state.bfs_shpream = 2111 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2112 2113 /* Set local packet state, used to queue packets to hardware */ 2114 bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); |
2117 bf->bf_state.bfs_txq = sc->sc_ac2q[pri]; | 2115 bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; |
2118 bf->bf_state.bfs_pri = pri; 2119 2120 /* XXX this should be done in ath_tx_setrate() */ 2121 bf->bf_state.bfs_ctsrate = 0; 2122 bf->bf_state.bfs_ctsduration = 0; 2123 bf->bf_state.bfs_ismrr = ismrr; 2124 2125 /* Blank the legacy rate array */ --- 582 unchanged lines hidden (view full) --- 2708 * If the frame is out of BAW, queue. 2709 * Otherwise, schedule it as a single frame. 2710 */ 2711static void 2712ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 2713 struct ath_txq *txq, struct ath_buf *bf) 2714{ 2715 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; | 2116 bf->bf_state.bfs_pri = pri; 2117 2118 /* XXX this should be done in ath_tx_setrate() */ 2119 bf->bf_state.bfs_ctsrate = 0; 2120 bf->bf_state.bfs_ctsduration = 0; 2121 bf->bf_state.bfs_ismrr = ismrr; 2122 2123 /* Blank the legacy rate array */ --- 582 unchanged lines hidden (view full) --- 2706 * If the frame is out of BAW, queue. 2707 * Otherwise, schedule it as a single frame. 2708 */ 2709static void 2710ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 2711 struct ath_txq *txq, struct ath_buf *bf) 2712{ 2713 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; |
2716// struct ath_txq *txq = bf->bf_state.bfs_txq; | |
2717 struct ieee80211_tx_ampdu *tap; 2718 | 2714 struct ieee80211_tx_ampdu *tap; 2715 |
2719 if (txq != bf->bf_state.bfs_txq) { 2720 device_printf(sc->sc_dev, "%s: txq %d != bfs_txq %d!\n", 2721 __func__, 2722 txq->axq_qnum, 2723 bf->bf_state.bfs_txq->axq_qnum); 2724 } 2725 | |
2726 ATH_TX_LOCK_ASSERT(sc); 2727 2728 tap = ath_tx_get_tx_tid(an, tid->tid); 2729 2730 /* paused? queue */ 2731 if (tid->paused) { 2732 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 2733 /* XXX don't sched - we're paused! */ --- 82 unchanged lines hidden (view full) --- 2816 tid = ath_tx_gettid(sc, m0); 2817 atid = &an->an_tid[tid]; 2818 2819 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 2820 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2821 2822 /* Set local packet state, used to queue packets to hardware */ 2823 /* XXX potentially duplicate info, re-check */ | 2716 ATH_TX_LOCK_ASSERT(sc); 2717 2718 tap = ath_tx_get_tx_tid(an, tid->tid); 2719 2720 /* paused? queue */ 2721 if (tid->paused) { 2722 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 2723 /* XXX don't sched - we're paused! */ --- 82 unchanged lines hidden (view full) --- 2806 tid = ath_tx_gettid(sc, m0); 2807 atid = &an->an_tid[tid]; 2808 2809 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 2810 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2811 2812 /* Set local packet state, used to queue packets to hardware */ 2813 /* XXX potentially duplicate info, re-check */ |
2824 /* XXX remember, txq must be the hardware queue, not the av_mcastq */ | |
2825 bf->bf_state.bfs_tid = tid; | 2814 bf->bf_state.bfs_tid = tid; |
2826 bf->bf_state.bfs_txq = txq; | 2815 bf->bf_state.bfs_tx_queue = txq->axq_qnum; |
2827 bf->bf_state.bfs_pri = pri; 2828 2829 /* 2830 * If the hardware queue isn't busy, queue it directly. 2831 * If the hardware queue is busy, queue it. 2832 * If the TID is paused or the traffic it outside BAW, software 2833 * queue it. 2834 */ --- 2029 unchanged lines hidden (view full) --- 4864 * Setup the relevant descriptor fields 4865 * for aggregation. The first descriptor 4866 * already points to the rest in the chain. 4867 */ 4868 ath_tx_setds_11n(sc, bf); 4869 4870 } 4871 queuepkt: | 2816 bf->bf_state.bfs_pri = pri; 2817 2818 /* 2819 * If the hardware queue isn't busy, queue it directly. 2820 * If the hardware queue is busy, queue it. 2821 * If the TID is paused or the traffic it outside BAW, software 2822 * queue it. 2823 */ --- 2029 unchanged lines hidden (view full) --- 4853 * Setup the relevant descriptor fields 4854 * for aggregation. The first descriptor 4855 * already points to the rest in the chain. 4856 */ 4857 ath_tx_setds_11n(sc, bf); 4858 4859 } 4860 queuepkt: |
4872 //txq = bf->bf_state.bfs_txq; 4873 | |
4874 /* Set completion handler, multi-frame aggregate or not */ 4875 bf->bf_comp = ath_tx_aggr_comp; 4876 4877 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 4878 device_printf(sc->sc_dev, "%s: TID=16?\n", __func__); 4879 4880 /* Punt to txq */ 4881 ath_tx_handoff(sc, txq, bf); --- 49 unchanged lines hidden (view full) --- 4931 4932 bf = ATH_TID_FIRST(tid); 4933 if (bf == NULL) { 4934 break; 4935 } 4936 4937 ATH_TID_REMOVE(tid, bf, bf_list); 4938 | 4861 /* Set completion handler, multi-frame aggregate or not */ 4862 bf->bf_comp = ath_tx_aggr_comp; 4863 4864 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 4865 device_printf(sc->sc_dev, "%s: TID=16?\n", __func__); 4866 4867 /* Punt to txq */ 4868 ath_tx_handoff(sc, txq, bf); --- 49 unchanged lines hidden (view full) --- 4918 4919 bf = ATH_TID_FIRST(tid); 4920 if (bf == NULL) { 4921 break; 4922 } 4923 4924 ATH_TID_REMOVE(tid, bf, bf_list); 4925 |
4939 KASSERT(txq == bf->bf_state.bfs_txq, ("txqs not equal!\n")); 4940 | |
4941 /* Sanity check! */ 4942 if (tid->tid != bf->bf_state.bfs_tid) { 4943 device_printf(sc->sc_dev, "%s: bfs_tid %d !=" 4944 " tid %d\n", 4945 __func__, bf->bf_state.bfs_tid, tid->tid); 4946 } 4947 /* Normal completion handler */ 4948 bf->bf_comp = ath_tx_normal_comp; --- 577 unchanged lines hidden --- | 4926 /* Sanity check! */ 4927 if (tid->tid != bf->bf_state.bfs_tid) { 4928 device_printf(sc->sc_dev, "%s: bfs_tid %d !=" 4929 " tid %d\n", 4930 __func__, bf->bf_state.bfs_tid, tid->tid); 4931 } 4932 /* Normal completion handler */ 4933 bf->bf_comp = ath_tx_normal_comp; --- 577 unchanged lines hidden --- |