| if_ath_tx.c (238350) | if_ath_tx.c (238609) |
|---|---|
| 1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30#include <sys/cdefs.h> |
| 31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx.c 238350 2012-07-10 18:57:05Z jhb $"); | 31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx.c 238609 2012-07-19 03:51:16Z adrian $"); |
| 32 33/* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 --- 265 unchanged lines hidden (view full) --- 305 306 /* 307 * Fillin the remainder of the descriptor info. 308 */ 309 ds0 = ds = bf->bf_desc; 310 for (i = 0; i < bf->bf_nseg; i++, ds++) { 311 ds->ds_data = bf->bf_segs[i].ds_addr; 312 if (i == bf->bf_nseg - 1) | 32 33/* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 --- 265 unchanged lines hidden (view full) --- 305 306 /* 307 * Fillin the remainder of the descriptor info. 308 */ 309 ds0 = ds = bf->bf_desc; 310 for (i = 0; i < bf->bf_nseg; i++, ds++) { 311 ds->ds_data = bf->bf_segs[i].ds_addr; 312 if (i == bf->bf_nseg - 1) |
| 313 ds->ds_link = 0; | 313 ath_hal_settxdesclink(ah, ds, 0); |
| 314 else | 314 else |
| 315 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); | 315 ath_hal_settxdesclink(ah, ds, 316 bf->bf_daddr + sizeof(*ds) * (i + 1)); |
| 316 ath_hal_filltxdesc(ah, ds 317 , bf->bf_segs[i].ds_len /* segment length */ 318 , i == 0 /* first segment */ 319 , i == bf->bf_nseg - 1 /* last segment */ 320 , ds0 /* first descriptor */ 321 ); 322 DPRINTF(sc, ATH_DEBUG_XMIT, 323 "%s: %d: %08x %08x %08x %08x %08x %08x\n", --- 21 unchanged lines hidden (view full) --- 345 346 /* 347 * There's no need to call ath_hal_setupfirsttxdesc here; 348 * That's only going to occur for the first frame in an aggregate. 349 */ 350 for (i = 0; i < bf->bf_nseg; i++, ds++) { 351 ds->ds_data = bf->bf_segs[i].ds_addr; 352 if (i == bf->bf_nseg - 1) | 317 ath_hal_filltxdesc(ah, ds 318 , bf->bf_segs[i].ds_len /* segment length */ 319 , i == 0 /* first segment */ 320 , i == bf->bf_nseg - 1 /* last segment */ 321 , ds0 /* first descriptor */ 322 ); 323 DPRINTF(sc, ATH_DEBUG_XMIT, 324 "%s: %d: %08x %08x %08x %08x %08x %08x\n", --- 21 unchanged lines hidden (view full) --- 346 347 /* 348 * There's no need to call ath_hal_setupfirsttxdesc here; 349 * That's only going to occur for the first frame in an aggregate. 350 */ 351 for (i = 0; i < bf->bf_nseg; i++, ds++) { 352 ds->ds_data = bf->bf_segs[i].ds_addr; 353 if (i == bf->bf_nseg - 1) |
| 353 ds->ds_link = 0; | 354 ath_hal_settxdesclink(ah, ds, 0); |
| 354 else | 355 else |
| 355 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); | 356 ath_hal_settxdesclink(ah, ds, 357 bf->bf_daddr + sizeof(*ds) * (i + 1)); |
| 356 357 /* 358 * This performs the setup for an aggregate frame. 359 * This includes enabling the aggregate flags if needed. 360 */ 361 ath_hal_chaintxdesc(ah, ds, 362 bf->bf_state.bfs_pktlen, 363 bf->bf_state.bfs_hdrlen, --- 45 unchanged lines hidden (view full) --- 409 /* Sub-frame setup */ 410 ath_tx_chaindesclist_subframe(sc, bf); 411 412 /* 413 * Link the last descriptor of the previous frame 414 * to the beginning descriptor of this frame. 415 */ 416 if (bf_prev != NULL) | 358 359 /* 360 * This performs the setup for an aggregate frame. 361 * This includes enabling the aggregate flags if needed. 362 */ 363 ath_hal_chaintxdesc(ah, ds, 364 bf->bf_state.bfs_pktlen, 365 bf->bf_state.bfs_hdrlen, --- 45 unchanged lines hidden (view full) --- 411 /* Sub-frame setup */ 412 ath_tx_chaindesclist_subframe(sc, bf); 413 414 /* 415 * Link the last descriptor of the previous frame 416 * to the beginning descriptor of this frame. 417 */ 418 if (bf_prev != NULL) |
| 417 bf_prev->bf_lastds->ds_link = bf->bf_daddr; | 419 ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 420 bf->bf_daddr); |
| 418 419 /* Save a copy so we can link the next descriptor in */ 420 bf_prev = bf; 421 bf = bf->bf_next; 422 } 423 424 /* 425 * Setup first descriptor of first frame. --- 51 unchanged lines hidden (view full) --- 477 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 478 bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap, 479 BUS_DMASYNC_PREWRITE); 480 481 /* link descriptor */ 482 *txq->axq_link = bf->bf_daddr; 483 } 484 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); | 421 422 /* Save a copy so we can link the next descriptor in */ 423 bf_prev = bf; 424 bf = bf->bf_next; 425 } 426 427 /* 428 * Setup first descriptor of first frame. --- 51 unchanged lines hidden (view full) --- 480 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 481 bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap, 482 BUS_DMASYNC_PREWRITE); 483 484 /* link descriptor */ 485 *txq->axq_link = bf->bf_daddr; 486 } 487 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); |
| 485 txq->axq_link = &bf->bf_lastds->ds_link; | 488 ath_hal_gettxdesclinkptr(sc->sc_ah, bf->bf_lastds, &txq->axq_link); |
| 486} 487 488/* 489 * Hand-off packet to a hardware queue. 490 */ 491static void 492ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 493 struct ath_buf *bf) --- 117 unchanged lines hidden (view full) --- 611 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 612 txq->axq_qnum, txq->axq_link, 613 (caddr_t)bf->bf_daddr, bf->bf_desc, 614 txq->axq_depth); 615 } 616#endif /* IEEE80211_SUPPORT_TDMA */ 617 if (bf->bf_state.bfs_aggr) 618 txq->axq_aggr_depth++; | 489} 490 491/* 492 * Hand-off packet to a hardware queue. 493 */ 494static void 495ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 496 struct ath_buf *bf) --- 117 unchanged lines hidden (view full) --- 614 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 615 txq->axq_qnum, txq->axq_link, 616 (caddr_t)bf->bf_daddr, bf->bf_desc, 617 txq->axq_depth); 618 } 619#endif /* IEEE80211_SUPPORT_TDMA */ 620 if (bf->bf_state.bfs_aggr) 621 txq->axq_aggr_depth++; |
| 619 txq->axq_link = &bf->bf_lastds->ds_link; | 622 ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); |
| 620 ath_hal_txstart(ah, txq->axq_qnum); 621 } 622} 623 624/* 625 * Restart TX DMA for the given TXQ. 626 * 627 * This must be called whether the queue is empty or not. --- 12 unchanged lines hidden (view full) --- 640 /* XXX make this ATH_TXQ_FIRST */ 641 bf = TAILQ_FIRST(&txq->axq_q); 642 bf_last = ATH_TXQ_LAST(txq, axq_q_s); 643 644 if (bf == NULL) 645 return; 646 647 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); | 623 ath_hal_txstart(ah, txq->axq_qnum); 624 } 625} 626 627/* 628 * Restart TX DMA for the given TXQ. 629 * 630 * This must be called whether the queue is empty or not. --- 12 unchanged lines hidden (view full) --- 643 /* XXX make this ATH_TXQ_FIRST */ 644 bf = TAILQ_FIRST(&txq->axq_q); 645 bf_last = ATH_TXQ_LAST(txq, axq_q_s); 646 647 if (bf == NULL) 648 return; 649 650 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); |
| 648 txq->axq_link = &bf_last->bf_lastds->ds_link; | 651 ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); |
| 649 ath_hal_txstart(ah, txq->axq_qnum); 650} 651 652/* 653 * Hand off a packet to the hardware (or mcast queue.) 654 * 655 * The relevant hardware txq should be locked. 656 */ --- 3796 unchanged lines hidden --- | 652 ath_hal_txstart(ah, txq->axq_qnum); 653} 654 655/* 656 * Hand off a packet to the hardware (or mcast queue.) 657 * 658 * The relevant hardware txq should be locked. 659 */ --- 3796 unchanged lines hidden --- |