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aic7xxx_osm.c (66510) aic7xxx_osm.c (66647)
1/*
2 * Bus independent FreeBSD shim for the aic7xxx based adaptec SCSI controllers
3 *
4 * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $Id$
32 *
1/*
2 * Bus independent FreeBSD shim for the aic7xxx based adaptec SCSI controllers
3 *
4 * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $Id$
32 *
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx_osm.c 66510 2000-10-01 20:56:44Z gibbs $
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx_osm.c 66647 2000-10-05 04:24:14Z gibbs $
34 */
35
36#include <dev/aic7xxx/aic7xxx_freebsd.h>
37#include <dev/aic7xxx/aic7xxx_inline.h>
38
39#include <sys/eventhandler.h>
40
41#ifndef AHC_TMODE_ENABLE

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133 } else {
134 bus_id = 0;
135 bus_id2 = 1;
136 }
137
138 /*
139 * Create the device queue for our SIM(s).
140 */
34 */
35
36#include <dev/aic7xxx/aic7xxx_freebsd.h>
37#include <dev/aic7xxx/aic7xxx_inline.h>
38
39#include <sys/eventhandler.h>
40
41#ifndef AHC_TMODE_ENABLE

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133 } else {
134 bus_id = 0;
135 bus_id2 = 1;
136 }
137
138 /*
139 * Create the device queue for our SIM(s).
140 */
141 devq = cam_simq_alloc(AHC_SCB_MAX);
141 devq = cam_simq_alloc(AHC_SCB_MAX - 1);
142 if (devq == NULL)
143 goto fail;
144
145 /*
146 * Construct our first channel SIM entry
147 */
148 sim = cam_sim_alloc(ahc_action, ahc_poll, "ahc", ahc,
149 device_get_unit(ahc->dev_softc),
142 if (devq == NULL)
143 goto fail;
144
145 /*
146 * Construct our first channel SIM entry
147 */
148 sim = cam_sim_alloc(ahc_action, ahc_poll, "ahc", ahc,
149 device_get_unit(ahc->dev_softc),
150 1, AHC_SCB_MAX, devq);
150 1, AHC_SCB_MAX - 1, devq);
151 if (sim == NULL) {
152 cam_simq_free(devq);
153 goto fail;
154 }
155
156 if (xpt_bus_register(sim, bus_id) != CAM_SUCCESS) {
157 cam_sim_free(sim, /*free_devq*/TRUE);
158 sim = NULL;

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174 csa.callback = ahc_async;
175 csa.callback_arg = sim;
176 xpt_action((union ccb *)&csa);
177 count++;
178
179 if (ahc->features & AHC_TWIN) {
180 sim2 = cam_sim_alloc(ahc_action, ahc_poll, "ahc",
181 ahc, device_get_unit(ahc->dev_softc), 1,
151 if (sim == NULL) {
152 cam_simq_free(devq);
153 goto fail;
154 }
155
156 if (xpt_bus_register(sim, bus_id) != CAM_SUCCESS) {
157 cam_sim_free(sim, /*free_devq*/TRUE);
158 sim = NULL;

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174 csa.callback = ahc_async;
175 csa.callback_arg = sim;
176 xpt_action((union ccb *)&csa);
177 count++;
178
179 if (ahc->features & AHC_TWIN) {
180 sim2 = cam_sim_alloc(ahc_action, ahc_poll, "ahc",
181 ahc, device_get_unit(ahc->dev_softc), 1,
182 AHC_SCB_MAX, devq);
182 AHC_SCB_MAX - 1, devq);
183
184 if (sim2 == NULL) {
185 printf("ahc_attach: Unable to attach second "
186 "bus due to resource shortage");
187 goto fail;
188 }
189
190 if (xpt_bus_register(sim2, bus_id2) != CAM_SUCCESS) {

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1068
1069 if (error != 0) {
1070 if (error == EFBIG)
1071 ahc_set_transaction_status(scb, CAM_REQ_TOO_BIG);
1072 else
1073 ahc_set_transaction_status(scb, CAM_REQ_CMP_ERR);
1074 if (nsegments != 0)
1075 bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
183
184 if (sim2 == NULL) {
185 printf("ahc_attach: Unable to attach second "
186 "bus due to resource shortage");
187 goto fail;
188 }
189
190 if (xpt_bus_register(sim2, bus_id2) != CAM_SUCCESS) {

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1068
1069 if (error != 0) {
1070 if (error == EFBIG)
1071 ahc_set_transaction_status(scb, CAM_REQ_TOO_BIG);
1072 else
1073 ahc_set_transaction_status(scb, CAM_REQ_CMP_ERR);
1074 if (nsegments != 0)
1075 bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
1076 ahc_lock(ahc, &s);
1076 ahc_free_scb(ahc, scb);
1077 ahc_free_scb(ahc, scb);
1078 ahc_unlock(ahc, &s);
1077 xpt_done(ccb);
1078 return;
1079 }
1080 if (nsegments != 0) {
1081 struct ahc_dma_seg *sg;
1082 bus_dma_segment_t *end_seg;
1083 bus_dmasync_op_t op;
1084

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1135
1136 nsegments++;
1137 if (nsegments > AHC_NSEG) {
1138
1139 ahc_set_transaction_status(scb,
1140 CAM_REQ_TOO_BIG);
1141 bus_dmamap_unload(ahc->buffer_dmat,
1142 scb->dmamap);
1079 xpt_done(ccb);
1080 return;
1081 }
1082 if (nsegments != 0) {
1083 struct ahc_dma_seg *sg;
1084 bus_dma_segment_t *end_seg;
1085 bus_dmasync_op_t op;
1086

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1137
1138 nsegments++;
1139 if (nsegments > AHC_NSEG) {
1140
1141 ahc_set_transaction_status(scb,
1142 CAM_REQ_TOO_BIG);
1143 bus_dmamap_unload(ahc->buffer_dmat,
1144 scb->dmamap);
1145 ahc_lock(ahc, &s);
1143 ahc_free_scb(ahc, scb);
1146 ahc_free_scb(ahc, scb);
1147 ahc_unlock(ahc, &s);
1144 xpt_done(ccb);
1145 return;
1146 }
1147 sg->addr = ahc->dma_bug_buf;
1148 sg->len = 1;
1149 sg++;
1150 }
1151 }

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1169 * Last time we need to check if this SCB needs to
1170 * be aborted.
1171 */
1172 if (ahc_get_transaction_status(scb) != CAM_REQ_INPROG) {
1173 if (nsegments != 0)
1174 bus_dmamap_unload(ahc->buffer_dmat,
1175 scb->dmamap);
1176 ahc_free_scb(ahc, scb);
1148 xpt_done(ccb);
1149 return;
1150 }
1151 sg->addr = ahc->dma_bug_buf;
1152 sg->len = 1;
1153 sg++;
1154 }
1155 }

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1173 * Last time we need to check if this SCB needs to
1174 * be aborted.
1175 */
1176 if (ahc_get_transaction_status(scb) != CAM_REQ_INPROG) {
1177 if (nsegments != 0)
1178 bus_dmamap_unload(ahc->buffer_dmat,
1179 scb->dmamap);
1180 ahc_free_scb(ahc, scb);
1177 xpt_done(ccb);
1178 ahc_unlock(ahc, &s);
1181 ahc_unlock(ahc, &s);
1182 xpt_done(ccb);
1179 return;
1180 }
1181
1182 LIST_INSERT_HEAD(&ahc->pending_scbs, scb, pending_links);
1183
1184 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1185
1186 if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {

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1241 ccb_h = &csio->ccb_h;
1242
1243 if (ccb_h->func_code == XPT_SCSI_IO) {
1244 hscb->cdb_len = csio->cdb_len;
1245 if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
1246
1247 if (hscb->cdb_len > sizeof(hscb->cdb32)
1248 || (ccb_h->flags & CAM_CDB_PHYS) != 0) {
1183 return;
1184 }
1185
1186 LIST_INSERT_HEAD(&ahc->pending_scbs, scb, pending_links);
1187
1188 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1189
1190 if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {

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1245 ccb_h = &csio->ccb_h;
1246
1247 if (ccb_h->func_code == XPT_SCSI_IO) {
1248 hscb->cdb_len = csio->cdb_len;
1249 if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
1250
1251 if (hscb->cdb_len > sizeof(hscb->cdb32)
1252 || (ccb_h->flags & CAM_CDB_PHYS) != 0) {
1253 u_long s;
1254
1249 ahc_set_transaction_status(scb,
1250 CAM_REQ_INVALID);
1255 ahc_set_transaction_status(scb,
1256 CAM_REQ_INVALID);
1251 xpt_done(scb->io_ctx);
1257 ahc_lock(ahc, &s);
1252 ahc_free_scb(ahc, scb);
1258 ahc_free_scb(ahc, scb);
1259 ahc_unlock(ahc, &s);
1260 xpt_done((union ccb *)csio);
1253 return;
1254 }
1255 if (hscb->cdb_len > 12) {
1256 memcpy(hscb->cdb32,
1257 csio->cdb_io.cdb_ptr,
1258 hscb->cdb_len);
1259 hscb->shared_data.cdb_ptr = scb->cdb32_busaddr;
1260 } else {

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1261 return;
1262 }
1263 if (hscb->cdb_len > 12) {
1264 memcpy(hscb->cdb32,
1265 csio->cdb_io.cdb_ptr,
1266 hscb->cdb_len);
1267 hscb->shared_data.cdb_ptr = scb->cdb32_busaddr;
1268 } else {

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