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aic7xxx.seq (71717) aic7xxx.seq (72325)
1/*
2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
3 *
4 * Copyright (c) 1994-2001 Justin Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
1/*
2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
3 *
4 * Copyright (c) 1994-2001 Justin Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $Id: //depot/src/aic7xxx/aic7xxx.seq#16 $
31 * $Id: //depot/src/aic7xxx/aic7xxx.seq#19 $
32 *
32 *
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 71717 2001-01-27 20:54:24Z gibbs $
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 72325 2001-02-10 18:04:27Z gibbs $
34 */
35
36#include "aic7xxx.reg"
37#include "scsi_message.h"
38
39/*
40 * A few words on the waiting SCB list:
41 * After starting the selection hardware, we check for reconnecting targets

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897 test SSTAT0, TARGET jnz ultra2_dma_loop;
898 }
899 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
900 test SSTAT1,PHASEMIS jz ultra2_dma_loop;
901 }
902
903ultra2_dmafinish:
904 test DFCNTRL, DIRECTION jnz ultra2_dmafifoempty;
34 */
35
36#include "aic7xxx.reg"
37#include "scsi_message.h"
38
39/*
40 * A few words on the waiting SCB list:
41 * After starting the selection hardware, we check for reconnecting targets

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897 test SSTAT0, TARGET jnz ultra2_dma_loop;
898 }
899 if ((ahc->flags & AHC_INITIATORROLE) != 0) {
900 test SSTAT1,PHASEMIS jz ultra2_dma_loop;
901 }
902
903ultra2_dmafinish:
904 test DFCNTRL, DIRECTION jnz ultra2_dmafifoempty;
905 and DFCNTRL, ~SCSIEN;
906 test DFCNTRL, SCSIEN jnz .;
907 if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
908 test DFSTATUS, FIFOEMP jnz ultra2_dmafifoempty;
905 if ((ahc->features & AHC_DT) == 0) {
906 and DFCNTRL, ~SCSIEN;
907 test DFCNTRL, SCSIEN jnz .;
909 }
910ultra2_dmafifoflush:
911 if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
912 /*
913 * On Rev A of the aic7890, the autoflush
914 * features doesn't function correctly.
915 * Perform an explicit manual flush. During
916 * a manual flush, the FIFOEMP bit becomes

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1459 * it to the QINFIFO and tell us not to post to the QOUTFIFO by setting
1460 * RETURN_1 to SEND_SENSE.
1461 */
1462
1463/*
1464 * If ATN is raised, we still want to give the target a message.
1465 * Perhaps there was a parity error on this last message byte.
1466 * Either way, the target should take us to message out phase
908 }
909ultra2_dmafifoflush:
910 if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
911 /*
912 * On Rev A of the aic7890, the autoflush
913 * features doesn't function correctly.
914 * Perform an explicit manual flush. During
915 * a manual flush, the FIFOEMP bit becomes

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1458 * it to the QINFIFO and tell us not to post to the QOUTFIFO by setting
1459 * RETURN_1 to SEND_SENSE.
1460 */
1461
1462/*
1463 * If ATN is raised, we still want to give the target a message.
1464 * Perhaps there was a parity error on this last message byte.
1465 * Either way, the target should take us to message out phase
1467 * and then attempt to complete the command again.
1468 * XXX - Need a critical section to do this corrctly. Wait until
1469 * we queue completions.
1466 * and then attempt to complete the command again. We should use a
1467 * critical section here to guard against a timeout triggering
1468 * for this command and setting ATN while we are still processing
1469 * the completion.
1470 test SCSISIGI, ATNI jnz mesgin_done;
1471 */
1472
1473/*
1474 * See if we attempted to deliver a message but the target ingnored us.
1475 */
1476 test SCB_CONTROL, MK_MESSAGE jz . + 2;
1477 mvi MKMSG_FAILED call set_seqint;

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1604mesgin_identify:
1605 /*
1606 * Determine whether a target is using tagged or non-tagged
1607 * transactions by first looking at the transaction stored in
1608 * the busy target array. If there is no untagged transaction
1609 * for this target or the transaction is for a different lun, then
1610 * this must be an untagged transaction.
1611 */
1470 test SCSISIGI, ATNI jnz mesgin_done;
1471 */
1472
1473/*
1474 * See if we attempted to deliver a message but the target ingnored us.
1475 */
1476 test SCB_CONTROL, MK_MESSAGE jz . + 2;
1477 mvi MKMSG_FAILED call set_seqint;

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1604mesgin_identify:
1605 /*
1606 * Determine whether a target is using tagged or non-tagged
1607 * transactions by first looking at the transaction stored in
1608 * the busy target array. If there is no untagged transaction
1609 * for this target or the transaction is for a different lun, then
1610 * this must be an untagged transaction.
1611 */
1612 shr SINDEX, 4, SELID;
1612 shr SINDEX, 4, SAVED_SCSIID;
1613 and SAVED_LUN, MSG_IDENTIFY_LUNMASK, A;
1614 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1615 add SINDEX, SCB_64_BTT;
1616 mov SCBPTR, SAVED_LUN;
1617 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1618 add NONE, -SCB_64_BTT, SINDEX;
1619 jc . + 2;
1620 mvi INTSTAT, OUT_OF_RANGE;

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2030 * The PCI module will only issue a PCI
2031 * retry if the data FIFO is empty. If the
2032 * host disconnects in the middle of a
2033 * transfer, we must empty the fifo of all
2034 * available data to force the chip to
2035 * continue the transfer. This does not
2036 * happen for SCSI transfers as the SCSI module
2037 * will drain the FIFO as data is made available.
1613 and SAVED_LUN, MSG_IDENTIFY_LUNMASK, A;
1614 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1615 add SINDEX, SCB_64_BTT;
1616 mov SCBPTR, SAVED_LUN;
1617 if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
1618 add NONE, -SCB_64_BTT, SINDEX;
1619 jc . + 2;
1620 mvi INTSTAT, OUT_OF_RANGE;

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2030 * The PCI module will only issue a PCI
2031 * retry if the data FIFO is empty. If the
2032 * host disconnects in the middle of a
2033 * transfer, we must empty the fifo of all
2034 * available data to force the chip to
2035 * continue the transfer. This does not
2036 * happen for SCSI transfers as the SCSI module
2037 * will drain the FIFO as data is made available.
2038 * When the hang occurs, we know that at least
2039 * 8 bytes are in the FIFO because the PCI
2038 * When the hang occurs, we know that a multiple
2039 * of 8 bytes are in the FIFO because the PCI
2040 * module has an 8 byte input latch that only
2041 * dumps to the FIFO when HCNT == 0 or the
2042 * latch is full.
2043 */
2040 * module has an 8 byte input latch that only
2041 * dumps to the FIFO when HCNT == 0 or the
2042 * latch is full.
2043 */
2044 mvi A, -24;
2044 clr A;
2045 /* Wait for some data to arrive. */
2046dma_scb_hang_fifo:
2047 test DFSTATUS, FIFOEMP jnz dma_scb_hang_fifo;
2048dma_scb_hang_wait:
2049 test DFSTATUS, MREQPEND jnz dma_scb_hang_wait;
2050 test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
2051 test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
2052 test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
2053 /*
2045 /* Wait for some data to arrive. */
2046dma_scb_hang_fifo:
2047 test DFSTATUS, FIFOEMP jnz dma_scb_hang_fifo;
2048dma_scb_hang_wait:
2049 test DFSTATUS, MREQPEND jnz dma_scb_hang_wait;
2050 test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
2051 test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
2052 test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
2053 /*
2054 * The PCI no longer intends to perform a PCI
2055 * transaction and HDONE has not come true.
2054 * The PCI module no longer intends to perform
2055 * a PCI transaction and HDONE has not come true.
2056 * We are hung. Drain the fifo.
2057 */
2058dma_scb_hang_empty_fifo:
2056 * We are hung. Drain the fifo.
2057 */
2058dma_scb_hang_empty_fifo:
2059 call dfdat_in_8;
2060 add A, 8;
2061 add SINDEX, A, HCNT;
2062 /*
2059 /*
2063 * The result will be <= 0 (carry set) if at
2064 * least 8 bytes of data have been placed
2065 * into the fifo.
2060 * Skip lines not yet transfered into the FIFO.
2066 */
2061 */
2067 jc dma_scb_hang_empty_fifo;
2062 add SINDEX, 7, HCNT;
2063 shr SINDEX, 3;
2064
2065 /*
2066 * Skip lines already copied out of the FIFO.
2067 */
2068 add A, A, SINDEX;
2069
2070 call dma_scb_hang_dma_drain_fifo;
2071
2072 /*
2073 * Set the lines transferred to all but
2074 * those yet to reach the FIFO.
2075 */
2076 not SINDEX;
2077 add A, 5, SINDEX;
2068 jmp dma_scb_hang_fifo;
2069dma_scb_hang_dma_done:
2070 and DFCNTRL, ~HDMAEN;
2071 test DFCNTRL, HDMAEN jnz .;
2078 jmp dma_scb_hang_fifo;
2079dma_scb_hang_dma_done:
2080 and DFCNTRL, ~HDMAEN;
2081 test DFCNTRL, HDMAEN jnz .;
2072 call dfdat_in_8;
2073 add A, 8;
2074 cmp A, 8 jne . - 2;
2082dma_scb_hang_dma_drain_fifo:
2083 add SEQADDR0, A;
2075 } else {
2076 call dma_finish;
2084 } else {
2085 call dma_finish;
2077 /* If we were putting the SCB, we are done */
2078 call dfdat_in_8;
2079 call dfdat_in_8;
2080 call dfdat_in_8;
2081 }
2086 }
2087 /* If we were putting the SCB, we are done */
2088 call dfdat_in_8;
2089 call dfdat_in_8;
2090 call dfdat_in_8;
2082dfdat_in_8:
2083 mov DINDIR,DFDAT;
2084dfdat_in_7:
2085 mov DINDIR,DFDAT;
2086 mov DINDIR,DFDAT;
2087 mov DINDIR,DFDAT;
2088 mov DINDIR,DFDAT;
2089 mov DINDIR,DFDAT;

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2091dfdat_in_8:
2092 mov DINDIR,DFDAT;
2093dfdat_in_7:
2094 mov DINDIR,DFDAT;
2095 mov DINDIR,DFDAT;
2096 mov DINDIR,DFDAT;
2097 mov DINDIR,DFDAT;
2098 mov DINDIR,DFDAT;

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