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aic7xxx.c (66371) aic7xxx.c (66647)
1/*
2 * Core routines and tables shareable across OS platforms.
3 *
4 * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
1/*
2 * Core routines and tables shareable across OS platforms.
3 *
4 * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $Id: //depot/src/aic7xxx/aic7xxx.c#4 $
31 * $Id: //depot/src/aic7xxx/aic7xxx.c#9 $
32 *
32 *
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.c 66371 2000-09-25 21:56:19Z gibbs $
33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.c 66647 2000-10-05 04:24:14Z gibbs $
34 */
35
36#ifdef __linux__
37#include "aic7xxx_linux.h"
38#include "aic7xxx_inline.h"
39#include "aicasm/aicasm_insformat.h"
40#endif
41

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129#include "aic7xxx_seq.h"
130
131/**************************** Function Declarations ***************************/
132static struct tmode_tstate*
133 ahc_alloc_tstate(struct ahc_softc *ahc,
134 u_int scsi_id, char channel);
135static void ahc_free_tstate(struct ahc_softc *ahc,
136 u_int scsi_id, char channel, int force);
34 */
35
36#ifdef __linux__
37#include "aic7xxx_linux.h"
38#include "aic7xxx_inline.h"
39#include "aicasm/aicasm_insformat.h"
40#endif
41

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129#include "aic7xxx_seq.h"
130
131/**************************** Function Declarations ***************************/
132static struct tmode_tstate*
133 ahc_alloc_tstate(struct ahc_softc *ahc,
134 u_int scsi_id, char channel);
135static void ahc_free_tstate(struct ahc_softc *ahc,
136 u_int scsi_id, char channel, int force);
137static void ahc_qinfifo_requeue(struct ahc_softc *ahc,
138 struct scb *prev_scb,
139 struct scb *scb);
137static struct ahc_syncrate*
138 ahc_devlimited_syncrate(struct ahc_softc *ahc,
139 u_int *period,
140 u_int *ppr_options);
141static void ahc_update_target_msg_request(struct ahc_softc *ahc,
142 struct ahc_devinfo *devinfo,
143 struct ahc_initiator_tinfo *tinfo,
144 int force, int paused);

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149 struct ahc_devinfo *devinfo,
150 struct scb *scb);
151static void ahc_setup_initiator_msgout(struct ahc_softc *ahc,
152 struct ahc_devinfo *devinfo,
153 struct scb *scb);
154static void ahc_build_transfer_msg(struct ahc_softc *ahc,
155 struct ahc_devinfo *devinfo);
156static void ahc_construct_sdtr(struct ahc_softc *ahc,
140static struct ahc_syncrate*
141 ahc_devlimited_syncrate(struct ahc_softc *ahc,
142 u_int *period,
143 u_int *ppr_options);
144static void ahc_update_target_msg_request(struct ahc_softc *ahc,
145 struct ahc_devinfo *devinfo,
146 struct ahc_initiator_tinfo *tinfo,
147 int force, int paused);

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152 struct ahc_devinfo *devinfo,
153 struct scb *scb);
154static void ahc_setup_initiator_msgout(struct ahc_softc *ahc,
155 struct ahc_devinfo *devinfo,
156 struct scb *scb);
157static void ahc_build_transfer_msg(struct ahc_softc *ahc,
158 struct ahc_devinfo *devinfo);
159static void ahc_construct_sdtr(struct ahc_softc *ahc,
160 struct ahc_devinfo *devinfo,
157 u_int period, u_int offset);
158static void ahc_construct_wdtr(struct ahc_softc *ahc,
161 u_int period, u_int offset);
162static void ahc_construct_wdtr(struct ahc_softc *ahc,
163 struct ahc_devinfo *devinfo,
159 u_int bus_width);
160static void ahc_construct_ppr(struct ahc_softc *ahc,
164 u_int bus_width);
165static void ahc_construct_ppr(struct ahc_softc *ahc,
166 struct ahc_devinfo *devinfo,
161 u_int period, u_int offset,
162 u_int bus_width, u_int ppr_options);
163static void ahc_clear_msg_state(struct ahc_softc *ahc);
164static void ahc_handle_message_phase(struct ahc_softc *ahc);
165static int ahc_sent_msg(struct ahc_softc *ahc,
166 u_int msgtype, int full);
167static int ahc_parse_msg(struct ahc_softc *ahc,
168 struct ahc_devinfo *devinfo);

--- 48 unchanged lines hidden (view full) ---

217#endif
218/************************* Sequencer Execution Control ************************/
219/*
220 * Restart the sequencer program from address zero
221 */
222void
223restart_sequencer(struct ahc_softc *ahc)
224{
167 u_int period, u_int offset,
168 u_int bus_width, u_int ppr_options);
169static void ahc_clear_msg_state(struct ahc_softc *ahc);
170static void ahc_handle_message_phase(struct ahc_softc *ahc);
171static int ahc_sent_msg(struct ahc_softc *ahc,
172 u_int msgtype, int full);
173static int ahc_parse_msg(struct ahc_softc *ahc,
174 struct ahc_devinfo *devinfo);

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223#endif
224/************************* Sequencer Execution Control ************************/
225/*
226 * Restart the sequencer program from address zero
227 */
228void
229restart_sequencer(struct ahc_softc *ahc)
230{
225 u_int i;
226
227 pause_sequencer(ahc);
231 pause_sequencer(ahc);
228
229 /* XXX Use critical code sections.... */
230 /*
231 * Everytime we restart the sequencer, there
232 * is the possiblitity that we have restarted
233 * within a three instruction window where an
234 * SCB has been marked free but has not made it
235 * onto the free list. Since SCSI events(bus reset,
236 * unexpected bus free) will always freeze the
237 * sequencer, we cannot close this window. To
238 * avoid losing an SCB, we reconsitute the free
239 * list every time we restart the sequencer.
240 */
241 ahc_outb(ahc, FREE_SCBH, SCB_LIST_NULL);
242 for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
243
244 ahc_outb(ahc, SCBPTR, i);
245 if (ahc_inb(ahc, SCB_TAG) == SCB_LIST_NULL) {
246 ahc_add_curscb_to_free_list(ahc);
247 }
248 }
249 ahc_outb(ahc, SCSISIGO, 0); /* De-assert BSY */
250 ahc_outb(ahc, MSG_OUT, MSG_NOOP); /* No message to send */
251 ahc_outb(ahc, SXFRCTL1, ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
252 /* Always allow reselection */
253 ahc_outb(ahc, SCSISEQ,
254 ahc_inb(ahc, SCSISEQ_TEMPLATE) & (ENSELI|ENRSELI|ENAUTOATNP));
255 if ((ahc->features & AHC_CMD_CHAN) != 0) {
256 /* Ensure that no DMA operations are in progress */

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282 * that only support 32bit load and store
283 * operations.
284 */
285 modnext = ahc->qoutfifonext & ~0x3;
286 *((uint32_t *)(&ahc->qoutfifo[modnext])) = 0xFFFFFFFFUL;
287 }
288 ahc->qoutfifonext++;
289
232 ahc_outb(ahc, SCSISIGO, 0); /* De-assert BSY */
233 ahc_outb(ahc, MSG_OUT, MSG_NOOP); /* No message to send */
234 ahc_outb(ahc, SXFRCTL1, ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
235 /* Always allow reselection */
236 ahc_outb(ahc, SCSISEQ,
237 ahc_inb(ahc, SCSISEQ_TEMPLATE) & (ENSELI|ENRSELI|ENAUTOATNP));
238 if ((ahc->features & AHC_CMD_CHAN) != 0) {
239 /* Ensure that no DMA operations are in progress */

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265 * that only support 32bit load and store
266 * operations.
267 */
268 modnext = ahc->qoutfifonext & ~0x3;
269 *((uint32_t *)(&ahc->qoutfifo[modnext])) = 0xFFFFFFFFUL;
270 }
271 ahc->qoutfifonext++;
272
290 scb = &ahc->scb_data->scbarray[scb_index];
291 if (scb_index >= ahc->scb_data->numscbs
292 || (scb->flags & SCB_ACTIVE) == 0) {
273 scb = ahc_lookup_scb(ahc, scb_index);
274 if (scb == NULL) {
293 printf("%s: WARNING no command for scb %d "
294 "(cmdcmplt)\nQOUTPOS = %d\n",
295 ahc_name(ahc), scb_index,
296 ahc->qoutfifonext - 1);
297 continue;
298 }
299
300 /*

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373 * the request.
374 */
375 ahc_outb(ahc, CLRINT, CLRSEQINT);
376 switch (intstat & SEQINT_MASK) {
377 case BAD_STATUS:
378 {
379 u_int scb_index;
380 struct hardware_scb *hscb;
275 printf("%s: WARNING no command for scb %d "
276 "(cmdcmplt)\nQOUTPOS = %d\n",
277 ahc_name(ahc), scb_index,
278 ahc->qoutfifonext - 1);
279 continue;
280 }
281
282 /*

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355 * the request.
356 */
357 ahc_outb(ahc, CLRINT, CLRSEQINT);
358 switch (intstat & SEQINT_MASK) {
359 case BAD_STATUS:
360 {
361 u_int scb_index;
362 struct hardware_scb *hscb;
363
381 /*
364 /*
365 * Set the default return value to 0 (don't
366 * send sense). The sense code will change
367 * this if needed.
368 */
369 ahc_outb(ahc, RETURN_1, 0);
370
371 /*
382 * The sequencer will notify us when a command
383 * has an error that would be of interest to
384 * the kernel. This allows us to leave the sequencer
385 * running in the common case of command completes
386 * without error. The sequencer will already have
387 * dma'd the SCB back up to us, so we can reference
388 * the in kernel copy directly.
389 */
390 scb_index = ahc_inb(ahc, SCB_TAG);
372 * The sequencer will notify us when a command
373 * has an error that would be of interest to
374 * the kernel. This allows us to leave the sequencer
375 * running in the common case of command completes
376 * without error. The sequencer will already have
377 * dma'd the SCB back up to us, so we can reference
378 * the in kernel copy directly.
379 */
380 scb_index = ahc_inb(ahc, SCB_TAG);
391 scb = &ahc->scb_data->scbarray[scb_index];
392
393 /*
394 * Set the default return value to 0 (don't
395 * send sense). The sense code will change
396 * this if needed.
397 */
398 ahc_outb(ahc, RETURN_1, 0);
399 if (!(scb_index < ahc->scb_data->numscbs
400 && (scb->flags & SCB_ACTIVE) != 0)) {
381 scb = ahc_lookup_scb(ahc, scb_index);
382 if (scb == NULL) {
401 printf("%s:%c:%d: ahc_intr - referenced scb "
402 "not valid during seqint 0x%x scb(%d)\n",
403 ahc_name(ahc), devinfo.channel,
404 devinfo.target, intstat, scb_index);
405 goto unpause;
406 }
407
408 hscb = scb->hscb;

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640 return;
641 }
642
643 if (devinfo.role == ROLE_INITIATOR) {
644 struct scb *scb;
645 u_int scb_index;
646
647 scb_index = ahc_inb(ahc, SCB_TAG);
383 printf("%s:%c:%d: ahc_intr - referenced scb "
384 "not valid during seqint 0x%x scb(%d)\n",
385 ahc_name(ahc), devinfo.channel,
386 devinfo.target, intstat, scb_index);
387 goto unpause;
388 }
389
390 hscb = scb->hscb;

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622 return;
623 }
624
625 if (devinfo.role == ROLE_INITIATOR) {
626 struct scb *scb;
627 u_int scb_index;
628
629 scb_index = ahc_inb(ahc, SCB_TAG);
648 scb = &ahc->scb_data->scbarray[scb_index];
630 scb = ahc_lookup_scb(ahc, scb_index);
649
631
632 if (scb == NULL)
633 panic("HOST_MSG_LOOP with "
634 "invalid SCB %x\n", scb_index);
635
650 if (bus_phase == P_MESGOUT)
651 ahc_setup_initiator_msgout(ahc,
652 &devinfo,
653 scb);
654 else {
655 ahc->msg_type =
656 MSG_TYPE_INITIATOR_MSGIN;
657 ahc->msgin_index = 0;

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712 * Unfortunately, none of the counters get updated
713 * when the controller is in this mode, so we have
714 * no way of knowing how large the overrun was.
715 */
716 u_int scbindex = ahc_inb(ahc, SCB_TAG);
717 u_int lastphase = ahc_inb(ahc, LASTPHASE);
718 u_int i;
719
636 if (bus_phase == P_MESGOUT)
637 ahc_setup_initiator_msgout(ahc,
638 &devinfo,
639 scb);
640 else {
641 ahc->msg_type =
642 MSG_TYPE_INITIATOR_MSGIN;
643 ahc->msgin_index = 0;

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698 * Unfortunately, none of the counters get updated
699 * when the controller is in this mode, so we have
700 * no way of knowing how large the overrun was.
701 */
702 u_int scbindex = ahc_inb(ahc, SCB_TAG);
703 u_int lastphase = ahc_inb(ahc, LASTPHASE);
704 u_int i;
705
720 scb = &ahc->scb_data->scbarray[scbindex];
706 scb = ahc_lookup_scb(ahc, scbindex);
721 for (i = 0; i < num_phases; i++) {
722 if (lastphase == phase_table[i].phase)
723 break;
724 }
725 ahc_print_path(ahc, scb);
726 printf("data overrun detected %s."
727 " Tag == 0x%x.\n",
728 phase_table[i].phasemsg,

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775ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
776{
777 u_int scb_index;
778 u_int status;
779 struct scb *scb;
780 char cur_channel;
781 char intr_channel;
782
707 for (i = 0; i < num_phases; i++) {
708 if (lastphase == phase_table[i].phase)
709 break;
710 }
711 ahc_print_path(ahc, scb);
712 printf("data overrun detected %s."
713 " Tag == 0x%x.\n",
714 phase_table[i].phasemsg,

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761ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
762{
763 u_int scb_index;
764 u_int status;
765 struct scb *scb;
766 char cur_channel;
767 char intr_channel;
768
769 /* Make sure the sequencer is in a safe location. */
770 ahc_clear_critical_section(ahc);
771
783 if ((ahc->features & AHC_TWIN) != 0
784 && ((ahc_inb(ahc, SBLKCTL) & SELBUSB) != 0))
785 cur_channel = 'B';
786 else
787 cur_channel = 'A';
788 intr_channel = cur_channel;
789
790 status = ahc_inb(ahc, SSTAT1);

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800 printf("%s: Spurious SCSI interrupt\n", ahc_name(ahc));
801 ahc_outb(ahc, CLRINT, CLRSCSIINT);
802 unpause_sequencer(ahc);
803 return;
804 }
805 }
806
807 scb_index = ahc_inb(ahc, SCB_TAG);
772 if ((ahc->features & AHC_TWIN) != 0
773 && ((ahc_inb(ahc, SBLKCTL) & SELBUSB) != 0))
774 cur_channel = 'B';
775 else
776 cur_channel = 'A';
777 intr_channel = cur_channel;
778
779 status = ahc_inb(ahc, SSTAT1);

--- 9 unchanged lines hidden (view full) ---

789 printf("%s: Spurious SCSI interrupt\n", ahc_name(ahc));
790 ahc_outb(ahc, CLRINT, CLRSCSIINT);
791 unpause_sequencer(ahc);
792 return;
793 }
794 }
795
796 scb_index = ahc_inb(ahc, SCB_TAG);
808 if (scb_index < ahc->scb_data->numscbs) {
809 scb = &ahc->scb_data->scbarray[scb_index];
810 if ((scb->flags & SCB_ACTIVE) == 0
811 || (ahc_inb(ahc, SEQ_FLAGS) & IDENTIFY_SEEN) == 0)
812 scb = NULL;
813 } else
797 scb = ahc_lookup_scb(ahc, scb_index);
798 if (scb != NULL
799 && (ahc_inb(ahc, SEQ_FLAGS) & IDENTIFY_SEEN) == 0)
814 scb = NULL;
815
816 if ((status & SCSIRSTI) != 0) {
817 printf("%s: Someone reset channel %c\n",
818 ahc_name(ahc), intr_channel);
819 ahc_reset_channel(ahc, intr_channel, /* Initiate Reset */FALSE);
820 } else if ((status & SCSIPERR) != 0) {
821 /*

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1015 restart_sequencer(ahc);
1016 } else if ((status & SELTO) != 0) {
1017 u_int scbptr;
1018
1019 scbptr = ahc_inb(ahc, WAITING_SCBH);
1020 ahc_outb(ahc, SCBPTR, scbptr);
1021 scb_index = ahc_inb(ahc, SCB_TAG);
1022
800 scb = NULL;
801
802 if ((status & SCSIRSTI) != 0) {
803 printf("%s: Someone reset channel %c\n",
804 ahc_name(ahc), intr_channel);
805 ahc_reset_channel(ahc, intr_channel, /* Initiate Reset */FALSE);
806 } else if ((status & SCSIPERR) != 0) {
807 /*

--- 193 unchanged lines hidden (view full) ---

1001 restart_sequencer(ahc);
1002 } else if ((status & SELTO) != 0) {
1003 u_int scbptr;
1004
1005 scbptr = ahc_inb(ahc, WAITING_SCBH);
1006 ahc_outb(ahc, SCBPTR, scbptr);
1007 scb_index = ahc_inb(ahc, SCB_TAG);
1008
1023 if (scb_index < ahc->scb_data->numscbs) {
1024 scb = &ahc->scb_data->scbarray[scb_index];
1025 if ((scb->flags & SCB_ACTIVE) == 0)
1026 scb = NULL;
1027 } else
1028 scb = NULL;
1029
1009 scb = ahc_lookup_scb(ahc, scb_index);
1030 if (scb == NULL) {
1031 printf("%s: ahc_intr - referenced scb not "
1032 "valid during SELTO scb(%d, %d)\n",
1033 ahc_name(ahc), scbptr, scb_index);
1034 } else {
1035 ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
1036 ahc_freeze_devq(ahc, scb);
1037 }

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1059 ahc_print_path(ahc, scb);
1060 printf("Unknown SCSIINT. Status = 0x%x\n", status);
1061 ahc_outb(ahc, CLRSINT1, status);
1062 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1063 unpause_sequencer(ahc);
1064 }
1065}
1066
1010 if (scb == NULL) {
1011 printf("%s: ahc_intr - referenced scb not "
1012 "valid during SELTO scb(%d, %d)\n",
1013 ahc_name(ahc), scbptr, scb_index);
1014 } else {
1015 ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
1016 ahc_freeze_devq(ahc, scb);
1017 }

--- 21 unchanged lines hidden (view full) ---

1039 ahc_print_path(ahc, scb);
1040 printf("Unknown SCSIINT. Status = 0x%x\n", status);
1041 ahc_outb(ahc, CLRSINT1, status);
1042 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1043 unpause_sequencer(ahc);
1044 }
1045}
1046
1047void
1048ahc_clear_critical_section(struct ahc_softc *ahc)
1049{
1050 int stepping;
1067
1051
1052 if (ahc->num_critical_sections == 0)
1053 return;
1054
1055 stepping = FALSE;
1056 for (;;) {
1057 struct cs *cs;
1058 u_int seqaddr;
1059 u_int i;
1060
1061 seqaddr = ahc_inb(ahc, SEQADDR0)
1062 | (ahc_inb(ahc, SEQADDR1) << 8);
1063
1064 cs = ahc->critical_sections;
1065 for (i = 0; i < ahc->num_critical_sections; i++, cs++) {
1066
1067 if (cs->begin < seqaddr && cs->end >= seqaddr)
1068 break;
1069 }
1070
1071 if (i == ahc->num_critical_sections)
1072 break;
1073
1074 if (!stepping) {
1075 ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) | STEP);
1076 stepping = TRUE;
1077 }
1078 ahc_outb(ahc, HCNTRL, ahc->unpause);
1079 do {
1080 ahc_delay(200);
1081 } while (!sequencer_paused(ahc));
1082 }
1083 if (stepping)
1084 ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) & ~STEP);
1085}
1086
1068/*
1069 * Clear any pending interrupt status.
1070 */
1071void
1072ahc_clear_intstat(struct ahc_softc *ahc)
1073{
1074 /* Clear any interrupt conditions this may have caused */
1075 ahc_outb(ahc, CLRSINT0, CLRSELDO|CLRSELDI|CLRSELINGO);

--- 341 unchanged lines hidden (view full) ---

1417ahc_set_syncrate(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
1418 struct ahc_syncrate *syncrate, u_int period,
1419 u_int offset, u_int ppr_options, u_int type, int paused)
1420{
1421 struct ahc_initiator_tinfo *tinfo;
1422 struct tmode_tstate *tstate;
1423 u_int old_period;
1424 u_int old_offset;
1087/*
1088 * Clear any pending interrupt status.
1089 */
1090void
1091ahc_clear_intstat(struct ahc_softc *ahc)
1092{
1093 /* Clear any interrupt conditions this may have caused */
1094 ahc_outb(ahc, CLRSINT0, CLRSELDO|CLRSELDI|CLRSELINGO);

--- 341 unchanged lines hidden (view full) ---

1436ahc_set_syncrate(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
1437 struct ahc_syncrate *syncrate, u_int period,
1438 u_int offset, u_int ppr_options, u_int type, int paused)
1439{
1440 struct ahc_initiator_tinfo *tinfo;
1441 struct tmode_tstate *tstate;
1442 u_int old_period;
1443 u_int old_offset;
1444 u_int old_ppr;
1425 int active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
1426
1427 if (syncrate == NULL) {
1428 period = 0;
1429 offset = 0;
1430 }
1431
1432 tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
1433 devinfo->target, &tstate);
1434 old_period = tinfo->current.period;
1435 old_offset = tinfo->current.offset;
1445 int active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
1446
1447 if (syncrate == NULL) {
1448 period = 0;
1449 offset = 0;
1450 }
1451
1452 tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
1453 devinfo->target, &tstate);
1454 old_period = tinfo->current.period;
1455 old_offset = tinfo->current.offset;
1456 old_ppr = tinfo->current.ppr_options;
1436
1437 if ((type & AHC_TRANS_CUR) != 0
1457
1458 if ((type & AHC_TRANS_CUR) != 0
1438 && (old_period != period || old_offset != offset)) {
1459 && (old_period != period
1460 || old_offset != offset
1461 || old_ppr != ppr_options)) {
1439 u_int scsirate;
1440
1441 scsirate = tinfo->scsirate;
1442 if ((ahc->features & AHC_ULTRA2) != 0) {
1443
1444 scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);
1445 if (syncrate != NULL) {
1446 scsirate |= syncrate->sxfr_u2;

--- 208 unchanged lines hidden (view full) ---

1655 if (scb_tag != SCB_LIST_NULL) {
1656 struct ahc_devinfo devinfo;
1657 struct scb *pending_scb;
1658 struct hardware_scb *pending_hscb;
1659 struct ahc_initiator_tinfo *tinfo;
1660 struct tmode_tstate *tstate;
1661 u_int control;
1662
1462 u_int scsirate;
1463
1464 scsirate = tinfo->scsirate;
1465 if ((ahc->features & AHC_ULTRA2) != 0) {
1466
1467 scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);
1468 if (syncrate != NULL) {
1469 scsirate |= syncrate->sxfr_u2;

--- 208 unchanged lines hidden (view full) ---

1678 if (scb_tag != SCB_LIST_NULL) {
1679 struct ahc_devinfo devinfo;
1680 struct scb *pending_scb;
1681 struct hardware_scb *pending_hscb;
1682 struct ahc_initiator_tinfo *tinfo;
1683 struct tmode_tstate *tstate;
1684 u_int control;
1685
1663 pending_scb = &ahc->scb_data->scbarray[scb_tag];
1686 pending_scb = ahc_lookup_scb(ahc, scb_tag);
1664 if (pending_scb->flags == SCB_FREE)
1665 continue;
1666 pending_hscb = pending_scb->hscb;
1667 ahc_scb_devinfo(ahc, &devinfo, pending_scb);
1668 tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
1669 devinfo.our_scsiid,
1670 devinfo.target, &tstate);
1671 control = ahc_inb(ahc, SCB_CONTROL);

--- 196 unchanged lines hidden (view full) ---

1868 period = tinfo->goal.period;
1869 ppr_options = tinfo->goal.ppr_options;
1870 if (use_ppr == 0)
1871 ppr_options = 0;
1872 rate = ahc_devlimited_syncrate(ahc, &period, &ppr_options);
1873 offset = tinfo->goal.offset;
1874 ahc_validate_offset(ahc, rate, &offset,
1875 tinfo->current.width);
1687 if (pending_scb->flags == SCB_FREE)
1688 continue;
1689 pending_hscb = pending_scb->hscb;
1690 ahc_scb_devinfo(ahc, &devinfo, pending_scb);
1691 tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
1692 devinfo.our_scsiid,
1693 devinfo.target, &tstate);
1694 control = ahc_inb(ahc, SCB_CONTROL);

--- 196 unchanged lines hidden (view full) ---

1891 period = tinfo->goal.period;
1892 ppr_options = tinfo->goal.ppr_options;
1893 if (use_ppr == 0)
1894 ppr_options = 0;
1895 rate = ahc_devlimited_syncrate(ahc, &period, &ppr_options);
1896 offset = tinfo->goal.offset;
1897 ahc_validate_offset(ahc, rate, &offset,
1898 tinfo->current.width);
1876 if (use_ppr)
1877 ahc_construct_ppr(ahc, period, offset,
1899 if (use_ppr) {
1900 ahc_construct_ppr(ahc, devinfo, period, offset,
1878 tinfo->goal.width, ppr_options);
1901 tinfo->goal.width, ppr_options);
1879 else
1880 ahc_construct_sdtr(ahc, period, offset);
1902 } else {
1903 ahc_construct_sdtr(ahc, devinfo, period, offset);
1904 }
1881 } else {
1905 } else {
1882 ahc_construct_wdtr(ahc, tinfo->goal.width);
1906 ahc_construct_wdtr(ahc, devinfo, tinfo->goal.width);
1883 }
1884}
1885
1886/*
1887 * Build a synchronous negotiation message in our message
1888 * buffer based on the input parameters.
1889 */
1890static void
1907 }
1908}
1909
1910/*
1911 * Build a synchronous negotiation message in our message
1912 * buffer based on the input parameters.
1913 */
1914static void
1891ahc_construct_sdtr(struct ahc_softc *ahc, u_int period, u_int offset)
1915ahc_construct_sdtr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
1916 u_int period, u_int offset)
1892{
1893 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
1894 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR_LEN;
1895 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR;
1896 ahc->msgout_buf[ahc->msgout_index++] = period;
1897 ahc->msgout_buf[ahc->msgout_index++] = offset;
1898 ahc->msgout_len += 5;
1917{
1918 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
1919 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR_LEN;
1920 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR;
1921 ahc->msgout_buf[ahc->msgout_index++] = period;
1922 ahc->msgout_buf[ahc->msgout_index++] = offset;
1923 ahc->msgout_len += 5;
1924 if (bootverbose) {
1925 printf("(%s:%c:%d:%d): Sending SDTR period %x, offset %x\n",
1926 ahc_name(ahc), devinfo->channel, devinfo->target,
1927 devinfo->lun, period, offset);
1928 }
1899}
1900
1901/*
1902 * Build a wide negotiateion message in our message
1903 * buffer based on the input parameters.
1904 */
1905static void
1929}
1930
1931/*
1932 * Build a wide negotiateion message in our message
1933 * buffer based on the input parameters.
1934 */
1935static void
1906ahc_construct_wdtr(struct ahc_softc *ahc, u_int bus_width)
1936ahc_construct_wdtr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
1937 u_int bus_width)
1907{
1908 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
1909 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR_LEN;
1910 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR;
1911 ahc->msgout_buf[ahc->msgout_index++] = bus_width;
1912 ahc->msgout_len += 4;
1938{
1939 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
1940 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR_LEN;
1941 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR;
1942 ahc->msgout_buf[ahc->msgout_index++] = bus_width;
1943 ahc->msgout_len += 4;
1944 if (bootverbose) {
1945 printf("(%s:%c:%d:%d): Sending WDTR %x\n",
1946 ahc_name(ahc), devinfo->channel, devinfo->target,
1947 devinfo->lun, bus_width);
1948 }
1913}
1914
1915/*
1916 * Build a parallel protocol request message in our message
1917 * buffer based on the input parameters.
1918 */
1919static void
1949}
1950
1951/*
1952 * Build a parallel protocol request message in our message
1953 * buffer based on the input parameters.
1954 */
1955static void
1920ahc_construct_ppr(struct ahc_softc *ahc, u_int period, u_int offset,
1921 u_int bus_width, u_int ppr_options)
1956ahc_construct_ppr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
1957 u_int period, u_int offset, u_int bus_width,
1958 u_int ppr_options)
1922{
1923 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
1924 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR_LEN;
1925 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR;
1926 ahc->msgout_buf[ahc->msgout_index++] = period;
1927 ahc->msgout_buf[ahc->msgout_index++] = 0;
1928 ahc->msgout_buf[ahc->msgout_index++] = offset;
1929 ahc->msgout_buf[ahc->msgout_index++] = bus_width;
1930 ahc->msgout_buf[ahc->msgout_index++] = ppr_options;
1931 ahc->msgout_len += 8;
1959{
1960 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
1961 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR_LEN;
1962 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR;
1963 ahc->msgout_buf[ahc->msgout_index++] = period;
1964 ahc->msgout_buf[ahc->msgout_index++] = 0;
1965 ahc->msgout_buf[ahc->msgout_index++] = offset;
1966 ahc->msgout_buf[ahc->msgout_index++] = bus_width;
1967 ahc->msgout_buf[ahc->msgout_index++] = ppr_options;
1968 ahc->msgout_len += 8;
1969 if (bootverbose) {
1970 printf("(%s:%c:%d:%d): Sending PPR bus_width %x, period %x, "
1971 "offset %x, ppr_options %x\n", ahc_name(ahc),
1972 devinfo->channel, devinfo->target, devinfo->lun,
1973 bus_width, period, offset, ppr_options);
1974 }
1932}
1933
1934/*
1935 * Clear any active message state.
1936 */
1937static void
1938ahc_clear_msg_state(struct ahc_softc *ahc)
1939{

--- 366 unchanged lines hidden (view full) ---

2306
2307 period = ahc->msgin_buf[3];
2308 ppr_options = 0;
2309 saved_offset = offset = ahc->msgin_buf[4];
2310 syncrate = ahc_devlimited_syncrate(ahc, &period,
2311 &ppr_options);
2312 ahc_validate_offset(ahc, syncrate, &offset,
2313 targ_scsirate & WIDEXFER);
1975}
1976
1977/*
1978 * Clear any active message state.
1979 */
1980static void
1981ahc_clear_msg_state(struct ahc_softc *ahc)
1982{

--- 366 unchanged lines hidden (view full) ---

2349
2350 period = ahc->msgin_buf[3];
2351 ppr_options = 0;
2352 saved_offset = offset = ahc->msgin_buf[4];
2353 syncrate = ahc_devlimited_syncrate(ahc, &period,
2354 &ppr_options);
2355 ahc_validate_offset(ahc, syncrate, &offset,
2356 targ_scsirate & WIDEXFER);
2357 if (bootverbose) {
2358 printf("(%s:%c:%d:%d): Received "
2359 "SDTR period %x, offset %x\n\t"
2360 "Filtered to period %x, offset %x\n",
2361 ahc_name(ahc), devinfo->channel,
2362 devinfo->target, devinfo->lun,
2363 ahc->msgin_buf[3], saved_offset,
2364 period, offset);
2365 }
2314 ahc_set_syncrate(ahc, devinfo,
2315 syncrate, period,
2316 offset, ppr_options,
2317 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2318 /*paused*/TRUE);
2319
2320 /*
2321 * See if we initiated Sync Negotiation

--- 5 unchanged lines hidden (view full) ---

2327 if (saved_offset != offset) {
2328 /* Went too low - force async */
2329 reject = TRUE;
2330 }
2331 } else {
2332 /*
2333 * Send our own SDTR in reply
2334 */
2366 ahc_set_syncrate(ahc, devinfo,
2367 syncrate, period,
2368 offset, ppr_options,
2369 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2370 /*paused*/TRUE);
2371
2372 /*
2373 * See if we initiated Sync Negotiation

--- 5 unchanged lines hidden (view full) ---

2379 if (saved_offset != offset) {
2380 /* Went too low - force async */
2381 reject = TRUE;
2382 }
2383 } else {
2384 /*
2385 * Send our own SDTR in reply
2386 */
2335 if (bootverbose)
2336 printf("Sending SDTR!\n");
2387 if (bootverbose) {
2388 printf("(%s:%c:%d:%d): Target "
2389 "Initiated SDTR\n",
2390 ahc_name(ahc), devinfo->channel,
2391 devinfo->target, devinfo->lun);
2392 }
2337 ahc->msgout_index = 0;
2338 ahc->msgout_len = 0;
2393 ahc->msgout_index = 0;
2394 ahc->msgout_len = 0;
2339 ahc_construct_sdtr(ahc, period, offset);
2395 ahc_construct_sdtr(ahc, devinfo,
2396 period, offset);
2340 ahc->msgout_index = 0;
2341 response = TRUE;
2342 }
2343 done = MSGLOOP_MSGCOMPLETE;
2344 break;
2345 }
2346 case MSG_EXT_WDTR:
2347 {

--- 15 unchanged lines hidden (view full) ---

2363 * the extended message preamble.
2364 */
2365 if (ahc->msgin_index < (MSG_EXT_WDTR_LEN + 1))
2366 break;
2367
2368 bus_width = ahc->msgin_buf[3];
2369 saved_width = bus_width;
2370 ahc_validate_width(ahc, &bus_width);
2397 ahc->msgout_index = 0;
2398 response = TRUE;
2399 }
2400 done = MSGLOOP_MSGCOMPLETE;
2401 break;
2402 }
2403 case MSG_EXT_WDTR:
2404 {

--- 15 unchanged lines hidden (view full) ---

2420 * the extended message preamble.
2421 */
2422 if (ahc->msgin_index < (MSG_EXT_WDTR_LEN + 1))
2423 break;
2424
2425 bus_width = ahc->msgin_buf[3];
2426 saved_width = bus_width;
2427 ahc_validate_width(ahc, &bus_width);
2428 if (bootverbose) {
2429 printf("(%s:%c:%d:%d): Received WDTR "
2430 "%x filtered to %x\n",
2431 ahc_name(ahc), devinfo->channel,
2432 devinfo->target, devinfo->lun,
2433 saved_width, bus_width);
2434 }
2371
2372 if (ahc_sent_msg(ahc, MSG_EXT_WDTR, /*full*/TRUE)) {
2373 /*
2374 * Don't send a WDTR back to the
2375 * target, since we asked first.
2376 * If the width went higher than our
2377 * request, reject it.
2378 */
2379 if (saved_width > bus_width) {
2380 reject = TRUE;
2435
2436 if (ahc_sent_msg(ahc, MSG_EXT_WDTR, /*full*/TRUE)) {
2437 /*
2438 * Don't send a WDTR back to the
2439 * target, since we asked first.
2440 * If the width went higher than our
2441 * request, reject it.
2442 */
2443 if (saved_width > bus_width) {
2444 reject = TRUE;
2381 printf("%s: target %d requested %dBit "
2445 printf("(%s:%c:%d:%d): requested %dBit "
2382 "transfers. Rejecting...\n",
2446 "transfers. Rejecting...\n",
2383 ahc_name(ahc), devinfo->target,
2447 ahc_name(ahc), devinfo->channel,
2448 devinfo->target, devinfo->lun,
2384 8 * (0x01 << bus_width));
2385 bus_width = 0;
2386 }
2387 } else {
2388 /*
2389 * Send our own WDTR in reply
2390 */
2449 8 * (0x01 << bus_width));
2450 bus_width = 0;
2451 }
2452 } else {
2453 /*
2454 * Send our own WDTR in reply
2455 */
2391 if (bootverbose)
2392 printf("Sending WDTR!\n");
2456 if (bootverbose) {
2457 printf("(%s:%c:%d:%d): Target "
2458 "Initiated WDTR\n",
2459 ahc_name(ahc), devinfo->channel,
2460 devinfo->target, devinfo->lun);
2461 }
2393 ahc->msgout_index = 0;
2394 ahc->msgout_len = 0;
2462 ahc->msgout_index = 0;
2463 ahc->msgout_len = 0;
2395 ahc_construct_wdtr(ahc, bus_width);
2464 ahc_construct_wdtr(ahc, devinfo, bus_width);
2396 ahc->msgout_index = 0;
2397 response = TRUE;
2398 sending_reply = TRUE;
2399 }
2400 ahc_set_width(ahc, devinfo, bus_width,
2401 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2402 /*paused*/TRUE);
2403 /* After a wide message, we are async */
2404 ahc_set_syncrate(ahc, devinfo,
2405 /*syncrate*/NULL, /*period*/0,
2406 /*offset*/0, /*ppr_options*/0,
2407 AHC_TRANS_ACTIVE, /*paused*/TRUE);
2408 if (sending_reply == FALSE && reject == FALSE) {
2409
2465 ahc->msgout_index = 0;
2466 response = TRUE;
2467 sending_reply = TRUE;
2468 }
2469 ahc_set_width(ahc, devinfo, bus_width,
2470 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2471 /*paused*/TRUE);
2472 /* After a wide message, we are async */
2473 ahc_set_syncrate(ahc, devinfo,
2474 /*syncrate*/NULL, /*period*/0,
2475 /*offset*/0, /*ppr_options*/0,
2476 AHC_TRANS_ACTIVE, /*paused*/TRUE);
2477 if (sending_reply == FALSE && reject == FALSE) {
2478
2410 /* XXX functionalize */
2411 if (tinfo->goal.period) {
2479 if (tinfo->goal.period) {
2412 struct ahc_syncrate *rate;
2413 u_int period;
2414 u_int ppr;
2415 u_int offset;
2416
2417 /* Start the sync negotiation */
2418 period = tinfo->goal.period;
2419 ppr = 0;
2420 rate = ahc_devlimited_syncrate(ahc,
2421 &period,
2422 &ppr);
2423 offset = tinfo->goal.offset;
2424 ahc_validate_offset(ahc, rate, &offset,
2425 tinfo->current.width);
2426 ahc->msgout_index = 0;
2427 ahc->msgout_len = 0;
2480 ahc->msgout_index = 0;
2481 ahc->msgout_len = 0;
2428 ahc_construct_sdtr(ahc, period, offset);
2482 ahc_build_transfer_msg(ahc, devinfo);
2429 ahc->msgout_index = 0;
2430 response = TRUE;
2431 }
2432 }
2433 done = MSGLOOP_MSGCOMPLETE;
2434 break;
2435 }
2436 case MSG_EXT_PPR:

--- 55 unchanged lines hidden (view full) ---

2492 if (ahc_sent_msg(ahc, MSG_EXT_PPR, /*full*/TRUE)) {
2493 /*
2494 * If we are unable to do any of the
2495 * requested options (we went too low),
2496 * then we'll have to reject the message.
2497 */
2498 if (saved_width > bus_width
2499 || saved_offset != offset
2483 ahc->msgout_index = 0;
2484 response = TRUE;
2485 }
2486 }
2487 done = MSGLOOP_MSGCOMPLETE;
2488 break;
2489 }
2490 case MSG_EXT_PPR:

--- 55 unchanged lines hidden (view full) ---

2546 if (ahc_sent_msg(ahc, MSG_EXT_PPR, /*full*/TRUE)) {
2547 /*
2548 * If we are unable to do any of the
2549 * requested options (we went too low),
2550 * then we'll have to reject the message.
2551 */
2552 if (saved_width > bus_width
2553 || saved_offset != offset
2500 || saved_ppr_options != ppr_options)
2554 || saved_ppr_options != ppr_options) {
2501 reject = TRUE;
2555 reject = TRUE;
2556 period = 0;
2557 offset = 0;
2558 bus_width = 0;
2559 ppr_options = 0;
2560 syncrate = NULL;
2561 }
2502 } else {
2503 printf("Target Initated PPR detected!\n");
2504 response = TRUE;
2505 }
2562 } else {
2563 printf("Target Initated PPR detected!\n");
2564 response = TRUE;
2565 }
2566 if (bootverbose) {
2567 printf("(%s:%c:%d:%d): Received PPR width %x, "
2568 "period %x, offset %x,options %x\n"
2569 "\tFiltered to width %x, period %x, "
2570 "offset %x, options %x\n",
2571 ahc_name(ahc), devinfo->channel,
2572 devinfo->target, devinfo->lun,
2573 ahc->msgin_buf[3], saved_width,
2574 saved_offset, saved_ppr_options,
2575 bus_width, period, offset, ppr_options);
2576 }
2506 ahc_set_width(ahc, devinfo, bus_width,
2507 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2508 /*paused*/TRUE);
2509 ahc_set_syncrate(ahc, devinfo,
2510 syncrate, period,
2511 offset, ppr_options,
2512 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2513 /*paused*/TRUE);

--- 85 unchanged lines hidden (view full) ---

2599 struct scb *scb;
2600 struct ahc_initiator_tinfo *tinfo;
2601 struct tmode_tstate *tstate;
2602 u_int scb_index;
2603 u_int last_msg;
2604 int response = 0;
2605
2606 scb_index = ahc_inb(ahc, SCB_TAG);
2577 ahc_set_width(ahc, devinfo, bus_width,
2578 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2579 /*paused*/TRUE);
2580 ahc_set_syncrate(ahc, devinfo,
2581 syncrate, period,
2582 offset, ppr_options,
2583 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2584 /*paused*/TRUE);

--- 85 unchanged lines hidden (view full) ---

2670 struct scb *scb;
2671 struct ahc_initiator_tinfo *tinfo;
2672 struct tmode_tstate *tstate;
2673 u_int scb_index;
2674 u_int last_msg;
2675 int response = 0;
2676
2677 scb_index = ahc_inb(ahc, SCB_TAG);
2607 scb = &ahc->scb_data->scbarray[scb_index];
2608
2678 scb = ahc_lookup_scb(ahc, scb_index);
2609 tinfo = ahc_fetch_transinfo(ahc, devinfo->channel,
2610 devinfo->our_scsiid,
2611 devinfo->target, &tstate);
2612 /* Might be necessary */
2613 last_msg = ahc_inb(ahc, LAST_MSG);
2614
2615 if (ahc_sent_msg(ahc, MSG_EXT_PPR, /*full*/FALSE)) {
2616 /*
2617 * Target does not support the PPR message.
2618 * Attempt to negotiate SPI-2 style.
2619 */
2679 tinfo = ahc_fetch_transinfo(ahc, devinfo->channel,
2680 devinfo->our_scsiid,
2681 devinfo->target, &tstate);
2682 /* Might be necessary */
2683 last_msg = ahc_inb(ahc, LAST_MSG);
2684
2685 if (ahc_sent_msg(ahc, MSG_EXT_PPR, /*full*/FALSE)) {
2686 /*
2687 * Target does not support the PPR message.
2688 * Attempt to negotiate SPI-2 style.
2689 */
2690 if (bootverbose) {
2691 printf("(%s:%c:%d:%d): PPR Rejected. "
2692 "Trying WDTR/SDTR\n",
2693 ahc_name(ahc), devinfo->channel,
2694 devinfo->target, devinfo->lun);
2695 }
2620 tinfo->goal.ppr_options = 0;
2621 tinfo->current.transport_version = 2;
2622 tinfo->goal.transport_version = 2;
2623 ahc->msgout_index = 0;
2624 ahc->msgout_len = 0;
2625 ahc_build_transfer_msg(ahc, devinfo);
2626 ahc->msgout_index = 0;
2627 response = 1;
2628 } else if (ahc_sent_msg(ahc, MSG_EXT_WDTR, /*full*/FALSE)) {
2629
2630 /* note 8bit xfers */
2696 tinfo->goal.ppr_options = 0;
2697 tinfo->current.transport_version = 2;
2698 tinfo->goal.transport_version = 2;
2699 ahc->msgout_index = 0;
2700 ahc->msgout_len = 0;
2701 ahc_build_transfer_msg(ahc, devinfo);
2702 ahc->msgout_index = 0;
2703 response = 1;
2704 } else if (ahc_sent_msg(ahc, MSG_EXT_WDTR, /*full*/FALSE)) {
2705
2706 /* note 8bit xfers */
2631 printf("%s:%c:%d: refuses WIDE negotiation. Using "
2707 printf("(%s:%c:%d:%d): refuses WIDE negotiation. Using "
2632 "8bit transfers\n", ahc_name(ahc),
2708 "8bit transfers\n", ahc_name(ahc),
2633 devinfo->channel, devinfo->target);
2709 devinfo->channel, devinfo->target, devinfo->lun);
2634 ahc_set_width(ahc, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
2635 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2636 /*paused*/TRUE);
2637 /*
2638 * No need to clear the sync rate. If the target
2639 * did not accept the command, our syncrate is
2640 * unaffected. If the target started the negotiation,
2641 * but rejected our response, we already cleared the

--- 9 unchanged lines hidden (view full) ---

2651 response = 1;
2652 }
2653 } else if (ahc_sent_msg(ahc, MSG_EXT_SDTR, /*full*/FALSE)) {
2654 /* note asynch xfers and clear flag */
2655 ahc_set_syncrate(ahc, devinfo, /*syncrate*/NULL, /*period*/0,
2656 /*offset*/0, /*ppr_options*/0,
2657 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2658 /*paused*/TRUE);
2710 ahc_set_width(ahc, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
2711 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2712 /*paused*/TRUE);
2713 /*
2714 * No need to clear the sync rate. If the target
2715 * did not accept the command, our syncrate is
2716 * unaffected. If the target started the negotiation,
2717 * but rejected our response, we already cleared the

--- 9 unchanged lines hidden (view full) ---

2727 response = 1;
2728 }
2729 } else if (ahc_sent_msg(ahc, MSG_EXT_SDTR, /*full*/FALSE)) {
2730 /* note asynch xfers and clear flag */
2731 ahc_set_syncrate(ahc, devinfo, /*syncrate*/NULL, /*period*/0,
2732 /*offset*/0, /*ppr_options*/0,
2733 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
2734 /*paused*/TRUE);
2659 printf("%s:%c:%d: refuses synchronous negotiation. "
2735 printf("(%s:%c:%d:%d): refuses synchronous negotiation. "
2660 "Using asynchronous transfers\n",
2736 "Using asynchronous transfers\n",
2661 ahc_name(ahc),
2662 devinfo->channel, devinfo->target);
2737 ahc_name(ahc), devinfo->channel,
2738 devinfo->target, devinfo->lun);
2663 } else if ((scb->hscb->control & MSG_SIMPLE_Q_TAG) != 0) {
2664
2739 } else if ((scb->hscb->control & MSG_SIMPLE_Q_TAG) != 0) {
2740
2665 printf("%s:%c:%d: refuses tagged commands. Performing "
2741 printf("(%s:%c:%d:%d): refuses tagged commands. Performing "
2666 "non-tagged I/O\n", ahc_name(ahc),
2742 "non-tagged I/O\n", ahc_name(ahc),
2667 devinfo->channel, devinfo->target);
2743 devinfo->channel, devinfo->target, devinfo->lun);
2668 ahc_set_tags(ahc, devinfo, FALSE);
2669
2670 /*
2671 * Resend the identify for this CCB as the target
2672 * may believe that the selection is invalid otherwise.
2673 */
2674 ahc_outb(ahc, SCB_CONTROL,
2675 ahc_inb(ahc, SCB_CONTROL) & ~MSG_SIMPLE_Q_TAG);

--- 42 unchanged lines hidden (view full) ---

2718 */
2719static void
2720ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
2721{
2722 u_int scb_index;
2723 struct scb *scb;
2724
2725 scb_index = ahc_inb(ahc, SCB_TAG);
2744 ahc_set_tags(ahc, devinfo, FALSE);
2745
2746 /*
2747 * Resend the identify for this CCB as the target
2748 * may believe that the selection is invalid otherwise.
2749 */
2750 ahc_outb(ahc, SCB_CONTROL,
2751 ahc_inb(ahc, SCB_CONTROL) & ~MSG_SIMPLE_Q_TAG);

--- 42 unchanged lines hidden (view full) ---

2794 */
2795static void
2796ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
2797{
2798 u_int scb_index;
2799 struct scb *scb;
2800
2801 scb_index = ahc_inb(ahc, SCB_TAG);
2726 scb = &ahc->scb_data->scbarray[scb_index];
2802 scb = ahc_lookup_scb(ahc, scb_index);
2727 /*
2728 * XXX Actually check data direction in the sequencer?
2729 * Perhaps add datadir to some spare bits in the hscb?
2730 */
2731 if ((ahc_inb(ahc, SEQ_FLAGS) & DPHASE) == 0
2732 || ahc_get_transfer_dir(scb) != CAM_DIR_IN) {
2733 /*
2734 * Ignore the message if we haven't

--- 624 unchanged lines hidden (view full) ---

3359 if (scb_data->numscbs == 0) {
3360 printf("%s: ahc_init_scbdata - "
3361 "Unable to allocate initial scbs\n",
3362 ahc_name(ahc));
3363 goto error_exit;
3364 }
3365
3366 /*
2803 /*
2804 * XXX Actually check data direction in the sequencer?
2805 * Perhaps add datadir to some spare bits in the hscb?
2806 */
2807 if ((ahc_inb(ahc, SEQ_FLAGS) & DPHASE) == 0
2808 || ahc_get_transfer_dir(scb) != CAM_DIR_IN) {
2809 /*
2810 * Ignore the message if we haven't

--- 624 unchanged lines hidden (view full) ---

3435 if (scb_data->numscbs == 0) {
3436 printf("%s: ahc_init_scbdata - "
3437 "Unable to allocate initial scbs\n",
3438 ahc_name(ahc));
3439 goto error_exit;
3440 }
3441
3442 /*
3443 * Tell the sequencer which SCB will be the next one it receives.
3444 */
3445 ahc->next_queued_scb = ahc_get_scb(ahc);
3446 ahc_outb(ahc, NEXT_QUEUED_SCB, ahc->next_queued_scb->hscb->tag);
3447
3448 /*
3367 * Note that we were successfull
3368 */
3369 return (0);
3370
3371error_exit:
3372
3373 return (ENOMEM);
3374}

--- 724 unchanged lines hidden (view full) ---

4099
4100 ahc_search_qinfifo(ahc, target, channel, lun,
4101 /*tag*/SCB_LIST_NULL, ROLE_UNKNOWN,
4102 CAM_REQUEUE_REQ, SEARCH_COMPLETE);
4103
4104 ahc_platform_freeze_devq(ahc, scb);
4105}
4106
3449 * Note that we were successfull
3450 */
3451 return (0);
3452
3453error_exit:
3454
3455 return (ENOMEM);
3456}

--- 724 unchanged lines hidden (view full) ---

4181
4182 ahc_search_qinfifo(ahc, target, channel, lun,
4183 /*tag*/SCB_LIST_NULL, ROLE_UNKNOWN,
4184 CAM_REQUEUE_REQ, SEARCH_COMPLETE);
4185
4186 ahc_platform_freeze_devq(ahc, scb);
4187}
4188
4189static void
4190ahc_qinfifo_requeue(struct ahc_softc *ahc, struct scb *prev_scb,
4191 struct scb *scb)
4192{
4193 if (prev_scb == NULL)
4194 ahc_outb(ahc, NEXT_QUEUED_SCB, scb->hscb->tag);
4195 else
4196 prev_scb->hscb->next = scb->hscb->tag;
4197 ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag;
4198 scb->hscb->next = ahc->next_queued_scb->hscb->tag;
4199}
4200
4107int
4108ahc_search_qinfifo(struct ahc_softc *ahc, int target, char channel,
4109 int lun, u_int tag, role_t role, uint32_t status,
4110 ahc_search_action action)
4111{
4112 struct scb *scb;
4201int
4202ahc_search_qinfifo(struct ahc_softc *ahc, int target, char channel,
4203 int lun, u_int tag, role_t role, uint32_t status,
4204 ahc_search_action action)
4205{
4206 struct scb *scb;
4207 struct scb *prev_scb;
4208 uint8_t qinstart;
4113 uint8_t qinpos;
4114 uint8_t qintail;
4115 uint8_t next, prev;
4116 uint8_t curscbptr;
4117 int found;
4118 int maxtarget;
4119 int i;
4120
4209 uint8_t qinpos;
4210 uint8_t qintail;
4211 uint8_t next, prev;
4212 uint8_t curscbptr;
4213 int found;
4214 int maxtarget;
4215 int i;
4216
4121 qinpos = ahc_inb(ahc, QINPOS);
4122 qintail = ahc->qinfifonext;
4217 qintail = ahc->qinfifonext;
4218 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
4219 qinstart = ahc_inb(ahc, SNSCB_QOFF);
4220 ahc_outb(ahc, SNSCB_QOFF, qinstart);
4221 } else
4222 qinstart = ahc_inb(ahc, QINPOS);
4223 qinpos = qinstart;
4224
4225 /*
4226 * If the next qinfifo SCB does not match the
4227 * entry in our qinfifo, the sequencer is in
4228 * the process of dmaing down the SCB that just
4229 * preceeds qinstart. So, start our search in
4230 * the qinfifo back by an entry. The sequencer
4231 * is smart enough to check after the SCB dma
4232 * completes to ensure that the newly DMAed
4233 * SCB is still relevant.
4234 */
4235 next = ahc_inb(ahc, NEXT_QUEUED_SCB);
4236 if (qinstart == qintail) {
4237 if (next != ahc->next_queued_scb->hscb->tag)
4238 qinpos--;
4239 } else if (next != ahc->qinfifo[qinstart]) {
4240 qinpos--;
4241 }
4242
4123 found = 0;
4243 found = 0;
4244 prev_scb = NULL;
4124
4125 if (action == SEARCH_COMPLETE) {
4126 /*
4127 * Don't attempt to run any queued untagged transactions
4128 * until we are done with the abort process.
4129 */
4130 ahc_freeze_untagged_queues(ahc);
4131 }
4132
4133 /*
4134 * Start with an empty queue. Entries that are not chosen
4135 * for removal will be re-added to the queue as we go.
4136 */
4137 ahc->qinfifonext = qinpos;
4245
4246 if (action == SEARCH_COMPLETE) {
4247 /*
4248 * Don't attempt to run any queued untagged transactions
4249 * until we are done with the abort process.
4250 */
4251 ahc_freeze_untagged_queues(ahc);
4252 }
4253
4254 /*
4255 * Start with an empty queue. Entries that are not chosen
4256 * for removal will be re-added to the queue as we go.
4257 */
4258 ahc->qinfifonext = qinpos;
4259 ahc_outb(ahc, NEXT_QUEUED_SCB, ahc->next_queued_scb->hscb->tag);
4138
4139 while (qinpos != qintail) {
4260
4261 while (qinpos != qintail) {
4140 scb = &ahc->scb_data->scbarray[ahc->qinfifo[qinpos]];
4262 scb = ahc_lookup_scb(ahc, ahc->qinfifo[qinpos]);
4141 if (ahc_match_scb(ahc, scb, target, channel, lun, tag, role)) {
4142 /*
4143 * We found an scb that needs to be acted on.
4144 */
4145 found++;
4146 switch (action) {
4147 case SEARCH_COMPLETE:
4148 {
4149 cam_status ostat;
4150
4151 ostat = ahc_get_transaction_status(scb);
4152 if (ostat == CAM_REQ_INPROG)
4153 ahc_set_transaction_status(scb,
4154 status);
4155 ahc_freeze_scb(scb);
4156 if ((scb->flags & SCB_ACTIVE) == 0)
4157 printf("Inactive SCB in qinfifo\n");
4158 ahc_done(ahc, scb);
4263 if (ahc_match_scb(ahc, scb, target, channel, lun, tag, role)) {
4264 /*
4265 * We found an scb that needs to be acted on.
4266 */
4267 found++;
4268 switch (action) {
4269 case SEARCH_COMPLETE:
4270 {
4271 cam_status ostat;
4272
4273 ostat = ahc_get_transaction_status(scb);
4274 if (ostat == CAM_REQ_INPROG)
4275 ahc_set_transaction_status(scb,
4276 status);
4277 ahc_freeze_scb(scb);
4278 if ((scb->flags & SCB_ACTIVE) == 0)
4279 printf("Inactive SCB in qinfifo\n");
4280 ahc_done(ahc, scb);
4281
4282 /*
4283 * The sequencer increments its position in
4284 * the qinfifo as soon as it determines that
4285 * an SCB needs to be DMA'ed down to the card.
4286 * So, if we are aborting a command that is
4287 * still in the process of being DMAed, we
4288 * must move the sequencer's qinfifo pointer
4289 * back as well.
4290 */
4291 if (qinpos == (qinstart - 1)) {
4292 ahc_outb(ahc, SNSCB_QOFF, qinpos);
4293 } else {
4294 ahc_outb(ahc, QINPOS, qinpos);
4295 }
4159 break;
4160 }
4161 case SEARCH_COUNT:
4296 break;
4297 }
4298 case SEARCH_COUNT:
4162 ahc->qinfifo[ahc->qinfifonext++] =
4163 scb->hscb->tag;
4299 ahc_qinfifo_requeue(ahc, prev_scb, scb);
4300 prev_scb = scb;
4164 break;
4165 case SEARCH_REMOVE:
4166 break;
4167 }
4168 } else {
4301 break;
4302 case SEARCH_REMOVE:
4303 break;
4304 }
4305 } else {
4169 ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag;
4306 ahc_qinfifo_requeue(ahc, prev_scb, scb);
4307 prev_scb = scb;
4170 }
4171 qinpos++;
4172 }
4173
4174 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
4175 ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
4176 } else {
4177 ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);

--- 11 unchanged lines hidden (view full) ---

4189
4190 ahc_outb(ahc, SCBPTR, next);
4191 scb_index = ahc_inb(ahc, SCB_TAG);
4192 if (scb_index >= ahc->scb_data->numscbs) {
4193 panic("Waiting List inconsistency. "
4194 "SCB index == %d, yet numscbs == %d.",
4195 scb_index, ahc->scb_data->numscbs);
4196 }
4308 }
4309 qinpos++;
4310 }
4311
4312 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
4313 ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
4314 } else {
4315 ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);

--- 11 unchanged lines hidden (view full) ---

4327
4328 ahc_outb(ahc, SCBPTR, next);
4329 scb_index = ahc_inb(ahc, SCB_TAG);
4330 if (scb_index >= ahc->scb_data->numscbs) {
4331 panic("Waiting List inconsistency. "
4332 "SCB index == %d, yet numscbs == %d.",
4333 scb_index, ahc->scb_data->numscbs);
4334 }
4197 scb = &ahc->scb_data->scbarray[scb_index];
4335 scb = ahc_lookup_scb(ahc, scb_index);
4198 if (ahc_match_scb(ahc, scb, target, channel,
4199 lun, SCB_LIST_NULL, role)) {
4200 /*
4201 * We found an scb that needs to be acted on.
4202 */
4203 found++;
4204 switch (action) {
4205 case SEARCH_COMPLETE:

--- 138 unchanged lines hidden (view full) ---

4344 scb_index, ahc->scb_data->numscbs);
4345 }
4346
4347 if (next == prev) {
4348 panic("Disconnected List Loop. "
4349 "cur SCBPTR == %x, prev SCBPTR == %x.",
4350 next, prev);
4351 }
4336 if (ahc_match_scb(ahc, scb, target, channel,
4337 lun, SCB_LIST_NULL, role)) {
4338 /*
4339 * We found an scb that needs to be acted on.
4340 */
4341 found++;
4342 switch (action) {
4343 case SEARCH_COMPLETE:

--- 138 unchanged lines hidden (view full) ---

4482 scb_index, ahc->scb_data->numscbs);
4483 }
4484
4485 if (next == prev) {
4486 panic("Disconnected List Loop. "
4487 "cur SCBPTR == %x, prev SCBPTR == %x.",
4488 next, prev);
4489 }
4352 scbp = &ahc->scb_data->scbarray[scb_index];
4490 scbp = ahc_lookup_scb(ahc, scb_index);
4353 if (ahc_match_scb(ahc, scbp, target, channel, lun,
4354 tag, ROLE_INITIATOR)) {
4355 count++;
4356 if (remove) {
4357 next =
4358 ahc_rem_scb_from_disc_list(ahc, prev, next);
4359 } else {
4360 prev = next;

--- 144 unchanged lines hidden (view full) ---

4505 maxtarget = i + 1;
4506 }
4507
4508 for (;i < maxtarget; i++) {
4509 u_int scbid;
4510
4511 scbid = ahc_index_busy_tcl(ahc, BUILD_TCL(i << 4, 0),
4512 /*unbusy*/FALSE);
4491 if (ahc_match_scb(ahc, scbp, target, channel, lun,
4492 tag, ROLE_INITIATOR)) {
4493 count++;
4494 if (remove) {
4495 next =
4496 ahc_rem_scb_from_disc_list(ahc, prev, next);
4497 } else {
4498 prev = next;

--- 144 unchanged lines hidden (view full) ---

4643 maxtarget = i + 1;
4644 }
4645
4646 for (;i < maxtarget; i++) {
4647 u_int scbid;
4648
4649 scbid = ahc_index_busy_tcl(ahc, BUILD_TCL(i << 4, 0),
4650 /*unbusy*/FALSE);
4513 scbp = &ahc->scb_data->scbarray[scbid];
4651 scbp = ahc_lookup_scb(ahc, scbid);
4514 if (scbid < ahc->scb_data->numscbs
4515 && ahc_match_scb(ahc, scbp, target, channel, lun, tag, role)) {
4516 u_int minlun;
4517 u_int maxlun;
4518
4519 if (lun == CAM_LUN_WILDCARD) {
4520
4521 /*

--- 32 unchanged lines hidden (view full) ---

4554 * Go through the hardware SCB array looking for commands that
4555 * were active but not on any list.
4556 */
4557 for(i = 0; i < ahc->scb_data->maxhscbs; i++) {
4558 u_int scbid;
4559
4560 ahc_outb(ahc, SCBPTR, i);
4561 scbid = ahc_inb(ahc, SCB_TAG);
4652 if (scbid < ahc->scb_data->numscbs
4653 && ahc_match_scb(ahc, scbp, target, channel, lun, tag, role)) {
4654 u_int minlun;
4655 u_int maxlun;
4656
4657 if (lun == CAM_LUN_WILDCARD) {
4658
4659 /*

--- 32 unchanged lines hidden (view full) ---

4692 * Go through the hardware SCB array looking for commands that
4693 * were active but not on any list.
4694 */
4695 for(i = 0; i < ahc->scb_data->maxhscbs; i++) {
4696 u_int scbid;
4697
4698 ahc_outb(ahc, SCBPTR, i);
4699 scbid = ahc_inb(ahc, SCB_TAG);
4562 scbp = &ahc->scb_data->scbarray[scbid];
4563 if (scbid < ahc->scb_data->numscbs
4700 scbp = ahc_lookup_scb(ahc, scbid);
4701 if (scbp != NULL
4564 && ahc_match_scb(ahc, scbp, target, channel, lun, tag, role))
4565 ahc_add_curscb_to_free_list(ahc);
4566 }
4567
4568 /*
4569 * Go through the pending CCB list and look for
4570 * commands for this target that are still active.
4571 * These are other tagged commands that were

--- 54 unchanged lines hidden (view full) ---

4626
4627 ahc_compile_devinfo(&devinfo,
4628 CAM_TARGET_WILDCARD,
4629 CAM_TARGET_WILDCARD,
4630 CAM_LUN_WILDCARD,
4631 channel, ROLE_UNKNOWN);
4632 pause_sequencer(ahc);
4633
4702 && ahc_match_scb(ahc, scbp, target, channel, lun, tag, role))
4703 ahc_add_curscb_to_free_list(ahc);
4704 }
4705
4706 /*
4707 * Go through the pending CCB list and look for
4708 * commands for this target that are still active.
4709 * These are other tagged commands that were

--- 54 unchanged lines hidden (view full) ---

4764
4765 ahc_compile_devinfo(&devinfo,
4766 CAM_TARGET_WILDCARD,
4767 CAM_TARGET_WILDCARD,
4768 CAM_LUN_WILDCARD,
4769 channel, ROLE_UNKNOWN);
4770 pause_sequencer(ahc);
4771
4772 /* Make sure the sequencer is in a safe location. */
4773 ahc_clear_critical_section(ahc);
4774
4634 /*
4635 * Run our command complete fifos to ensure that we perform
4636 * completion processing on any commands that 'completed'
4637 * before the reset occurred.
4638 */
4639 ahc_run_qoutfifo(ahc);
4640#if AHC_TARGET_MODE
4641 if ((ahc->flags & AHC_TARGETMODE) != 0) {

--- 330 unchanged lines hidden (view full) ---

4972 | ins_bytes[3]);
4973 }
4974}
4975#endif
4976
4977static void
4978ahc_loadseq(struct ahc_softc *ahc)
4979{
4775 /*
4776 * Run our command complete fifos to ensure that we perform
4777 * completion processing on any commands that 'completed'
4778 * before the reset occurred.
4779 */
4780 ahc_run_qoutfifo(ahc);
4781#if AHC_TARGET_MODE
4782 if ((ahc->flags & AHC_TARGETMODE) != 0) {

--- 330 unchanged lines hidden (view full) ---

5113 | ins_bytes[3]);
5114 }
5115}
5116#endif
5117
5118static void
5119ahc_loadseq(struct ahc_softc *ahc)
5120{
4980 struct patch *cur_patch;
4981 u_int i;
4982 int downloaded;
4983 u_int skip_addr;
4984 uint8_t download_consts[4];
5121 struct cs cs_table[num_critical_sections];
5122 struct patch *cur_patch;
5123 u_int cs_table_size;
5124 u_int cur_cs;
5125 u_int i;
5126 int downloaded;
5127 u_int skip_addr;
5128 u_int sg_prefetch_cnt;
5129 uint8_t download_consts[7];
4985
5130
5131 /*
5132 * Start out with 0 critical sections
5133 * that apply to this firmware load.
5134 */
5135 cs_table_size = 0;
5136 cur_cs = 0;
5137
4986 /* Setup downloadable constant table */
4987 download_consts[QOUTFIFO_OFFSET] = 0;
4988 if (ahc->targetcmds != NULL)
4989 download_consts[QOUTFIFO_OFFSET] += 32;
4990 download_consts[QINFIFO_OFFSET] = download_consts[QOUTFIFO_OFFSET] + 1;
4991 download_consts[CACHESIZE_MASK] = ahc->pci_cachesize - 1;
4992 download_consts[INVERTED_CACHESIZE_MASK] = ~(ahc->pci_cachesize - 1);
5138 /* Setup downloadable constant table */
5139 download_consts[QOUTFIFO_OFFSET] = 0;
5140 if (ahc->targetcmds != NULL)
5141 download_consts[QOUTFIFO_OFFSET] += 32;
5142 download_consts[QINFIFO_OFFSET] = download_consts[QOUTFIFO_OFFSET] + 1;
5143 download_consts[CACHESIZE_MASK] = ahc->pci_cachesize - 1;
5144 download_consts[INVERTED_CACHESIZE_MASK] = ~(ahc->pci_cachesize - 1);
5145 sg_prefetch_cnt = ahc->pci_cachesize;
5146 if (sg_prefetch_cnt < (2 * sizeof(struct ahc_dma_seg)))
5147 sg_prefetch_cnt = 2 * sizeof(struct ahc_dma_seg);
5148 download_consts[SG_PREFETCH_CNT] = sg_prefetch_cnt;
5149 download_consts[SG_PREFETCH_ALIGN_MASK] = ~(sg_prefetch_cnt - 1);
5150 download_consts[SG_PREFETCH_ADDR_MASK] = (sg_prefetch_cnt - 1);
4993
4994 cur_patch = patches;
4995 downloaded = 0;
4996 skip_addr = 0;
4997 ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
4998 ahc_outb(ahc, SEQADDR0, 0);
4999 ahc_outb(ahc, SEQADDR1, 0);
5000
5001 for (i = 0; i < sizeof(seqprog)/4; i++) {
5002 if (ahc_check_patch(ahc, &cur_patch, i, &skip_addr) == 0) {
5003 /*
5004 * Don't download this instruction as it
5005 * is in a patch that was removed.
5006 */
5007 continue;
5008 }
5151
5152 cur_patch = patches;
5153 downloaded = 0;
5154 skip_addr = 0;
5155 ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
5156 ahc_outb(ahc, SEQADDR0, 0);
5157 ahc_outb(ahc, SEQADDR1, 0);
5158
5159 for (i = 0; i < sizeof(seqprog)/4; i++) {
5160 if (ahc_check_patch(ahc, &cur_patch, i, &skip_addr) == 0) {
5161 /*
5162 * Don't download this instruction as it
5163 * is in a patch that was removed.
5164 */
5165 continue;
5166 }
5167 /*
5168 * Move through the CS table until we find a CS
5169 * that might apply to this instruction.
5170 */
5171 for (; cur_cs < num_critical_sections; cur_cs++) {
5172 if (critical_sections[cur_cs].end >= i) {
5173 if (critical_sections[cur_cs].begin == i) {
5174 cs_table[cs_table_size].begin =
5175 downloaded;
5176 }
5177 if (critical_sections[cur_cs].end == i) {
5178 cs_table[cs_table_size].end =
5179 downloaded;
5180 cs_table_size++;
5181 }
5182 break;
5183 }
5184 }
5009 ahc_download_instr(ahc, i, download_consts);
5010 downloaded++;
5011 }
5185 ahc_download_instr(ahc, i, download_consts);
5186 downloaded++;
5187 }
5188
5189 ahc->num_critical_sections = cs_table_size;
5190 if (cs_table_size != 0) {
5191
5192 cs_table_size *= sizeof(struct cs);
5193 ahc->critical_sections =
5194 malloc(cs_table_size, M_DEVBUF, M_NOWAIT);
5195 if (ahc->critical_sections == NULL)
5196 panic("ahc_loadseq: Could not malloc");
5197 memcpy(ahc->critical_sections, cs_table, cs_table_size);
5198 }
5012 ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
5013 restart_sequencer(ahc);
5014
5015 if (bootverbose)
5016 printf(" %d instructions downloaded\n", downloaded);
5017}
5018
5019static int

--- 793 unchanged lines hidden --- 		5199 ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
5200 restart_sequencer(ahc);
5201
5202 if (bootverbose)
5203 printf(" %d instructions downloaded\n", downloaded);
5204}
5205
5206static int

--- 793 unchanged lines hidden ---