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agp_i810.c (274379) agp_i810.c (296548)
1/*-
2 * Copyright (c) 2000 Doug Rabson
3 * Copyright (c) 2000 Ruslan Ermilov
4 * Copyright (c) 2011 The FreeBSD Foundation
5 * All rights reserved.
6 *
7 * Portions of this software were developed by Konstantin Belousov
8 * under sponsorship from the FreeBSD Foundation.

--- 24 unchanged lines hidden (view full) ---

33 * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
34 * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
35 *
36 * This is generic Intel GTT handling code, morphed from the AGP
37 * bridge code.
38 */
39
40#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2000 Doug Rabson
3 * Copyright (c) 2000 Ruslan Ermilov
4 * Copyright (c) 2011 The FreeBSD Foundation
5 * All rights reserved.
6 *
7 * Portions of this software were developed by Konstantin Belousov
8 * under sponsorship from the FreeBSD Foundation.

--- 24 unchanged lines hidden (view full) ---

33 * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
34 * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
35 *
36 * This is generic Intel GTT handling code, morphed from the AGP
37 * bridge code.
38 */
39
40#include <sys/cdefs.h>
41__FBSDID("$FreeBSD: head/sys/dev/agp/agp_i810.c 274379 2014-11-11 12:56:30Z kib $");
41__FBSDID("$FreeBSD: head/sys/dev/agp/agp_i810.c 296548 2016-03-08 20:33:02Z dumbbell $");
42
43#if 0
44#define KTR_AGP_I810 KTR_DEV
45#else
46#define KTR_AGP_I810 0
47#endif
48
49#include <sys/param.h>

--- 195 unchanged lines hidden (view full) ---

245 u_int32_t (*read_gtt_pte)(device_t, u_int);
246 vm_paddr_t (*read_gtt_pte_paddr)(device_t , u_int);
247 int (*set_aperture)(device_t, u_int32_t);
248 int (*chipset_flush_setup)(device_t);
249 void (*chipset_flush_teardown)(device_t);
250 void (*chipset_flush)(device_t);
251};
252
42
43#if 0
44#define KTR_AGP_I810 KTR_DEV
45#else
46#define KTR_AGP_I810 0
47#endif
48
49#include <sys/param.h>

--- 195 unchanged lines hidden (view full) ---

245 u_int32_t (*read_gtt_pte)(device_t, u_int);
246 vm_paddr_t (*read_gtt_pte_paddr)(device_t , u_int);
247 int (*set_aperture)(device_t, u_int32_t);
248 int (*chipset_flush_setup)(device_t);
249 void (*chipset_flush_teardown)(device_t);
250 void (*chipset_flush)(device_t);
251};
252
253static struct {
254 struct intel_gtt base;
255} intel_private;
256
253static const struct agp_i810_driver agp_i810_i810_driver = {
254 .chiptype = CHIP_I810,
255 .gen = 1,
256 .busdma_addr_mask_sz = 32,
257 .res_spec = agp_i810_res_spec,
258 .check_active = agp_i810_check_active,
259 .set_desc = agp_i810_set_desc,
260 .dump_regs = agp_i810_dump_regs,

--- 260 unchanged lines hidden (view full) ---

521 .read_gtt_pte = agp_g4x_read_gtt_pte,
522 .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
523 .set_aperture = agp_i915_set_aperture,
524 .chipset_flush_setup = agp_i810_chipset_flush_setup,
525 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
526 .chipset_flush = agp_i810_chipset_flush,
527};
528
257static const struct agp_i810_driver agp_i810_i810_driver = {
258 .chiptype = CHIP_I810,
259 .gen = 1,
260 .busdma_addr_mask_sz = 32,
261 .res_spec = agp_i810_res_spec,
262 .check_active = agp_i810_check_active,
263 .set_desc = agp_i810_set_desc,
264 .dump_regs = agp_i810_dump_regs,

--- 260 unchanged lines hidden (view full) ---

525 .read_gtt_pte = agp_g4x_read_gtt_pte,
526 .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
527 .set_aperture = agp_i915_set_aperture,
528 .chipset_flush_setup = agp_i810_chipset_flush_setup,
529 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
530 .chipset_flush = agp_i810_chipset_flush,
531};
532
533static const struct agp_i810_driver agp_i810_valleyview_driver = {
534 .chiptype = CHIP_SB,
535 .gen = 7,
536 .busdma_addr_mask_sz = 40,
537 .res_spec = agp_g4x_res_spec,
538 .check_active = agp_sb_check_active,
539 .set_desc = agp_i810_set_desc,
540 .dump_regs = agp_sb_dump_regs,
541 .get_stolen_size = agp_sb_get_stolen_size,
542 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
543 .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
544 .install_gatt = agp_g4x_install_gatt,
545 .deinstall_gatt = agp_i830_deinstall_gatt,
546 .write_gtt = agp_sb_write_gtt,
547 .install_gtt_pte = agp_sb_install_gtt_pte,
548 .read_gtt_pte = agp_g4x_read_gtt_pte,
549 .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
550 .set_aperture = agp_i915_set_aperture,
551 .chipset_flush_setup = agp_i810_chipset_flush_setup,
552 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
553 .chipset_flush = agp_i810_chipset_flush,
554};
555
529/* For adding new devices, devid is the id of the graphics controller
530 * (pci:0:2:0, for example). The placeholder (usually at pci:0:2:1) for the
531 * second head should never be added. The bridge_offset is the offset to
532 * subtract from devid to get the id of the hostb that the device is on.
533 */
534static const struct agp_i810_match {
535 int devid;
536 char *name;

--- 221 unchanged lines hidden (view full) ---

758 },
759 {
760 .devid = 0x016a8086,
761 .name = "IvyBridge server GT2 IG",
762 .driver = &agp_i810_sb_driver
763 },
764 {
765 .devid = 0x04028086,
556/* For adding new devices, devid is the id of the graphics controller
557 * (pci:0:2:0, for example). The placeholder (usually at pci:0:2:1) for the
558 * second head should never be added. The bridge_offset is the offset to
559 * subtract from devid to get the id of the hostb that the device is on.
560 */
561static const struct agp_i810_match {
562 int devid;
563 char *name;

--- 221 unchanged lines hidden (view full) ---

785 },
786 {
787 .devid = 0x016a8086,
788 .name = "IvyBridge server GT2 IG",
789 .driver = &agp_i810_sb_driver
790 },
791 {
792 .devid = 0x04028086,
766 .name = "Haswell desktop GT1",
793 .name = "Haswell GT1 desktop",
767 .driver = &agp_i810_hsw_driver
768 },
769 {
794 .driver = &agp_i810_hsw_driver
795 },
796 {
797 .devid = 0x04068086,
798 .name = "Haswell GT1 mobile",
799 .driver = &agp_i810_hsw_driver
800 },
801 {
802 .devid = 0x040A8086,
803 .name = "Haswell GT1 server",
804 .driver = &agp_i810_hsw_driver
805 },
806 {
770 .devid = 0x04128086,
807 .devid = 0x04128086,
771 .name = "Haswell desktop GT2",
808 .name = "Haswell GT2 desktop",
772 .driver = &agp_i810_hsw_driver
773 },
774 {
809 .driver = &agp_i810_hsw_driver
810 },
811 {
775 .devid = 0x040a8086,
776 .name = "Haswell server GT1",
812 .devid = 0x04168086,
813 .name = "Haswell GT2 mobile",
777 .driver = &agp_i810_hsw_driver
778 },
779 {
814 .driver = &agp_i810_hsw_driver
815 },
816 {
780 .devid = 0x041a8086,
781 .name = "Haswell server GT2",
817 .devid = 0x041A8086,
818 .name = "Haswell GT2 server",
782 .driver = &agp_i810_hsw_driver
783 },
784 {
819 .driver = &agp_i810_hsw_driver
820 },
821 {
785 .devid = 0x04068086,
786 .name = "Haswell mobile GT1",
822 .devid = 0x04228086,
823 .name = "Haswell GT2 desktop",
787 .driver = &agp_i810_hsw_driver
788 },
789 {
824 .driver = &agp_i810_hsw_driver
825 },
826 {
790 .devid = 0x04168086,
791 .name = "Haswell mobile GT2",
827 .devid = 0x04268086,
828 .name = "Haswell GT2 mobile",
792 .driver = &agp_i810_hsw_driver
793 },
794 {
829 .driver = &agp_i810_hsw_driver
830 },
831 {
795 .devid = 0x0c168086,
796 .name = "Haswell SDV",
832 .devid = 0x042A8086,
833 .name = "Haswell GT2 server",
797 .driver = &agp_i810_hsw_driver
798 },
799 {
834 .driver = &agp_i810_hsw_driver
835 },
836 {
837 .devid = 0x0A028086,
838 .name = "Haswell ULT GT1 desktop",
839 .driver = &agp_i810_hsw_driver
840 },
841 {
842 .devid = 0x0A068086,
843 .name = "Haswell ULT GT1 mobile",
844 .driver = &agp_i810_hsw_driver
845 },
846 {
847 .devid = 0x0A0A8086,
848 .name = "Haswell ULT GT1 server",
849 .driver = &agp_i810_hsw_driver
850 },
851 {
852 .devid = 0x0A128086,
853 .name = "Haswell ULT GT2 desktop",
854 .driver = &agp_i810_hsw_driver
855 },
856 {
857 .devid = 0x0A168086,
858 .name = "Haswell ULT GT2 mobile",
859 .driver = &agp_i810_hsw_driver
860 },
861 {
862 .devid = 0x0A1A8086,
863 .name = "Haswell ULT GT2 server",
864 .driver = &agp_i810_hsw_driver
865 },
866 {
867 .devid = 0x0A228086,
868 .name = "Haswell ULT GT2 desktop",
869 .driver = &agp_i810_hsw_driver
870 },
871 {
872 .devid = 0x0A268086,
873 .name = "Haswell ULT GT2 mobile",
874 .driver = &agp_i810_hsw_driver
875 },
876 {
877 .devid = 0x0A2A8086,
878 .name = "Haswell ULT GT2 server",
879 .driver = &agp_i810_hsw_driver
880 },
881 {
882 .devid = 0x0C028086,
883 .name = "Haswell SDV GT1 desktop",
884 .driver = &agp_i810_hsw_driver
885 },
886 {
887 .devid = 0x0C068086,
888 .name = "Haswell SDV GT1 mobile",
889 .driver = &agp_i810_hsw_driver
890 },
891 {
892 .devid = 0x0C0A8086,
893 .name = "Haswell SDV GT1 server",
894 .driver = &agp_i810_hsw_driver
895 },
896 {
897 .devid = 0x0C128086,
898 .name = "Haswell SDV GT2 desktop",
899 .driver = &agp_i810_hsw_driver
900 },
901 {
902 .devid = 0x0C168086,
903 .name = "Haswell SDV GT2 mobile",
904 .driver = &agp_i810_hsw_driver
905 },
906 {
907 .devid = 0x0C1A8086,
908 .name = "Haswell SDV GT2 server",
909 .driver = &agp_i810_hsw_driver
910 },
911 {
912 .devid = 0x0C228086,
913 .name = "Haswell SDV GT2 desktop",
914 .driver = &agp_i810_hsw_driver
915 },
916 {
917 .devid = 0x0C268086,
918 .name = "Haswell SDV GT2 mobile",
919 .driver = &agp_i810_hsw_driver
920 },
921 {
922 .devid = 0x0C2A8086,
923 .name = "Haswell SDV GT2 server",
924 .driver = &agp_i810_hsw_driver
925 },
926 {
927 .devid = 0x0D028086,
928 .name = "Haswell CRW GT1 desktop",
929 .driver = &agp_i810_hsw_driver
930 },
931 {
932 .devid = 0x0D068086,
933 .name = "Haswell CRW GT1 mobile",
934 .driver = &agp_i810_hsw_driver
935 },
936 {
937 .devid = 0x0D0A8086,
938 .name = "Haswell CRW GT1 server",
939 .driver = &agp_i810_hsw_driver
940 },
941 {
942 .devid = 0x0D128086,
943 .name = "Haswell CRW GT2 desktop",
944 .driver = &agp_i810_hsw_driver
945 },
946 {
947 .devid = 0x0D168086,
948 .name = "Haswell CRW GT2 mobile",
949 .driver = &agp_i810_hsw_driver
950 },
951 {
952 .devid = 0x0D1A8086,
953 .name = "Haswell CRW GT2 server",
954 .driver = &agp_i810_hsw_driver
955 },
956 {
957 .devid = 0x0D228086,
958 .name = "Haswell CRW GT2 desktop",
959 .driver = &agp_i810_hsw_driver
960 },
961 {
962 .devid = 0x0D268086,
963 .name = "Haswell CRW GT2 mobile",
964 .driver = &agp_i810_hsw_driver
965 },
966 {
967 .devid = 0x0D2A8086,
968 .name = "Haswell CRW GT2 server",
969 .driver = &agp_i810_hsw_driver
970 },
971 {
972 .devid = 0x01558086,
973 .name = "Valleyview (desktop)",
974 .driver = &agp_i810_valleyview_driver
975 },
976 {
977 .devid = 0x01578086,
978 .name = "Valleyview (mobile)",
979 .driver = &agp_i810_valleyview_driver
980 },
981 {
982 .devid = 0x0F308086,
983 .name = "Valleyview (mobile)",
984 .driver = &agp_i810_valleyview_driver
985 },
986 {
800 .devid = 0,
801 }
802};
803
804static const struct agp_i810_match*
805agp_i810_match(device_t dev)
806{
807 int i, devid;

--- 1472 unchanged lines hidden (view full) ---

2280 struct intel_gtt res;
2281
2282 sc = device_get_softc(dev);
2283 res.stolen_size = sc->stolen_size;
2284 res.gtt_total_entries = sc->gtt_total_entries;
2285 res.gtt_mappable_entries = sc->gtt_mappable_entries;
2286 res.do_idle_maps = 0;
2287 res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
987 .devid = 0,
988 }
989};
990
991static const struct agp_i810_match*
992agp_i810_match(device_t dev)
993{
994 int i, devid;

--- 1472 unchanged lines hidden (view full) ---

2467 struct intel_gtt res;
2468
2469 sc = device_get_softc(dev);
2470 res.stolen_size = sc->stolen_size;
2471 res.gtt_total_entries = sc->gtt_total_entries;
2472 res.gtt_mappable_entries = sc->gtt_mappable_entries;
2473 res.do_idle_maps = 0;
2474 res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
2475 if (sc->agp.as_aperture != NULL)
2476 res.gma_bus_addr = rman_get_start(sc->agp.as_aperture);
2477 else
2478 res.gma_bus_addr = 0;
2288 return (res);
2289}
2290
2291static int
2292agp_i810_chipset_flush_setup(device_t dev)
2293{
2294
2295 return (0);

--- 287 unchanged lines hidden (view full) ---

2583intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2584 u_int flags)
2585{
2586
2587 agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2588 pages, flags);
2589}
2590
2479 return (res);
2480}
2481
2482static int
2483agp_i810_chipset_flush_setup(device_t dev)
2484{
2485
2486 return (0);

--- 287 unchanged lines hidden (view full) ---

2774intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2775 u_int flags)
2776{
2777
2778 agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2779 pages, flags);
2780}
2781
2591struct intel_gtt
2782struct intel_gtt *
2592intel_gtt_get(void)
2593{
2594
2783intel_gtt_get(void)
2784{
2785
2595 return (agp_intel_gtt_get(intel_agp));
2786 intel_private.base = agp_intel_gtt_get(intel_agp);
2787 return (&intel_private.base);
2596}
2597
2598int
2599intel_gtt_chipset_flush(void)
2600{
2601
2602 return (agp_intel_gtt_chipset_flush(intel_agp));
2603}

--- 60 unchanged lines hidden --- 		2788}
2789
2790int
2791intel_gtt_chipset_flush(void)
2792{
2793
2794 return (agp_intel_gtt_chipset_flush(intel_agp));
2795}

--- 60 unchanged lines hidden ---