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acpi_hpet.c (212238) acpi_hpet.c (212323)
1/*-
2 * Copyright (c) 2005 Poul-Henning Kamp
3 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2005 Poul-Henning Kamp
3 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_hpet.c 212238 2010-09-05 19:24:32Z mav $");
29__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_hpet.c 212323 2010-09-08 16:59:22Z mav $");
30
31#include "opt_acpi.h"
32#if defined(__amd64__) || defined(__ia64__)
33#define DEV_APIC
34#else
35#include "opt_apic.h"
36#endif
37#include <sys/param.h>

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84 struct timecounter tc;
85 struct hpet_timer {
86 struct eventtimer et;
87 struct hpet_softc *sc;
88 int num;
89 int mode;
90 int intr_rid;
91 int irq;
30
31#include "opt_acpi.h"
32#if defined(__amd64__) || defined(__ia64__)
33#define DEV_APIC
34#else
35#include "opt_apic.h"
36#endif
37#include <sys/param.h>

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84 struct timecounter tc;
85 struct hpet_timer {
86 struct eventtimer et;
87 struct hpet_softc *sc;
88 int num;
89 int mode;
90 int intr_rid;
91 int irq;
92 int pcpu_cpu;
93 int pcpu_misrouted;
92 int pcpu_master;
93 int pcpu_slaves[MAXCPU];
94 struct resource *intr_res;
95 void *intr_handle;
96 uint32_t caps;
97 uint32_t vectors;
98 uint32_t div;
99 uint32_t last;

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180 } else {
181 t->caps &= ~HPET_TCNF_TYPE;
182 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps);
183 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), cmp);
184 }
185 if (fdiv < 5000) {
186 bus_read_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num));
187 t->last = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
94 int pcpu_master;
95 int pcpu_slaves[MAXCPU];
96 struct resource *intr_res;
97 void *intr_handle;
98 uint32_t caps;
99 uint32_t vectors;
100 uint32_t div;
101 uint32_t last;

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182 } else {
183 t->caps &= ~HPET_TCNF_TYPE;
184 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps);
185 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), cmp);
186 }
187 if (fdiv < 5000) {
188 bus_read_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num));
189 t->last = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
188 if ((int32_t)(t->last - cmp) < 0) {
190 if ((int32_t)(t->last - cmp) >= 0) {
189 fdiv *= 2;
190 goto restart;
191 }
192 }
193 return (0);
194}
195
196static int

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210static int
211hpet_intr_single(void *arg)
212{
213 struct hpet_timer *t = (struct hpet_timer *)arg;
214 struct hpet_timer *mt;
215 struct hpet_softc *sc = t->sc;
216 uint32_t now;
217
191 fdiv *= 2;
192 goto restart;
193 }
194 }
195 return (0);
196}
197
198static int

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212static int
213hpet_intr_single(void *arg)
214{
215 struct hpet_timer *t = (struct hpet_timer *)arg;
216 struct hpet_timer *mt;
217 struct hpet_softc *sc = t->sc;
218 uint32_t now;
219
220 /* Check that per-CPU timer interrupt reached right CPU. */
221 if (t->pcpu_cpu >= 0 && t->pcpu_cpu != curcpu) {
222 if ((++t->pcpu_misrouted) % 32 == 0) {
223 printf("HPET interrupt routed to the wrong CPU"
224 " (timer %d CPU %d -> %d)!\n",
225 t->num, t->pcpu_cpu, curcpu);
226 }
227
228 /*
229 * Reload timer, hoping that next time may be more lucky
230 * (system will manage proper interrupt binding).
231 */
232 if ((t->mode == 1 && (t->caps & HPET_TCAP_PER_INT) == 0) ||
233 t->mode == 2) {
234 t->last = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
235 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
236 t->last + sc->freq / 8);
237 }
238 return (FILTER_HANDLED);
239 }
218 if (t->mode == 1 &&
219 (t->caps & HPET_TCAP_PER_INT) == 0) {
220 t->last += t->div;
221 now = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
222 if ((int32_t)(now - (t->last + t->div / 2)) > 0)
223 t->last = now - t->div / 2;
224 bus_write_4(sc->mem_res,
225 HPET_TIMER_COMPARATOR(t->num), t->last + t->div);

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389 }
390 for (i = 0; i < num_timers; i++) {
391 t = &sc->t[i];
392 t->sc = sc;
393 t->num = i;
394 t->mode = 0;
395 t->intr_rid = -1;
396 t->irq = -1;
240 if (t->mode == 1 &&
241 (t->caps & HPET_TCAP_PER_INT) == 0) {
242 t->last += t->div;
243 now = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
244 if ((int32_t)(now - (t->last + t->div / 2)) > 0)
245 t->last = now - t->div / 2;
246 bus_write_4(sc->mem_res,
247 HPET_TIMER_COMPARATOR(t->num), t->last + t->div);

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411 }
412 for (i = 0; i < num_timers; i++) {
413 t = &sc->t[i];
414 t->sc = sc;
415 t->num = i;
416 t->mode = 0;
417 t->intr_rid = -1;
418 t->irq = -1;
419 t->pcpu_cpu = -1;
420 t->pcpu_misrouted = 0;
397 t->pcpu_master = -1;
398 t->caps = bus_read_4(sc->mem_res, HPET_TIMER_CAP_CNF(i));
399 t->vectors = bus_read_4(sc->mem_res, HPET_TIMER_CAP_CNF(i) + 4);
400 if (bootverbose) {
401 device_printf(dev,
402 " t%d: irqs 0x%08x (%d)%s%s%s\n", i,
403 t->vectors, (t->caps & HPET_TCNF_INT_ROUTE) >> 9,
404 (t->caps & HPET_TCAP_FSB_INT_DEL) ? ", MSI" : "",

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529 num_percpu_t = num_percpu_et * mp_ncpus;
530 pcpu_master = 0;
531 cur_cpu = CPU_FIRST();
532 for (i = 0; i < num_timers; i++) {
533 t = &sc->t[i];
534 if (t->irq >= 0 && num_percpu_t > 0) {
535 if (cur_cpu == CPU_FIRST())
536 pcpu_master = i;
421 t->pcpu_master = -1;
422 t->caps = bus_read_4(sc->mem_res, HPET_TIMER_CAP_CNF(i));
423 t->vectors = bus_read_4(sc->mem_res, HPET_TIMER_CAP_CNF(i) + 4);
424 if (bootverbose) {
425 device_printf(dev,
426 " t%d: irqs 0x%08x (%d)%s%s%s\n", i,
427 t->vectors, (t->caps & HPET_TCNF_INT_ROUTE) >> 9,
428 (t->caps & HPET_TCAP_FSB_INT_DEL) ? ", MSI" : "",

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553 num_percpu_t = num_percpu_et * mp_ncpus;
554 pcpu_master = 0;
555 cur_cpu = CPU_FIRST();
556 for (i = 0; i < num_timers; i++) {
557 t = &sc->t[i];
558 if (t->irq >= 0 && num_percpu_t > 0) {
559 if (cur_cpu == CPU_FIRST())
560 pcpu_master = i;
561 t->pcpu_cpu = cur_cpu;
537 t->pcpu_master = pcpu_master;
538 sc->t[pcpu_master].
539 pcpu_slaves[cur_cpu] = i;
540 bus_bind_intr(dev, t->intr_res, cur_cpu);
541 cur_cpu = CPU_NEXT(cur_cpu);
542 num_percpu_t--;
543 } else if (t->irq >= 0)
544 bus_bind_intr(dev, t->intr_res, CPU_FIRST());

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562 t->pcpu_master = pcpu_master;
563 sc->t[pcpu_master].
564 pcpu_slaves[cur_cpu] = i;
565 bus_bind_intr(dev, t->intr_res, cur_cpu);
566 cur_cpu = CPU_NEXT(cur_cpu);
567 num_percpu_t--;
568 } else if (t->irq >= 0)
569 bus_bind_intr(dev, t->intr_res, CPU_FIRST());

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