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acpi_hpet.c (208438) acpi_hpet.c (209371)
1/*-
2 * Copyright (c) 2005 Poul-Henning Kamp
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2005 Poul-Henning Kamp
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_hpet.c 208438 2010-05-23 08:31:15Z mav $");
28__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_hpet.c 209371 2010-06-20 21:33:29Z mav $");
29
30#include "opt_acpi.h"
29
30#include "opt_acpi.h"
31#ifdef __amd64__
32#define DEV_APIC
33#else
34#include "opt_apic.h"
35#endif
31#include <sys/param.h>
32#include <sys/bus.h>
33#include <sys/kernel.h>
34#include <sys/module.h>
36#include <sys/param.h>
37#include <sys/bus.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/proc.h>
35#include <sys/rman.h>
36#include <sys/time.h>
41#include <sys/rman.h>
42#include <sys/time.h>
43#include <sys/smp.h>
44#include <sys/sysctl.h>
45#include <sys/timeet.h>
37#include <sys/timetc.h>
38
39#include <contrib/dev/acpica/include/acpi.h>
40#include <contrib/dev/acpica/include/accommon.h>
41
42#include <dev/acpica/acpivar.h>
43#include <dev/acpica/acpi_hpet.h>
44
46#include <sys/timetc.h>
47
48#include <contrib/dev/acpica/include/acpi.h>
49#include <contrib/dev/acpica/include/accommon.h>
50
51#include <dev/acpica/acpivar.h>
52#include <dev/acpica/acpi_hpet.h>
53
54#ifdef DEV_APIC
55#include "pcib_if.h"
56#endif
57
45#define HPET_VENDID_AMD 0x4353
46#define HPET_VENDID_INTEL 0x8086
47
48ACPI_SERIAL_DECL(hpet, "ACPI HPET support");
49
58#define HPET_VENDID_AMD 0x4353
59#define HPET_VENDID_INTEL 0x8086
60
61ACPI_SERIAL_DECL(hpet, "ACPI HPET support");
62
50static devclass_t acpi_hpet_devclass;
63static devclass_t hpet_devclass;
51
52/* ACPI CA debugging */
53#define _COMPONENT ACPI_TIMER
54ACPI_MODULE_NAME("HPET")
55
64
65/* ACPI CA debugging */
66#define _COMPONENT ACPI_TIMER
67ACPI_MODULE_NAME("HPET")
68
56struct acpi_hpet_softc {
69struct hpet_softc {
57 device_t dev;
70 device_t dev;
71 int mem_rid;
72 int intr_rid;
73 int irq;
74 int useirq;
58 struct resource *mem_res;
75 struct resource *mem_res;
76 struct resource *intr_res;
77 void *intr_handle;
59 ACPI_HANDLE handle;
78 ACPI_HANDLE handle;
79 uint64_t freq;
80 struct timecounter tc;
81 struct hpet_timer {
82 struct eventtimer et;
83 struct hpet_softc *sc;
84 int num;
85 int mode;
86 int intr_rid;
87 int irq;
88 int pcpu_master;
89 int pcpu_slaves[MAXCPU];
90 struct resource *intr_res;
91 void *intr_handle;
92 uint32_t caps;
93 uint32_t vectors;
94 uint32_t div;
95 uint32_t last;
96 char name[8];
97 } t[32];
98 int num_timers;
60};
61
62static u_int hpet_get_timecount(struct timecounter *tc);
99};
100
101static u_int hpet_get_timecount(struct timecounter *tc);
63static void acpi_hpet_test(struct acpi_hpet_softc *sc);
102static void hpet_test(struct hpet_softc *sc);
64
65static char *hpet_ids[] = { "PNP0103", NULL };
66
103
104static char *hpet_ids[] = { "PNP0103", NULL };
105
67struct timecounter hpet_timecounter = {
68 .tc_get_timecount = hpet_get_timecount,
69 .tc_counter_mask = ~0u,
70 .tc_name = "HPET",
71 .tc_quality = 900,
72};
73
74static u_int
75hpet_get_timecount(struct timecounter *tc)
76{
106static u_int
107hpet_get_timecount(struct timecounter *tc)
108{
77 struct acpi_hpet_softc *sc;
109 struct hpet_softc *sc;
78
79 sc = tc->tc_priv;
80 return (bus_read_4(sc->mem_res, HPET_MAIN_COUNTER));
81}
82
83static void
110
111 sc = tc->tc_priv;
112 return (bus_read_4(sc->mem_res, HPET_MAIN_COUNTER));
113}
114
115static void
84hpet_enable(struct acpi_hpet_softc *sc)
116hpet_enable(struct hpet_softc *sc)
85{
86 uint32_t val;
87
88 val = bus_read_4(sc->mem_res, HPET_CONFIG);
89 val &= ~HPET_CNF_LEG_RT;
90 val |= HPET_CNF_ENABLE;
91 bus_write_4(sc->mem_res, HPET_CONFIG, val);
92}
93
94static void
117{
118 uint32_t val;
119
120 val = bus_read_4(sc->mem_res, HPET_CONFIG);
121 val &= ~HPET_CNF_LEG_RT;
122 val |= HPET_CNF_ENABLE;
123 bus_write_4(sc->mem_res, HPET_CONFIG, val);
124}
125
126static void
95hpet_disable(struct acpi_hpet_softc *sc)
127hpet_disable(struct hpet_softc *sc)
96{
97 uint32_t val;
98
99 val = bus_read_4(sc->mem_res, HPET_CONFIG);
100 val &= ~HPET_CNF_ENABLE;
101 bus_write_4(sc->mem_res, HPET_CONFIG, val);
102}
103
128{
129 uint32_t val;
130
131 val = bus_read_4(sc->mem_res, HPET_CONFIG);
132 val &= ~HPET_CNF_ENABLE;
133 bus_write_4(sc->mem_res, HPET_CONFIG, val);
134}
135
136static int
137hpet_start(struct eventtimer *et,
138 struct bintime *first, struct bintime *period)
139{
140 struct hpet_timer *mt = (struct hpet_timer *)et->et_priv;
141 struct hpet_timer *t;
142 struct hpet_softc *sc = mt->sc;
143 uint32_t fdiv;
144
145 t = (mt->pcpu_master < 0) ? mt : &sc->t[mt->pcpu_slaves[curcpu]];
146 if (period != NULL) {
147 t->mode = 1;
148 t->div = (sc->freq * (period->frac >> 32)) >> 32;
149 if (period->sec != 0)
150 t->div += sc->freq * period->sec;
151 if (first == NULL)
152 first = period;
153 } else {
154 t->mode = 2;
155 t->div = 0;
156 }
157 fdiv = (sc->freq * (first->frac >> 32)) >> 32;
158 if (first->sec != 0)
159 fdiv += sc->freq * first->sec;
160 t->last = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
161 if (t->mode == 1 && (t->caps & HPET_TCAP_PER_INT)) {
162 t->caps |= HPET_TCNF_TYPE;
163 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num),
164 t->caps | HPET_TCNF_VAL_SET);
165 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
166 t->last + fdiv);
167 bus_read_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num));
168 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
169 t->div);
170 } else {
171 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
172 t->last + fdiv);
173 }
174 t->caps |= HPET_TCNF_INT_ENB;
175 bus_write_4(sc->mem_res, HPET_ISR, 1 << t->num);
176 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps);
177 return (0);
178}
179
180static int
181hpet_stop(struct eventtimer *et)
182{
183 struct hpet_timer *mt = (struct hpet_timer *)et->et_priv;
184 struct hpet_timer *t;
185 struct hpet_softc *sc = mt->sc;
186
187 t = (mt->pcpu_master < 0) ? mt : &sc->t[mt->pcpu_slaves[curcpu]];
188 t->mode = 0;
189 t->caps &= ~(HPET_TCNF_INT_ENB | HPET_TCNF_TYPE);
190 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps);
191 return (0);
192}
193
194static int
195hpet_intr_single(void *arg)
196{
197 struct hpet_timer *t = (struct hpet_timer *)arg;
198 struct hpet_timer *mt;
199 struct hpet_softc *sc = t->sc;
200 uint32_t now;
201
202 if (t->mode == 1 &&
203 (t->caps & HPET_TCAP_PER_INT) == 0) {
204 t->last += t->div;
205 now = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
206 if ((int32_t)(now - (t->last + t->div / 2)) > 0)
207 t->last = now - t->div / 2;
208 bus_write_4(sc->mem_res,
209 HPET_TIMER_COMPARATOR(t->num), t->last + t->div);
210 } else if (t->mode == 2)
211 t->mode = 0;
212 mt = (t->pcpu_master < 0) ? t : &sc->t[t->pcpu_master];
213 if (mt->et.et_active) {
214 mt->et.et_event_cb(&mt->et,
215 mt->et.et_arg ? mt->et.et_arg : curthread->td_intr_frame);
216 }
217 return (FILTER_HANDLED);
218}
219
220static int
221hpet_intr(void *arg)
222{
223 struct hpet_softc *sc = (struct hpet_softc *)arg;
224 int i;
225 uint32_t val;
226
227 val = bus_read_4(sc->mem_res, HPET_ISR);
228 if (val) {
229 bus_write_4(sc->mem_res, HPET_ISR, val);
230 val &= sc->useirq;
231 for (i = 0; i < sc->num_timers; i++) {
232 if ((val & (1 << i)) == 0)
233 continue;
234 hpet_intr_single(&sc->t[i]);
235 }
236 return (FILTER_HANDLED);
237 }
238 return (FILTER_STRAY);
239}
240
104static ACPI_STATUS
241static ACPI_STATUS
105acpi_hpet_find(ACPI_HANDLE handle, UINT32 level, void *context,
242hpet_find(ACPI_HANDLE handle, UINT32 level, void *context,
106 void **status)
107{
108 char **ids;
109 uint32_t id = (uint32_t)(uintptr_t)context;
110 uint32_t uid = 0;
111
112 for (ids = hpet_ids; *ids != NULL; ids++) {
113 if (acpi_MatchHid(handle, *ids))
114 break;
115 }
116 if (*ids == NULL)
117 return (AE_OK);
243 void **status)
244{
245 char **ids;
246 uint32_t id = (uint32_t)(uintptr_t)context;
247 uint32_t uid = 0;
248
249 for (ids = hpet_ids; *ids != NULL; ids++) {
250 if (acpi_MatchHid(handle, *ids))
251 break;
252 }
253 if (*ids == NULL)
254 return (AE_OK);
118 if (ACPI_FAILURE(acpi_GetInteger(handle, "_UID", &uid)))
119 uid = 0;
120 if (id == uid)
255 if (ACPI_FAILURE(acpi_GetInteger(handle, "_UID", &uid)) ||
256 id == uid)
121 *((int *)status) = 1;
122 return (AE_OK);
123}
124
125/* Discover the HPET via the ACPI table of the same name. */
126static void
257 *((int *)status) = 1;
258 return (AE_OK);
259}
260
261/* Discover the HPET via the ACPI table of the same name. */
262static void
127acpi_hpet_identify(driver_t *driver, device_t parent)
263hpet_identify(driver_t *driver, device_t parent)
128{
129 ACPI_TABLE_HPET *hpet;
130 ACPI_STATUS status;
131 device_t child;
132 int i, found;
133
134 /* Only one HPET device can be added. */
264{
265 ACPI_TABLE_HPET *hpet;
266 ACPI_STATUS status;
267 device_t child;
268 int i, found;
269
270 /* Only one HPET device can be added. */
135 if (devclass_get_device(acpi_hpet_devclass, 0))
271 if (devclass_get_device(hpet_devclass, 0))
136 return;
137 for (i = 1; ; i++) {
138 /* Search for HPET table. */
139 status = AcpiGetTable(ACPI_SIG_HPET, i, (ACPI_TABLE_HEADER **)&hpet);
140 if (ACPI_FAILURE(status))
141 return;
142 /* Search for HPET device with same ID. */
143 found = 0;
144 AcpiWalkNamespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
272 return;
273 for (i = 1; ; i++) {
274 /* Search for HPET table. */
275 status = AcpiGetTable(ACPI_SIG_HPET, i, (ACPI_TABLE_HEADER **)&hpet);
276 if (ACPI_FAILURE(status))
277 return;
278 /* Search for HPET device with same ID. */
279 found = 0;
280 AcpiWalkNamespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
145 100, acpi_hpet_find, NULL, (void *)(uintptr_t)hpet->Sequence, (void *)&found);
281 100, hpet_find, NULL, (void *)(uintptr_t)hpet->Sequence, (void *)&found);
146 /* If found - let it be probed in normal way. */
147 if (found)
148 continue;
149 /* If not - create it from table info. */
282 /* If found - let it be probed in normal way. */
283 if (found)
284 continue;
285 /* If not - create it from table info. */
150 child = BUS_ADD_CHILD(parent, ACPI_DEV_BASE_ORDER, "acpi_hpet", 0);
286 child = BUS_ADD_CHILD(parent, ACPI_DEV_BASE_ORDER, "hpet", 0);
151 if (child == NULL) {
152 printf("%s: can't add child\n", __func__);
153 continue;
154 }
155 bus_set_resource(child, SYS_RES_MEMORY, 0, hpet->Address.Address,
156 HPET_MEM_WIDTH);
157 }
158}
159
160static int
287 if (child == NULL) {
288 printf("%s: can't add child\n", __func__);
289 continue;
290 }
291 bus_set_resource(child, SYS_RES_MEMORY, 0, hpet->Address.Address,
292 HPET_MEM_WIDTH);
293 }
294}
295
296static int
161acpi_hpet_probe(device_t dev)
297hpet_probe(device_t dev)
162{
163 ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__);
164
165 if (acpi_disabled("hpet"))
166 return (ENXIO);
167 if (acpi_get_handle(dev) != NULL &&
168 ACPI_ID_PROBE(device_get_parent(dev), dev, hpet_ids) == NULL)
169 return (ENXIO);
170
171 device_set_desc(dev, "High Precision Event Timer");
172 return (0);
173}
174
175static int
298{
299 ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__);
300
301 if (acpi_disabled("hpet"))
302 return (ENXIO);
303 if (acpi_get_handle(dev) != NULL &&
304 ACPI_ID_PROBE(device_get_parent(dev), dev, hpet_ids) == NULL)
305 return (ENXIO);
306
307 device_set_desc(dev, "High Precision Event Timer");
308 return (0);
309}
310
311static int
176acpi_hpet_attach(device_t dev)
312hpet_attach(device_t dev)
177{
313{
178 struct acpi_hpet_softc *sc;
179 int rid, num_timers;
180 uint32_t val, val2;
181 uintmax_t freq;
182 uint16_t vendor;
314 struct hpet_softc *sc;
315 struct hpet_timer *t;
316 int i, j, num_msi, num_timers, num_percpu_et, num_percpu_t, cur_cpu;
317 int pcpu_master;
318 static int maxhpetet = 0;
319 uint32_t val, val2, cvectors;
320 uint16_t vendor, rev;
183
184 ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__);
185
186 sc = device_get_softc(dev);
187 sc->dev = dev;
188 sc->handle = acpi_get_handle(dev);
189
321
322 ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__);
323
324 sc = device_get_softc(dev);
325 sc->dev = dev;
326 sc->handle = acpi_get_handle(dev);
327
190 rid = 0;
191 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
328 sc->mem_rid = 0;
329 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
192 RF_ACTIVE);
193 if (sc->mem_res == NULL)
194 return (ENOMEM);
195
196 /* Validate that we can access the whole region. */
197 if (rman_get_size(sc->mem_res) < HPET_MEM_WIDTH) {
198 device_printf(dev, "memory region width %ld too small\n",
199 rman_get_size(sc->mem_res));

--- 8 unchanged lines hidden (view full) ---

208 val = bus_read_4(sc->mem_res, HPET_PERIOD);
209 if (val == 0) {
210 device_printf(dev, "invalid period\n");
211 hpet_disable(sc);
212 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
213 return (ENXIO);
214 }
215
330 RF_ACTIVE);
331 if (sc->mem_res == NULL)
332 return (ENOMEM);
333
334 /* Validate that we can access the whole region. */
335 if (rman_get_size(sc->mem_res) < HPET_MEM_WIDTH) {
336 device_printf(dev, "memory region width %ld too small\n",
337 rman_get_size(sc->mem_res));

--- 8 unchanged lines hidden (view full) ---

346 val = bus_read_4(sc->mem_res, HPET_PERIOD);
347 if (val == 0) {
348 device_printf(dev, "invalid period\n");
349 hpet_disable(sc);
350 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
351 return (ENXIO);
352 }
353
216 freq = (1000000000000000LL + val / 2) / val;
354 sc->freq = (1000000000000000LL + val / 2) / val;
355 val = bus_read_4(sc->mem_res, HPET_CAPABILITIES);
356 vendor = (val & HPET_CAP_VENDOR_ID) >> 16;
357 rev = val & HPET_CAP_REV_ID;
358 num_timers = 1 + ((val & HPET_CAP_NUM_TIM) >> 8);
359 /*
360 * ATI/AMD violates IA-PC HPET (High Precision Event Timers)
361 * Specification and provides an off by one number
362 * of timers/comparators.
363 * Additionally, they use unregistered value in VENDOR_ID field.
364 */
365 if (vendor == HPET_VENDID_AMD && rev < 0x10 && num_timers > 0)
366 num_timers--;
367 sc->num_timers = num_timers;
217 if (bootverbose) {
368 if (bootverbose) {
218 val = bus_read_4(sc->mem_res, HPET_CAPABILITIES);
219
220 /*
221 * ATI/AMD violates IA-PC HPET (High Precision Event Timers)
222 * Specification and provides an off by one number
223 * of timers/comparators.
224 * Additionally, they use unregistered value in VENDOR_ID field.
225 */
226 num_timers = 1 + ((val & HPET_CAP_NUM_TIM) >> 8);
227 vendor = val >> 16;
228 if (vendor == HPET_VENDID_AMD && num_timers > 0)
229 num_timers--;
230 device_printf(dev,
369 device_printf(dev,
231 "vend: 0x%x rev: 0x%x num: %d hz: %jd opts:%s%s\n",
232 vendor, val & HPET_CAP_REV_ID,
233 num_timers, freq,
234 (val & HPET_CAP_LEG_RT) ? " legacy_route" : "",
235 (val & HPET_CAP_COUNT_SIZE) ? " 64-bit" : "");
370 "vendor 0x%x, rev 0x%x, %jdHz%s, %d timers,%s\n",
371 vendor, rev,
372 sc->freq, (val & HPET_CAP_COUNT_SIZE) ? " 64bit" : "",
373 num_timers, (val & HPET_CAP_LEG_RT) ? " legacy route" : "");
236 }
374 }
237
375 num_msi = 0;
376 for (i = 0; i < num_timers; i++) {
377 t = &sc->t[i];
378 t->sc = sc;
379 t->num = i;
380 t->mode = 0;
381 t->intr_rid = -1;
382 t->irq = -1;
383 t->pcpu_master = -1;
384 t->caps = bus_read_4(sc->mem_res, HPET_TIMER_CAP_CNF(i));
385 t->vectors = bus_read_4(sc->mem_res, HPET_TIMER_CAP_CNF(i) + 4);
386 if (bootverbose) {
387 device_printf(dev,
388 " t%d: irqs 0x%08x (%d)%s%s%s\n", i,
389 t->vectors, (t->caps & HPET_TCNF_INT_ROUTE) >> 9,
390 (t->caps & HPET_TCAP_FSB_INT_DEL) ? ", MSI" : "",
391 (t->caps & HPET_TCAP_SIZE) ? ", 64bit" : "",
392 (t->caps & HPET_TCAP_PER_INT) ? ", periodic" : "");
393 }
394#ifdef DEV_APIC
395 if (t->caps & HPET_TCAP_FSB_INT_DEL)
396 num_msi++;
397#endif
398 }
238 if (testenv("debug.acpi.hpet_test"))
399 if (testenv("debug.acpi.hpet_test"))
239 acpi_hpet_test(sc);
240
400 hpet_test(sc);
241 /*
242 * Don't attach if the timer never increments. Since the spec
243 * requires it to be at least 10 MHz, it has to change in 1 us.
244 */
245 val = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
246 DELAY(1);
247 val2 = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
248 if (val == val2) {
249 device_printf(dev, "HPET never increments, disabling\n");
250 hpet_disable(sc);
251 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
252 return (ENXIO);
253 }
254 /* Announce first HPET as timecounter. */
255 if (device_get_unit(dev) == 0) {
401 /*
402 * Don't attach if the timer never increments. Since the spec
403 * requires it to be at least 10 MHz, it has to change in 1 us.
404 */
405 val = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
406 DELAY(1);
407 val2 = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
408 if (val == val2) {
409 device_printf(dev, "HPET never increments, disabling\n");
410 hpet_disable(sc);
411 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
412 return (ENXIO);
413 }
414 /* Announce first HPET as timecounter. */
415 if (device_get_unit(dev) == 0) {
256 hpet_timecounter.tc_frequency = freq;
257 hpet_timecounter.tc_priv = sc;
258 tc_init(&hpet_timecounter);
416 sc->tc.tc_get_timecount = hpet_get_timecount,
417 sc->tc.tc_counter_mask = ~0u,
418 sc->tc.tc_name = "HPET",
419 sc->tc.tc_quality = 900,
420 sc->tc.tc_frequency = sc->freq;
421 sc->tc.tc_priv = sc;
422 tc_init(&sc->tc);
259 }
423 }
424 /* If not disabled - setup and announce event timers. */
425 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
426 "clock", &i) == 0 && i == 0)
427 return (0);
428 num_percpu_et = min(num_msi / mp_ncpus, 2);
429 num_percpu_t = num_percpu_et * mp_ncpus;
430 cur_cpu = CPU_FIRST();
431 pcpu_master = 0;
432 /* Find common legacy IRQ vectors for all timers. */
433 cvectors = 0xffff0000;
434 /*
435 * HPETs in AMD chipsets before SB800 have problems with IRQs >= 16
436 * Lower are also not always working for different reasons.
437 * SB800 fixed it, but seems do not implements level triggering
438 * properly, that makes it very unreliable - it freezes after any
439 * interrupt loss. Avoid legacy IRQs for AMD.
440 */
441 if (vendor == HPET_VENDID_AMD)
442 cvectors = 0x00000000;
443 sc->useirq = 0;
444 for (i = 0; i < num_timers; i++) {
445 t = &sc->t[i];
446#ifdef DEV_APIC
447 if (t->caps & HPET_TCAP_FSB_INT_DEL) {
448 if ((j = PCIB_ALLOC_MSIX(
449 device_get_parent(device_get_parent(dev)), dev,
450 &t->irq))) {
451 device_printf(dev,
452 "Can't allocate interrupt: %d.\n", j);
453 } else if (!(t->intr_res =
454 bus_alloc_resource(dev, SYS_RES_IRQ, &t->intr_rid,
455 t->irq, t->irq, 1, RF_SHAREABLE | RF_ACTIVE))) {
456 device_printf(dev, "Can't map interrupt.\n");
457 } else if ((bus_setup_intr(dev, t->intr_res,
458 INTR_MPSAFE | INTR_TYPE_CLK,
459 (driver_filter_t *)hpet_intr_single, NULL,
460 t, &t->intr_handle))) {
461 device_printf(dev, "Can't setup interrupt.\n");
462 } else {
463 bus_describe_intr(dev, t->intr_res,
464 t->intr_handle, "t%d", i);
465 num_msi++;
466 if (num_percpu_t > 0) {
467 if (cur_cpu == CPU_FIRST())
468 pcpu_master = i;
469 t->pcpu_master = pcpu_master;
470 sc->t[pcpu_master].
471 pcpu_slaves[cur_cpu] = i;
472 bus_bind_intr(dev, t->intr_res, cur_cpu);
473 cur_cpu = CPU_NEXT(cur_cpu);
474 num_percpu_t--;
475 }
476 }
477 } else
478#endif
479 if ((cvectors & t->vectors) != 0) {
480 cvectors &= t->vectors;
481 sc->useirq |= (1 << i);
482 }
483 }
484 bus_write_4(sc->mem_res, HPET_ISR, 0xffffffff);
485 sc->irq = -1;
486 sc->intr_rid = -1;
487 /* If at least one timer needs legacy IRQ - setup it. */
488 if (sc->useirq) {
489 j = i = fls(cvectors) - 1;
490 while (j > 0 && (cvectors & (1 << (j - 1))) != 0)
491 j--;
492 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ,
493 &sc->intr_rid, j, i, 1, RF_SHAREABLE | RF_ACTIVE)))
494 device_printf(dev,"Can't map interrupt.\n");
495 else if ((bus_setup_intr(dev, sc->intr_res,
496 INTR_MPSAFE | INTR_TYPE_CLK,
497 (driver_filter_t *)hpet_intr, NULL,
498 sc, &sc->intr_handle))) {
499 device_printf(dev, "Can't setup interrupt.\n");
500 } else {
501 sc->irq = rman_get_start(sc->intr_res);
502 /* Bind IRQ to BSP to avoid live migration. */
503 bus_bind_intr(dev, sc->intr_res, CPU_FIRST());
504 }
505 }
506 /* Program and announce event timers. */
507 for (i = 0; i < num_timers; i++) {
508 t = &sc->t[i];
509 t->caps &= ~(HPET_TCNF_FSB_EN | HPET_TCNF_INT_ROUTE);
510 t->caps &= ~(HPET_TCNF_VAL_SET | HPET_TCNF_INT_ENB);
511 t->caps |= HPET_TCNF_32MODE;
512#ifdef DEV_APIC
513 if (t->irq >= 0) {
514 uint64_t addr;
515 uint32_t data;
516
517 if (PCIB_MAP_MSI(
518 device_get_parent(device_get_parent(dev)), dev,
519 t->irq, &addr, &data) == 0) {
520 bus_write_4(sc->mem_res,
521 HPET_TIMER_FSB_ADDR(i), addr);
522 bus_write_4(sc->mem_res,
523 HPET_TIMER_FSB_VAL(i), data);
524 t->caps |= HPET_TCNF_FSB_EN;
525 } else
526 t->irq = -2;
527 } else
528#endif
529 t->caps |= (sc->irq << 9) | HPET_TCNF_INT_TYPE;
530 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(i), t->caps);
531 /* Skip event timers without set up IRQ. */
532 if (t->irq < 0 &&
533 (sc->irq < 0 || (t->vectors & (1 << sc->irq)) == 0))
534 continue;
535 /* Announce the reset. */
536 if (maxhpetet == 0)
537 t->et.et_name = "HPET";
538 else {
539 sprintf(t->name, "HPET%d", maxhpetet);
540 t->et.et_name = t->name;
541 }
542 t->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
543 t->et.et_quality = 450;
544 if (t->pcpu_master >= 0) {
545 t->et.et_flags |= ET_FLAGS_PERCPU;
546 t->et.et_quality += 100;
547 }
548 if ((t->caps & HPET_TCAP_PER_INT) == 0)
549 t->et.et_quality -= 10;
550 t->et.et_frequency = sc->freq;
551 t->et.et_start = hpet_start;
552 t->et.et_stop = hpet_stop;
553 t->et.et_priv = &sc->t[i];
554 if (t->pcpu_master < 0 || t->pcpu_master == i) {
555 et_register(&t->et);
556 maxhpetet++;
557 }
558 }
260 return (0);
261}
262
263static int
559 return (0);
560}
561
562static int
264acpi_hpet_detach(device_t dev)
563hpet_detach(device_t dev)
265{
266 ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__);
267
268 /* XXX Without a tc_remove() function, we can't detach. */
269 return (EBUSY);
270}
271
272static int
564{
565 ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__);
566
567 /* XXX Without a tc_remove() function, we can't detach. */
568 return (EBUSY);
569}
570
571static int
273acpi_hpet_suspend(device_t dev)
572hpet_suspend(device_t dev)
274{
573{
275 struct acpi_hpet_softc *sc;
574 struct hpet_softc *sc;
276
277 /*
278 * Disable the timer during suspend. The timer will not lose
279 * its state in S1 or S2, but we are required to disable
280 * it.
281 */
282 sc = device_get_softc(dev);
283 hpet_disable(sc);
284
285 return (0);
286}
287
288static int
575
576 /*
577 * Disable the timer during suspend. The timer will not lose
578 * its state in S1 or S2, but we are required to disable
579 * it.
580 */
581 sc = device_get_softc(dev);
582 hpet_disable(sc);
583
584 return (0);
585}
586
587static int
289acpi_hpet_resume(device_t dev)
588hpet_resume(device_t dev)
290{
589{
291 struct acpi_hpet_softc *sc;
590 struct hpet_softc *sc;
591 struct hpet_timer *t;
592 int i;
292
293 /* Re-enable the timer after a resume to keep the clock advancing. */
294 sc = device_get_softc(dev);
295 hpet_enable(sc);
593
594 /* Re-enable the timer after a resume to keep the clock advancing. */
595 sc = device_get_softc(dev);
596 hpet_enable(sc);
296
597 /* Restart event timers that were running on suspend. */
598 for (i = 0; i < sc->num_timers; i++) {
599 t = &sc->t[i];
600#ifdef DEV_APIC
601 if (t->irq >= 0) {
602 uint64_t addr;
603 uint32_t data;
604
605 if (PCIB_MAP_MSI(
606 device_get_parent(device_get_parent(dev)), dev,
607 t->irq, &addr, &data) == 0) {
608 bus_write_4(sc->mem_res,
609 HPET_TIMER_FSB_ADDR(i), addr);
610 bus_write_4(sc->mem_res,
611 HPET_TIMER_FSB_VAL(i), data);
612 }
613 }
614#endif
615 if (t->mode == 0)
616 continue;
617 t->last = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
618 if (t->mode == 1 && (t->caps & HPET_TCAP_PER_INT)) {
619 t->caps |= HPET_TCNF_TYPE;
620 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num),
621 t->caps | HPET_TCNF_VAL_SET);
622 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
623 t->last + t->div);
624 bus_read_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num));
625 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
626 t->div);
627 } else {
628 bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
629 t->last + sc->freq / 1024);
630 }
631 bus_write_4(sc->mem_res, HPET_ISR, 1 << t->num);
632 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps);
633 }
297 return (0);
298}
299
300/* Print some basic latency/rate information to assist in debugging. */
301static void
634 return (0);
635}
636
637/* Print some basic latency/rate information to assist in debugging. */
638static void
302acpi_hpet_test(struct acpi_hpet_softc *sc)
639hpet_test(struct hpet_softc *sc)
303{
304 int i;
305 uint32_t u1, u2;
306 struct bintime b0, b1, b2;
307 struct timespec ts;
308
309 binuptime(&b0);
310 binuptime(&b0);

--- 10 unchanged lines hidden (view full) ---

321 bintime2timespec(&b2, &ts);
322
323 device_printf(sc->dev, "%ld.%09ld: %u ... %u = %u\n",
324 (long)ts.tv_sec, ts.tv_nsec, u1, u2, u2 - u1);
325
326 device_printf(sc->dev, "time per call: %ld ns\n", ts.tv_nsec / 1000);
327}
328
640{
641 int i;
642 uint32_t u1, u2;
643 struct bintime b0, b1, b2;
644 struct timespec ts;
645
646 binuptime(&b0);
647 binuptime(&b0);

--- 10 unchanged lines hidden (view full) ---

658 bintime2timespec(&b2, &ts);
659
660 device_printf(sc->dev, "%ld.%09ld: %u ... %u = %u\n",
661 (long)ts.tv_sec, ts.tv_nsec, u1, u2, u2 - u1);
662
663 device_printf(sc->dev, "time per call: %ld ns\n", ts.tv_nsec / 1000);
664}
665
329static device_method_t acpi_hpet_methods[] = {
666#ifdef DEV_APIC
667static int
668hpet_remap_intr(device_t dev, device_t child, u_int irq)
669{
670 struct hpet_softc *sc = device_get_softc(dev);
671 struct hpet_timer *t;
672 uint64_t addr;
673 uint32_t data;
674 int error, i;
675
676 for (i = 0; i < sc->num_timers; i++) {
677 t = &sc->t[i];
678 if (t->irq != irq)
679 continue;
680 error = PCIB_MAP_MSI(
681 device_get_parent(device_get_parent(dev)), dev,
682 irq, &addr, &data);
683 if (error)
684 return (error);
685 hpet_disable(sc); /* Stop timer to avoid interrupt loss. */
686 bus_write_4(sc->mem_res, HPET_TIMER_FSB_ADDR(i), addr);
687 bus_write_4(sc->mem_res, HPET_TIMER_FSB_VAL(i), data);
688 hpet_enable(sc);
689 return (0);
690 }
691 return (ENOENT);
692}
693#endif
694
695static device_method_t hpet_methods[] = {
330 /* Device interface */
696 /* Device interface */
331 DEVMETHOD(device_identify, acpi_hpet_identify),
332 DEVMETHOD(device_probe, acpi_hpet_probe),
333 DEVMETHOD(device_attach, acpi_hpet_attach),
334 DEVMETHOD(device_detach, acpi_hpet_detach),
335 DEVMETHOD(device_suspend, acpi_hpet_suspend),
336 DEVMETHOD(device_resume, acpi_hpet_resume),
697 DEVMETHOD(device_identify, hpet_identify),
698 DEVMETHOD(device_probe, hpet_probe),
699 DEVMETHOD(device_attach, hpet_attach),
700 DEVMETHOD(device_detach, hpet_detach),
701 DEVMETHOD(device_suspend, hpet_suspend),
702 DEVMETHOD(device_resume, hpet_resume),
337
703
704#ifdef DEV_APIC
705 DEVMETHOD(bus_remap_intr, hpet_remap_intr),
706#endif
707
338 {0, 0}
339};
340
708 {0, 0}
709};
710
341static driver_t acpi_hpet_driver = {
342 "acpi_hpet",
343 acpi_hpet_methods,
344 sizeof(struct acpi_hpet_softc),
711static driver_t hpet_driver = {
712 "hpet",
713 hpet_methods,
714 sizeof(struct hpet_softc),
345};
346
715};
716
347
348DRIVER_MODULE(acpi_hpet, acpi, acpi_hpet_driver, acpi_hpet_devclass, 0, 0);
349MODULE_DEPEND(acpi_hpet, acpi, 1, 1, 1);
717DRIVER_MODULE(hpet, acpi, hpet_driver, hpet_devclass, 0, 0);
718MODULE_DEPEND(hpet, acpi, 1, 1, 1);