Deleted Added
sdiff udiff text old ( 215014 ) new ( 215990 )
full compact
cvmx-helper-board.c (215014) cvmx-helper-board.c (215990)
1/***********************license start***************
1/***********************license start***************
2 * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
3 * reserved.
2 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
3 * reserved.
4 *
5 *
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 *
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
12 *
13 * * Redistributions in binary form must reproduce the above
14 * copyright notice, this list of conditions and the following
15 * disclaimer in the documentation and/or other materials provided
16 * with the distribution.
17 *
18 * * Neither the name of Cavium Networks nor the names of
19 * its contributors may be used to endorse or promote products
20 * derived from this software without specific prior written
21 * permission.
22 *
23 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
24 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
25 * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
26 * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
27 * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
28 * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
29 * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
30 * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
31 * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
32 * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
33 *
34 *
35 * For any questions regarding licensing please contact marketing@caviumnetworks.com
36 *
13 * * Redistributions in binary form must reproduce the above
14 * copyright notice, this list of conditions and the following
15 * disclaimer in the documentation and/or other materials provided
16 * with the distribution.
17
18 * * Neither the name of Cavium Networks nor the names of
19 * its contributors may be used to endorse or promote products
20 * derived from this software without specific prior written
21 * permission.
22
23 * This Software, including technical data, may be subject to U.S. export control
24 * laws, including the U.S. Export Administration Act and its associated
25 * regulations, and may be subject to export or import regulations in other
26 * countries.
27
28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
37 ***********************license end**************************************/
38
39
40
41
42
43
38 ***********************license end**************************************/
39
40
41
42
43
44
45
44/**
45 * @file
46 *
47 * Helper functions to abstract board specific data about
48 * network ports from the rest of the cvmx-helper files.
49 *
46/**
47 * @file
48 *
49 * Helper functions to abstract board specific data about
50 * network ports from the rest of the cvmx-helper files.
51 *
50 * <hr>$Revision: 41946 $<hr>
52 * <hr>$Revision: 49627 $<hr>
51 */
53 */
54#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
55#include <linux/module.h>
56#include <asm/octeon/cvmx.h>
57#include <asm/octeon/cvmx-bootinfo.h>
58#include <asm/octeon/cvmx-smix-defs.h>
59#include <asm/octeon/cvmx-gmxx-defs.h>
60#include <asm/octeon/cvmx-asxx-defs.h>
61#include <asm/octeon/cvmx-mdio.h>
62#include <asm/octeon/cvmx-helper.h>
63#include <asm/octeon/cvmx-helper-util.h>
64#include <asm/octeon/cvmx-helper-board.h>
65#include <asm/octeon/cvmx-twsi.h>
66#else
52#include "cvmx.h"
53#include "cvmx-app-init.h"
67#include "cvmx.h"
68#include "cvmx-app-init.h"
54#include "cvmx-mdio.h"
55#include "cvmx-sysinfo.h"
69#include "cvmx-sysinfo.h"
70#include "cvmx-twsi.h"
71#include "cvmx-mdio.h"
56#include "cvmx-helper.h"
57#include "cvmx-helper-util.h"
58#include "cvmx-helper-board.h"
72#include "cvmx-helper.h"
73#include "cvmx-helper-util.h"
74#include "cvmx-helper-board.h"
75#endif
59
60/**
61 * cvmx_override_board_link_get(int ipd_port) is a function
62 * pointer. It is meant to allow customization of the process of
63 * talking to a PHY to determine link speed. It is called every
64 * time a PHY must be polled for link status. Users should set
65 * this pointer to a function before calling any cvmx-helper
66 * operations.

--- 47 unchanged lines hidden (view full) ---

114 case CVMX_BOARD_TYPE_EBT5800:
115 case CVMX_BOARD_TYPE_THUNDER:
116 case CVMX_BOARD_TYPE_NICPRO2:
117 /* Interface 0 is SPI4, interface 1 is RGMII */
118 if ((ipd_port >= 16) && (ipd_port < 20))
119 return ipd_port - 16;
120 else
121 return -1;
76
77/**
78 * cvmx_override_board_link_get(int ipd_port) is a function
79 * pointer. It is meant to allow customization of the process of
80 * talking to a PHY to determine link speed. It is called every
81 * time a PHY must be polled for link status. Users should set
82 * this pointer to a function before calling any cvmx-helper
83 * operations.

--- 47 unchanged lines hidden (view full) ---

131 case CVMX_BOARD_TYPE_EBT5800:
132 case CVMX_BOARD_TYPE_THUNDER:
133 case CVMX_BOARD_TYPE_NICPRO2:
134 /* Interface 0 is SPI4, interface 1 is RGMII */
135 if ((ipd_port >= 16) && (ipd_port < 20))
136 return ipd_port - 16;
137 else
138 return -1;
139 case CVMX_BOARD_TYPE_LANAI2_A:
140 if (ipd_port == 0)
141 return 0;
142 else
143 return -1;
144 case CVMX_BOARD_TYPE_LANAI2_U:
145 case CVMX_BOARD_TYPE_LANAI2_G:
146 if (ipd_port == 0)
147 return 0x1c;
148 else
149 return -1;
122 case CVMX_BOARD_TYPE_KODAMA:
123 case CVMX_BOARD_TYPE_EBH3100:
124 case CVMX_BOARD_TYPE_HIKARI:
125 case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
126 case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
127 case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
128 /* Port 0 is WAN connected to a PHY, Port 1 is GMII connected to a
129 switch */

--- 9 unchanged lines hidden (view full) ---

139 return ipd_port;
140 else if ((ipd_port >= 16) && (ipd_port < 20))
141 return ipd_port - 16 + 4;
142 else
143 return -1;
144 case CVMX_BOARD_TYPE_EBH3000:
145 /* Board has dual SPI4 and no PHYs */
146 return -1;
150 case CVMX_BOARD_TYPE_KODAMA:
151 case CVMX_BOARD_TYPE_EBH3100:
152 case CVMX_BOARD_TYPE_HIKARI:
153 case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
154 case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
155 case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
156 /* Port 0 is WAN connected to a PHY, Port 1 is GMII connected to a
157 switch */

--- 9 unchanged lines hidden (view full) ---

167 return ipd_port;
168 else if ((ipd_port >= 16) && (ipd_port < 20))
169 return ipd_port - 16 + 4;
170 else
171 return -1;
172 case CVMX_BOARD_TYPE_EBH3000:
173 /* Board has dual SPI4 and no PHYs */
174 return -1;
175 case CVMX_BOARD_TYPE_EBT5810:
176 /* Board has 10g PHYs hooked up to the MII controller on the
177 ** IXF18201 MAC. The 10G PHYS use clause 45 MDIO which the CN58XX
178 ** does not support. All MII accesses go through the IXF part. */
179 return -1;
147 case CVMX_BOARD_TYPE_EBH5200:
148 case CVMX_BOARD_TYPE_EBH5201:
149 case CVMX_BOARD_TYPE_EBT5200:
180 case CVMX_BOARD_TYPE_EBH5200:
181 case CVMX_BOARD_TYPE_EBH5201:
182 case CVMX_BOARD_TYPE_EBT5200:
183 /* Board has 2 management ports */
184 if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) && (ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2)))
185 return ipd_port - CVMX_HELPER_BOARD_MGMT_IPD_PORT;
150 /* Board has 4 SGMII ports. The PHYs start right after the MII
151 ports MII0 = 0, MII1 = 1, SGMII = 2-5 */
152 if ((ipd_port >= 0) && (ipd_port < 4))
153 return ipd_port+2;
154 else
155 return -1;
156 case CVMX_BOARD_TYPE_EBH5600:
157 case CVMX_BOARD_TYPE_EBH5601:
186 /* Board has 4 SGMII ports. The PHYs start right after the MII
187 ports MII0 = 0, MII1 = 1, SGMII = 2-5 */
188 if ((ipd_port >= 0) && (ipd_port < 4))
189 return ipd_port+2;
190 else
191 return -1;
192 case CVMX_BOARD_TYPE_EBH5600:
193 case CVMX_BOARD_TYPE_EBH5601:
194 case CVMX_BOARD_TYPE_EBH5610:
195 /* Board has 1 management port */
196 if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
197 return 0;
158 /* Board has 8 SGMII ports. 4 connect out, two connect to a switch,
159 and 2 loop to each other */
160 if ((ipd_port >= 0) && (ipd_port < 4))
161 return ipd_port+1;
162 else
163 return -1;
198 /* Board has 8 SGMII ports. 4 connect out, two connect to a switch,
199 and 2 loop to each other */
200 if ((ipd_port >= 0) && (ipd_port < 4))
201 return ipd_port+1;
202 else
203 return -1;
204 case CVMX_BOARD_TYPE_EBB5600:
205 {
206 static unsigned char qlm_switch_addr = 0;
207
208 /* Board has 1 management port */
209 if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
210 return 0;
211
212 /* Board has 8 SGMII ports. 4 connected QLM1, 4 connected QLM3 */
213 if ((ipd_port >= 0) && (ipd_port < 4))
214 {
215 if (qlm_switch_addr != 0x3)
216 {
217 qlm_switch_addr = 0x3; /* QLM1 */
218 cvmx_twsix_write_ia(0, 0x71, 0, 1, 1, qlm_switch_addr);
219 cvmx_wait_usec(11000); /* Let the write complete */
220 }
221 return ipd_port+1 + (1<<8);
222 }
223 else if ((ipd_port >= 16) && (ipd_port < 20))
224 {
225 if (qlm_switch_addr != 0xC)
226 {
227 qlm_switch_addr = 0xC; /* QLM3 */
228 cvmx_twsix_write_ia(0, 0x71, 0, 1, 1, qlm_switch_addr);
229 cvmx_wait_usec(11000); /* Let the write complete */
230 }
231 return ipd_port-16+1 + (1<<8);
232 }
233 else
234 return -1;
235 }
236 case CVMX_BOARD_TYPE_EBB6300:
237 /* Board has 2 management ports */
238 if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) && (ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2)))
239 return ipd_port - CVMX_HELPER_BOARD_MGMT_IPD_PORT + 4;
240 if ((ipd_port >= 0) && (ipd_port < 4))
241 return ipd_port + 1 + (1<<8);
242 else
243 return -1;
164 case CVMX_BOARD_TYPE_CUST_NB5:
165 if (ipd_port == 2)
166 return 4;
167 else
168 return -1;
169 case CVMX_BOARD_TYPE_NIC_XLE_4G:
170 /* Board has 4 SGMII ports. connected QLM3(interface 1) */
171 if ((ipd_port >= 16) && (ipd_port < 20))
172 return ipd_port - 16 + 1;
173 else
174 return -1;
244 case CVMX_BOARD_TYPE_CUST_NB5:
245 if (ipd_port == 2)
246 return 4;
247 else
248 return -1;
249 case CVMX_BOARD_TYPE_NIC_XLE_4G:
250 /* Board has 4 SGMII ports. connected QLM3(interface 1) */
251 if ((ipd_port >= 16) && (ipd_port < 20))
252 return ipd_port - 16 + 1;
253 else
254 return -1;
255 case CVMX_BOARD_TYPE_NIC_XLE_10G:
256 return -1; /* We don't use clause 45 MDIO for anything */
175 case CVMX_BOARD_TYPE_BBGW_REF:
176 return -1; /* No PHYs are connected to Octeon, everything is through switch */
257 case CVMX_BOARD_TYPE_BBGW_REF:
258 return -1; /* No PHYs are connected to Octeon, everything is through switch */
259 case CVMX_BOARD_TYPE_CUST_WSX16:
260 if (ipd_port >= 0 && ipd_port <= 3)
261 return ipd_port;
262 else if (ipd_port >= 16 && ipd_port <= 19)
263 return ipd_port - 16 + 4;
264 else
265 return -1;
177
178 /* Private vendor-defined boards. */
179#if defined(OCTEON_VENDOR_LANNER)
180 case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
181 /* Interface 1 is 12 BCM5482S PHYs. */
182 if ((ipd_port >= 16) && (ipd_port < 28))
183 return ipd_port - 16;
184 return -1;

--- 13 unchanged lines hidden (view full) ---

198 return 2;
199 default:
200 return -1;
201 }
202#endif
203 }
204
205 /* Some unknown board. Somebody forgot to update this function... */
266
267 /* Private vendor-defined boards. */
268#if defined(OCTEON_VENDOR_LANNER)
269 case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
270 /* Interface 1 is 12 BCM5482S PHYs. */
271 if ((ipd_port >= 16) && (ipd_port < 28))
272 return ipd_port - 16;
273 return -1;

--- 13 unchanged lines hidden (view full) ---

287 return 2;
288 default:
289 return -1;
290 }
291#endif
292 }
293
294 /* Some unknown board. Somebody forgot to update this function... */
206 cvmx_dprintf("cvmx_helper_board_get_mii_address: Unknown board type %d\n",
207 cvmx_sysinfo_get()->board_type);
295 cvmx_dprintf("%s: Unknown board type %d\n",
296 __FUNCTION__, cvmx_sysinfo_get()->board_type);
208 return -1;
209}
297 return -1;
298}
299#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
300EXPORT_SYMBOL(cvmx_helper_board_get_mii_address);
301#endif
210
211
212/**
213 * @INTERNAL
214 * This function is the board specific method of determining an
215 * ethernet ports link speed. Most Octeon boards have Marvell PHYs
216 * and are handled by the fall through case. This function must be
217 * updated for boards that don't have the normal Marvell PHYs.

--- 29 unchanged lines hidden (view full) ---

247 switch (cvmx_sysinfo_get()->board_type)
248 {
249 case CVMX_BOARD_TYPE_SIM:
250 /* The simulator gives you a simulated 1Gbps full duplex link */
251 result.s.link_up = 1;
252 result.s.full_duplex = 1;
253 result.s.speed = 1000;
254 return result;
302
303
304/**
305 * @INTERNAL
306 * This function is the board specific method of determining an
307 * ethernet ports link speed. Most Octeon boards have Marvell PHYs
308 * and are handled by the fall through case. This function must be
309 * updated for boards that don't have the normal Marvell PHYs.

--- 29 unchanged lines hidden (view full) ---

339 switch (cvmx_sysinfo_get()->board_type)
340 {
341 case CVMX_BOARD_TYPE_SIM:
342 /* The simulator gives you a simulated 1Gbps full duplex link */
343 result.s.link_up = 1;
344 result.s.full_duplex = 1;
345 result.s.speed = 1000;
346 return result;
347 case CVMX_BOARD_TYPE_LANAI2_A:
348 case CVMX_BOARD_TYPE_LANAI2_U:
349 case CVMX_BOARD_TYPE_LANAI2_G:
350 break;
255 case CVMX_BOARD_TYPE_EBH3100:
256 case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
257 case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
258 case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
259 /* Port 1 on these boards is always Gigabit */
260 if (ipd_port == 1)
261 {
262 result.s.link_up = 1;
263 result.s.full_duplex = 1;
264 result.s.speed = 1000;
265 return result;
266 }
267 /* Fall through to the generic code below */
268 break;
351 case CVMX_BOARD_TYPE_EBH3100:
352 case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
353 case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
354 case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
355 /* Port 1 on these boards is always Gigabit */
356 if (ipd_port == 1)
357 {
358 result.s.link_up = 1;
359 result.s.full_duplex = 1;
360 result.s.speed = 1000;
361 return result;
362 }
363 /* Fall through to the generic code below */
364 break;
365 case CVMX_BOARD_TYPE_EBH5600:
366 case CVMX_BOARD_TYPE_EBH5601:
367 case CVMX_BOARD_TYPE_EBH5610:
368 /* Board has 1 management ports */
369 if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
370 is_broadcom_phy = 1;
371 break;
372 case CVMX_BOARD_TYPE_EBH5200:
373 case CVMX_BOARD_TYPE_EBH5201:
374 case CVMX_BOARD_TYPE_EBT5200:
375 /* Board has 2 management ports */
376 if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) && (ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2)))
377 is_broadcom_phy = 1;
378 break;
379 case CVMX_BOARD_TYPE_EBB6300: /* Only for MII mode, with PHY addresses 0/1. Default is RGMII*/
380 if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) && (ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2))
381 && cvmx_helper_board_get_mii_address(ipd_port) >= 0 && cvmx_helper_board_get_mii_address(ipd_port) <= 1)
382 is_broadcom_phy = 1;
383 break;
269 case CVMX_BOARD_TYPE_CUST_NB5:
270 /* Port 1 on these boards is always Gigabit */
271 if (ipd_port == 1)
272 {
273 result.s.link_up = 1;
274 result.s.full_duplex = 1;
275 result.s.speed = 1000;
276 return result;
277 }
278 else /* The other port uses a broadcom PHY */
279 is_broadcom_phy = 1;
280 break;
281 case CVMX_BOARD_TYPE_BBGW_REF:
282 /* Port 1 on these boards is always Gigabit */
283 if (ipd_port == 2)
384 case CVMX_BOARD_TYPE_CUST_NB5:
385 /* Port 1 on these boards is always Gigabit */
386 if (ipd_port == 1)
387 {
388 result.s.link_up = 1;
389 result.s.full_duplex = 1;
390 result.s.speed = 1000;
391 return result;
392 }
393 else /* The other port uses a broadcom PHY */
394 is_broadcom_phy = 1;
395 break;
396 case CVMX_BOARD_TYPE_BBGW_REF:
397 /* Port 1 on these boards is always Gigabit */
398 if (ipd_port == 2)
284 {
399 {
285 /* Port 2 is not hooked up */
286 result.u64 = 0;
287 return result;
288 }
289 else
290 {
291 /* Ports 0 and 1 connect to the switch */
292 result.s.link_up = 1;

--- 159 unchanged lines hidden (view full) ---

452 result.u64 = 0;
453
454 return result;
455}
456
457
458/**
459 * This function as a board specific method of changing the PHY
400 /* Port 2 is not hooked up */
401 result.u64 = 0;
402 return result;
403 }
404 else
405 {
406 /* Ports 0 and 1 connect to the switch */
407 result.s.link_up = 1;

--- 159 unchanged lines hidden (view full) ---

567 result.u64 = 0;
568
569 return result;
570}
571
572
573/**
574 * This function as a board specific method of changing the PHY
460 * speed, duplex, and auto-negotiation. This programs the PHY and
575 * speed, duplex, and autonegotiation. This programs the PHY and
461 * not Octeon. This can be used to force Octeon's links to
462 * specific settings.
463 *
464 * @param phy_addr The address of the PHY to program
576 * not Octeon. This can be used to force Octeon's links to
577 * specific settings.
578 *
579 * @param phy_addr The address of the PHY to program
465 * @param enable_autoneg
466 * Non zero if you want to enable auto-negotiation.
467 * @param link_info Link speed to program. If the speed is zero and auto-negotiation
580 * @param link_flags
581 * Flags to control autonegotiation. Bit 0 is autonegotiation
582 * enable/disable to maintain backward compatibility.
583 * @param link_info Link speed to program. If the speed is zero and autonegotiation
468 * is enabled, all possible negotiation speeds are advertised.
469 *
470 * @return Zero on success, negative on failure
471 */
472int cvmx_helper_board_link_set_phy(int phy_addr, cvmx_helper_board_set_phy_link_flags_types_t link_flags,
473 cvmx_helper_link_info_t link_info)
474{
475

--- 114 unchanged lines hidden (view full) ---

590 * @INTERNAL
591 * This function is called by cvmx_helper_interface_probe() after it
592 * determines the number of ports Octeon can support on a specific
593 * interface. This function is the per board location to override
594 * this value. It is called with the number of ports Octeon might
595 * support and should return the number of actual ports on the
596 * board.
597 *
584 * is enabled, all possible negotiation speeds are advertised.
585 *
586 * @return Zero on success, negative on failure
587 */
588int cvmx_helper_board_link_set_phy(int phy_addr, cvmx_helper_board_set_phy_link_flags_types_t link_flags,
589 cvmx_helper_link_info_t link_info)
590{
591

--- 114 unchanged lines hidden (view full) ---

706 * @INTERNAL
707 * This function is called by cvmx_helper_interface_probe() after it
708 * determines the number of ports Octeon can support on a specific
709 * interface. This function is the per board location to override
710 * this value. It is called with the number of ports Octeon might
711 * support and should return the number of actual ports on the
712 * board.
713 *
598 * This function must be modifed for every new Octeon board.
714 * This function must be modified for every new Octeon board.
599 * Internally it uses switch statements based on the cvmx_sysinfo
715 * Internally it uses switch statements based on the cvmx_sysinfo
600 * data to determine board types and revisions. It relys on the
716 * data to determine board types and revisions. It relies on the
601 * fact that every Octeon board receives a unique board type
602 * enumeration from the bootloader.
603 *
604 * @param interface Interface to probe
605 * @param supported_ports
606 * Number of ports Octeon supports.
607 *
608 * @return Number of ports the actual board supports. Many times this will
609 * simple be "support_ports".
610 */
611int __cvmx_helper_board_interface_probe(int interface, int supported_ports)
612{
613 switch (cvmx_sysinfo_get()->board_type)
614 {
615 case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
717 * fact that every Octeon board receives a unique board type
718 * enumeration from the bootloader.
719 *
720 * @param interface Interface to probe
721 * @param supported_ports
722 * Number of ports Octeon supports.
723 *
724 * @return Number of ports the actual board supports. Many times this will
725 * simple be "support_ports".
726 */
727int __cvmx_helper_board_interface_probe(int interface, int supported_ports)
728{
729 switch (cvmx_sysinfo_get()->board_type)
730 {
731 case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
732 case CVMX_BOARD_TYPE_LANAI2_A:
733 case CVMX_BOARD_TYPE_LANAI2_U:
734 case CVMX_BOARD_TYPE_LANAI2_G:
616 if (interface == 0)
617 return 2;
618 break;
619 case CVMX_BOARD_TYPE_BBGW_REF:
620 if (interface == 0)
621 return 2;
622 break;
623 case CVMX_BOARD_TYPE_NIC_XLE_4G:
624 if (interface == 0)
625 return 0;
626 break;
627 /* The 2nd interface on the EBH5600 is connected to the Marvel switch,
628 which we don't support. Disable ports connected to it */
629 case CVMX_BOARD_TYPE_EBH5600:
630 if (interface == 1)
631 return 0;
632 break;
735 if (interface == 0)
736 return 2;
737 break;
738 case CVMX_BOARD_TYPE_BBGW_REF:
739 if (interface == 0)
740 return 2;
741 break;
742 case CVMX_BOARD_TYPE_NIC_XLE_4G:
743 if (interface == 0)
744 return 0;
745 break;
746 /* The 2nd interface on the EBH5600 is connected to the Marvel switch,
747 which we don't support. Disable ports connected to it */
748 case CVMX_BOARD_TYPE_EBH5600:
749 if (interface == 1)
750 return 0;
751 break;
752 case CVMX_BOARD_TYPE_EBB5600:
753#ifdef CVMX_ENABLE_PKO_FUNCTIONS
754 if (cvmx_helper_interface_get_mode(interface) == CVMX_HELPER_INTERFACE_MODE_PICMG)
755 return 0;
756#endif
757 break;
758 case CVMX_BOARD_TYPE_EBT5810:
759 return 1; /* Two ports on each SPI: 1 hooked to MAC, 1 loopback
760 ** Loopback disabled by default. */
633#if defined(OCTEON_VENDOR_LANNER)
634 case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
635 if (interface == 1)
636 return 12;
637 break;
638#endif
639 }
640#ifdef CVMX_BUILD_FOR_UBOOT

--- 25 unchanged lines hidden (view full) ---

666 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0);
667 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
668 /* Boards with gigabit WAN ports need a different setting that is
669 compatible with 100 Mbit settings */
670 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0xc);
671 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0xc);
672 }
673 }
761#if defined(OCTEON_VENDOR_LANNER)
762 case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
763 if (interface == 1)
764 return 12;
765 break;
766#endif
767 }
768#ifdef CVMX_BUILD_FOR_UBOOT

--- 25 unchanged lines hidden (view full) ---

794 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0);
795 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
796 /* Boards with gigabit WAN ports need a different setting that is
797 compatible with 100 Mbit settings */
798 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0xc);
799 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0xc);
800 }
801 }
802 else if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_LANAI2_U)
803 {
804 if (interface == 0)
805 {
806 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 16);
807 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 16);
808 }
809 }
674 else if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_CN3010_EVB_HS5)
675 {
810 else if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_CN3010_EVB_HS5)
811 {
676 /* Broadcom PHYs require differnet ASX clocks. Unfortunately
812 /* Broadcom PHYs require different ASX clocks. Unfortunately
677 many customer don't define a new board Id and simply
678 mangle the CN3010_EVB_HS5 */
679 if (interface == 0)
680 {
681 /* Some customers boards use a hacked up bootloader that identifies them as
682 ** CN3010_EVB_HS5 evaluation boards. This leads to all kinds of configuration
683 ** problems. Detect one case, and print warning, while trying to do the right thing.
684 */

--- 16 unchanged lines hidden (view full) ---

701 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 5);
702 }
703 }
704 }
705 }
706 return 0;
707}
708
813 many customer don't define a new board Id and simply
814 mangle the CN3010_EVB_HS5 */
815 if (interface == 0)
816 {
817 /* Some customers boards use a hacked up bootloader that identifies them as
818 ** CN3010_EVB_HS5 evaluation boards. This leads to all kinds of configuration
819 ** problems. Detect one case, and print warning, while trying to do the right thing.
820 */

--- 16 unchanged lines hidden (view full) ---

837 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 5);
838 }
839 }
840 }
841 }
842 return 0;
843}
844
845
846/**
847 * @INTERNAL
848 * Gets the clock type used for the USB block based on board type.
849 * Used by the USB code for auto configuration of clock type.
850 *
851 * @return USB clock type enumeration
852 */
709cvmx_helper_board_usb_clock_types_t __cvmx_helper_board_usb_get_clock_type(void)
710{
853cvmx_helper_board_usb_clock_types_t __cvmx_helper_board_usb_get_clock_type(void)
854{
711 switch (cvmx_sysinfo_get()->board_type) {
712 case CVMX_BOARD_TYPE_BBGW_REF:
855 switch (cvmx_sysinfo_get()->board_type)
856 {
857 case CVMX_BOARD_TYPE_BBGW_REF:
858 case CVMX_BOARD_TYPE_LANAI2_A:
859 case CVMX_BOARD_TYPE_LANAI2_U:
860 case CVMX_BOARD_TYPE_LANAI2_G:
713#if defined(OCTEON_VENDOR_LANNER)
714 case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
715#endif
716 return USB_CLOCK_TYPE_CRYSTAL_12;
717 }
718 return USB_CLOCK_TYPE_REF_48;
719}
720
861#if defined(OCTEON_VENDOR_LANNER)
862 case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
863#endif
864 return USB_CLOCK_TYPE_CRYSTAL_12;
865 }
866 return USB_CLOCK_TYPE_REF_48;
867}
868
869
870/**
871 * @INTERNAL
872 * Adjusts the number of available USB ports on Octeon based on board
873 * specifics.
874 *
875 * @param supported_ports expected number of ports based on chip type;
876 *
877 *
878 * @return number of available usb ports, based on board specifics.
879 * Return value is supported_ports if function does not
880 * override.
881 */
721int __cvmx_helper_board_usb_get_num_ports(int supported_ports)
722{
882int __cvmx_helper_board_usb_get_num_ports(int supported_ports)
883{
723 switch (cvmx_sysinfo_get()->board_type) {
884 switch (cvmx_sysinfo_get()->board_type)
885 {
724 case CVMX_BOARD_TYPE_NIC_XLE_4G:
725 return 0;
726 }
727
728 return supported_ports;
729}
730
731
886 case CVMX_BOARD_TYPE_NIC_XLE_4G:
887 return 0;
888 }
889
890 return supported_ports;
891}
892
893