| ixp425_qmgr.c (186352) | ixp425_qmgr.c (193096) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 43 unchanged lines hidden (view full) --- 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57 * SUCH DAMAGE. 58*/ 59#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 43 unchanged lines hidden (view full) --- 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57 * SUCH DAMAGE. 58*/ 59#include <sys/cdefs.h> |
| 60__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/ixp425_qmgr.c 186352 2008-12-20 03:26:09Z sam $"); | 60__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/ixp425_qmgr.c 193096 2009-05-30 15:14:44Z attilio $"); |
| 61 62/* 63 * Intel XScale Queue Manager support. 64 * 65 * Each IXP4XXX device has a hardware block that implements a priority 66 * queue manager that is shared between the XScale cpu and the backend 67 * devices (such as the NPE). Queues are accessed by reading/writing 68 * special memory locations. The queue contents are mapped into a shared --- 264 unchanged lines hidden (view full) --- 333 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_rid1, sc->sc_irq1); 334 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_rid2, sc->sc_irq2); 335 bus_space_unmap(sc->sc_iot, sc->sc_ioh, IXP425_QMGR_SIZE); 336 return (0); 337} 338 339int 340ixpqmgr_qconfig(int qId, int qEntries, int ne, int nf, int srcSel, | 61 62/* 63 * Intel XScale Queue Manager support. 64 * 65 * Each IXP4XXX device has a hardware block that implements a priority 66 * queue manager that is shared between the XScale cpu and the backend 67 * devices (such as the NPE). Queues are accessed by reading/writing 68 * special memory locations. The queue contents are mapped into a shared --- 264 unchanged lines hidden (view full) --- 333 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_rid1, sc->sc_irq1); 334 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_rid2, sc->sc_irq2); 335 bus_space_unmap(sc->sc_iot, sc->sc_ioh, IXP425_QMGR_SIZE); 336 return (0); 337} 338 339int 340ixpqmgr_qconfig(int qId, int qEntries, int ne, int nf, int srcSel, |
| 341 void (*cb)(int, void *), void *cbarg) | 341 qconfig_hand_t *cb, void *cbarg) |
| 342{ 343 struct ixpqmgr_softc *sc = ixpqmgr_sc; 344 struct qmgrInfo *qi = &sc->qinfo[qId]; 345 346 DPRINTF(sc->sc_dev, "%s(%u, %u, %u, %u, %u, %p, %p)\n", 347 __func__, qId, qEntries, ne, nf, srcSel, cb, cbarg); 348 349 /* NB: entry size is always 1 */ --- 756 unchanged lines hidden --- | 342{ 343 struct ixpqmgr_softc *sc = ixpqmgr_sc; 344 struct qmgrInfo *qi = &sc->qinfo[qId]; 345 346 DPRINTF(sc->sc_dev, "%s(%u, %u, %u, %u, %u, %p, %p)\n", 347 __func__, qId, qEntries, ne, nf, srcSel, cb, cbarg); 348 349 /* NB: entry size is always 1 */ --- 756 unchanged lines hidden --- |