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avila_ata.c (236987) avila_ata.c (277460)
1/*-
2 * Copyright (c) 2006 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2006 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/avila_ata.c 236987 2012-06-13 04:38:09Z imp $");
31__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/avila_ata.c 277460 2015-01-21 01:06:08Z ian $");
32
33/*
34 * Compact Flash Support for the Avila Gateworks XScale boards.
35 * The CF slot is operated in "True IDE" mode. Registers are on
36 * the Expansion Bus connected to CS1 and CS2. Interrupts are
37 * tied to GPIO pin 12. No DMA, just PIO.
38 *
39 * The ADI Pronghorn Metro is very similar. It use CS3 and CS4 and

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142 struct {
143 void (*cb)(void *);
144 void *arg;
145 } sc_intr[1]; /* NB: 1/channel */
146};
147
148static void ata_avila_intr(void *);
149bs_protos(ata);
32
33/*
34 * Compact Flash Support for the Avila Gateworks XScale boards.
35 * The CF slot is operated in "True IDE" mode. Registers are on
36 * the Expansion Bus connected to CS1 and CS2. Interrupts are
37 * tied to GPIO pin 12. No DMA, just PIO.
38 *
39 * The ADI Pronghorn Metro is very similar. It use CS3 and CS4 and

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142 struct {
143 void (*cb)(void *);
144 void *arg;
145 } sc_intr[1]; /* NB: 1/channel */
146};
147
148static void ata_avila_intr(void *);
149bs_protos(ata);
150static void ata_bs_rm_2_s(void *, bus_space_handle_t, bus_size_t,
150static void ata_bs_rm_2_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t,
151 u_int16_t *, bus_size_t);
151 u_int16_t *, bus_size_t);
152static void ata_bs_wm_2_s(void *, bus_space_handle_t, bus_size_t,
152static void ata_bs_wm_2_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t,
153 const u_int16_t *, bus_size_t);
154
155static int
156ata_avila_probe(device_t dev)
157{
158 struct ixp425_softc *sa = device_get_softc(device_get_parent(dev));
159 const struct ata_config *config;
160

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195 /*
196 * Craft special resource for ATA bus space ops
197 * that go through the expansion bus and require
198 * special hackery to ena/dis 16-bit operations.
199 *
200 * XXX probably should just make this generic for
201 * accessing the expansion bus.
202 */
153 const u_int16_t *, bus_size_t);
154
155static int
156ata_avila_probe(device_t dev)
157{
158 struct ixp425_softc *sa = device_get_softc(device_get_parent(dev));
159 const struct ata_config *config;
160

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195 /*
196 * Craft special resource for ATA bus space ops
197 * that go through the expansion bus and require
198 * special hackery to ena/dis 16-bit operations.
199 *
200 * XXX probably should just make this generic for
201 * accessing the expansion bus.
202 */
203 sc->sc_expbus_tag.bs_cookie = sc; /* NB: backpointer */
203 sc->sc_expbus_tag.bs_privdata = sc; /* NB: backpointer */
204 /* read single */
205 sc->sc_expbus_tag.bs_r_1 = ata_bs_r_1,
206 sc->sc_expbus_tag.bs_r_2 = ata_bs_r_2,
207 /* read multiple */
208 sc->sc_expbus_tag.bs_rm_2 = ata_bs_rm_2,
209 sc->sc_expbus_tag.bs_rm_2_s = ata_bs_rm_2_s,
210 /* write (single) */
211 sc->sc_expbus_tag.bs_w_1 = ata_bs_w_1,

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350disable_16(struct ata_avila_softc *sc)
351{
352 DELAY(100); /* XXX? */
353 EXP_BUS_WRITE_4(sc, sc->sc_16bit_off,
354 EXP_BUS_READ_4(sc, sc->sc_16bit_off) | EXP_BYTE_EN);
355}
356
357uint8_t
204 /* read single */
205 sc->sc_expbus_tag.bs_r_1 = ata_bs_r_1,
206 sc->sc_expbus_tag.bs_r_2 = ata_bs_r_2,
207 /* read multiple */
208 sc->sc_expbus_tag.bs_rm_2 = ata_bs_rm_2,
209 sc->sc_expbus_tag.bs_rm_2_s = ata_bs_rm_2_s,
210 /* write (single) */
211 sc->sc_expbus_tag.bs_w_1 = ata_bs_w_1,

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350disable_16(struct ata_avila_softc *sc)
351{
352 DELAY(100); /* XXX? */
353 EXP_BUS_WRITE_4(sc, sc->sc_16bit_off,
354 EXP_BUS_READ_4(sc, sc->sc_16bit_off) | EXP_BYTE_EN);
355}
356
357uint8_t
358ata_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
358ata_bs_r_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
359{
359{
360 struct ata_avila_softc *sc = t;
360 struct ata_avila_softc *sc = tag->bs_privdata;
361
362 return bus_space_read_1(sc->sc_iot, h, o);
363}
364
365void
361
362 return bus_space_read_1(sc->sc_iot, h, o);
363}
364
365void
366ata_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
366ata_bs_w_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, u_int8_t v)
367{
367{
368 struct ata_avila_softc *sc = t;
368 struct ata_avila_softc *sc = tag->bs_privdata;
369
370 bus_space_write_1(sc->sc_iot, h, o, v);
371}
372
373uint16_t
369
370 bus_space_write_1(sc->sc_iot, h, o, v);
371}
372
373uint16_t
374ata_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
374ata_bs_r_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
375{
375{
376 struct ata_avila_softc *sc = t;
376 struct ata_avila_softc *sc = tag->bs_privdata;
377 uint16_t v;
378
379 enable_16(sc);
380 v = bus_space_read_2(sc->sc_iot, h, o);
381 disable_16(sc);
382 return v;
383}
384
385void
377 uint16_t v;
378
379 enable_16(sc);
380 v = bus_space_read_2(sc->sc_iot, h, o);
381 disable_16(sc);
382 return v;
383}
384
385void
386ata_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
386ata_bs_w_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint16_t v)
387{
387{
388 struct ata_avila_softc *sc = t;
388 struct ata_avila_softc *sc = tag->bs_privdata;
389
390 enable_16(sc);
391 bus_space_write_2(sc->sc_iot, h, o, v);
392 disable_16(sc);
393}
394
395void
389
390 enable_16(sc);
391 bus_space_write_2(sc->sc_iot, h, o, v);
392 disable_16(sc);
393}
394
395void
396ata_bs_rm_2(void *t, bus_space_handle_t h, bus_size_t o,
396ata_bs_rm_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
397 u_int16_t *d, bus_size_t c)
398{
397 u_int16_t *d, bus_size_t c)
398{
399 struct ata_avila_softc *sc = t;
399 struct ata_avila_softc *sc = tag->bs_privdata;
400
401 enable_16(sc);
402 bus_space_read_multi_2(sc->sc_iot, h, o, d, c);
403 disable_16(sc);
404}
405
406void
400
401 enable_16(sc);
402 bus_space_read_multi_2(sc->sc_iot, h, o, d, c);
403 disable_16(sc);
404}
405
406void
407ata_bs_wm_2(void *t, bus_space_handle_t h, bus_size_t o,
407ata_bs_wm_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
408 const u_int16_t *d, bus_size_t c)
409{
408 const u_int16_t *d, bus_size_t c)
409{
410 struct ata_avila_softc *sc = t;
410 struct ata_avila_softc *sc = tag->bs_privdata;
411
412 enable_16(sc);
413 bus_space_write_multi_2(sc->sc_iot, h, o, d, c);
414 disable_16(sc);
415}
416
417/* XXX workaround ata driver by (incorrectly) byte swapping stream cases */
418
419void
411
412 enable_16(sc);
413 bus_space_write_multi_2(sc->sc_iot, h, o, d, c);
414 disable_16(sc);
415}
416
417/* XXX workaround ata driver by (incorrectly) byte swapping stream cases */
418
419void
420ata_bs_rm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
420ata_bs_rm_2_s(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
421 u_int16_t *d, bus_size_t c)
422{
421 u_int16_t *d, bus_size_t c)
422{
423 struct ata_avila_softc *sc = t;
423 struct ata_avila_softc *sc = tag->bs_privdata;
424 uint16_t v;
425 bus_size_t i;
426
427 enable_16(sc);
428#if 1
429 for (i = 0; i < c; i++) {
430 v = bus_space_read_2(sc->sc_iot, h, o);
431 d[i] = bswap16(v);
432 }
433#else
434 bus_space_read_multi_stream_2(sc->sc_iot, h, o, d, c);
435#endif
436 disable_16(sc);
437}
438
439void
424 uint16_t v;
425 bus_size_t i;
426
427 enable_16(sc);
428#if 1
429 for (i = 0; i < c; i++) {
430 v = bus_space_read_2(sc->sc_iot, h, o);
431 d[i] = bswap16(v);
432 }
433#else
434 bus_space_read_multi_stream_2(sc->sc_iot, h, o, d, c);
435#endif
436 disable_16(sc);
437}
438
439void
440ata_bs_wm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
440ata_bs_wm_2_s(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
441 const u_int16_t *d, bus_size_t c)
442{
441 const u_int16_t *d, bus_size_t c)
442{
443 struct ata_avila_softc *sc = t;
443 struct ata_avila_softc *sc = tag->bs_privdata;
444 bus_size_t i;
445
446 enable_16(sc);
447#if 1
448 for (i = 0; i < c; i++)
449 bus_space_write_2(sc->sc_iot, h, o, bswap16(d[i]));
450#else
451 bus_space_write_multi_stream_2(sc->sc_iot, h, o, d, c);

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444 bus_size_t i;
445
446 enable_16(sc);
447#if 1
448 for (i = 0; i < c; i++)
449 bus_space_write_2(sc->sc_iot, h, o, bswap16(d[i]));
450#else
451 bus_space_write_multi_stream_2(sc->sc_iot, h, o, d, c);

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