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uart_dev_cdnc.c (274668) uart_dev_cdnc.c (279724)
1/*-
2 * Copyright (c) 2005 M. Warner Losh
3 * Copyright (c) 2005 Olivier Houchard
4 * Copyright (c) 2012 Thomas Skibo
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 22 unchanged lines hidden (view full) ---

31 *
32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
33 * (v1.4) November 16, 2012. Xilinx doc UG585. UART is covered in Ch. 19
34 * and register definitions are in appendix B.33.
35 */
36
37
38#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2005 M. Warner Losh
3 * Copyright (c) 2005 Olivier Houchard
4 * Copyright (c) 2012 Thomas Skibo
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 22 unchanged lines hidden (view full) ---

31 *
32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
33 * (v1.4) November 16, 2012. Xilinx doc UG585. UART is covered in Ch. 19
34 * and register definitions are in appendix B.33.
35 */
36
37
38#include <sys/cdefs.h>
39__FBSDID("$FreeBSD: head/sys/arm/xilinx/uart_dev_cdnc.c 274668 2014-11-18 17:06:56Z imp $");
39__FBSDID("$FreeBSD: head/sys/arm/xilinx/uart_dev_cdnc.c 279724 2015-03-07 15:24:15Z ian $");
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/bus.h>
44#include <sys/conf.h>
45#include <sys/cons.h>
46#include <sys/tty.h>
47#include <machine/bus.h>
48
49#include <dev/uart/uart.h>
50#include <dev/uart/uart_cpu.h>
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/bus.h>
44#include <sys/conf.h>
45#include <sys/cons.h>
46#include <sys/tty.h>
47#include <machine/bus.h>
48
49#include <dev/uart/uart.h>
50#include <dev/uart/uart_cpu.h>
51#include <dev/uart/uart_cpu_fdt.h>
51#include <dev/uart/uart_bus.h>
52
53#include "uart_if.h"
54
55#define UART_FIFO_SIZE 64
56
57#define RD4(bas, reg) \
58 bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs((bas), (reg)))

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693
694 /* Enable interrupts. */
695 WR4(&sc->sc_bas, CDNC_UART_IEN_REG,
696 CDNC_UART_INT_RXTRIG | CDNC_UART_INT_RXTMOUT |
697 CDNC_UART_INT_TXOVR | CDNC_UART_INT_RXOVR |
698 CDNC_UART_INT_DMSI);
699}
700
52#include <dev/uart/uart_bus.h>
53
54#include "uart_if.h"
55
56#define UART_FIFO_SIZE 64
57
58#define RD4(bas, reg) \
59 bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs((bas), (reg)))

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694
695 /* Enable interrupts. */
696 WR4(&sc->sc_bas, CDNC_UART_IEN_REG,
697 CDNC_UART_INT_RXTRIG | CDNC_UART_INT_RXTMOUT |
698 CDNC_UART_INT_TXOVR | CDNC_UART_INT_RXOVR |
699 CDNC_UART_INT_DMSI);
700}
701
701struct uart_class uart_cdnc_class = {
702static struct uart_class uart_cdnc_class = {
702 "cdnc_uart",
703 cdnc_uart_bus_methods,
704 sizeof(struct uart_softc),
705 .uc_ops = &cdnc_uart_ops,
706 .uc_range = 8
707};
703 "cdnc_uart",
704 cdnc_uart_bus_methods,
705 sizeof(struct uart_softc),
706 .uc_ops = &cdnc_uart_ops,
707 .uc_range = 8
708};
709
710static struct ofw_compat_data compat_data[] = {
711 {"cadence,uart", (uintptr_t)&uart_cdnc_class},
712 {NULL, (uintptr_t)NULL},
713};
714UART_FDT_CLASS_AND_DEVICE(compat_data);